From 89e2aa6afd408f1b4c6b47c53bbf31d48463bcab Mon Sep 17 00:00:00 2001
From: Jim Grosbach <grosbach@apple.com>
Date: Tue, 16 Aug 2011 23:57:34 +0000
Subject: [PATCH] Thumb ADD(immediate) parsing support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137788 91177308-0d34-0410-b5e6-96231b3b80d8
---
 lib/Target/ARM/ARMInstrThumb.td           |  6 +++---
 lib/Target/ARM/AsmParser/ARMAsmParser.cpp |  5 +++++
 test/MC/ARM/basic-thumb-instructions.s    | 14 +++++++++++++-
 3 files changed, 21 insertions(+), 4 deletions(-)

diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td
index 85ffe928a9d..ffc74990dd2 100644
--- a/lib/Target/ARM/ARMInstrThumb.td
+++ b/lib/Target/ARM/ARMInstrThumb.td
@@ -849,7 +849,7 @@ def tADC :                      // A8.6.2
 
 // Add immediate
 def tADDi3 :                    // A8.6.4 T1
-  T1sIGenEncodeImm<0b01110, (outs tGPR:$Rd), (ins tGPR:$Rm, i32imm:$imm3),
+  T1sIGenEncodeImm<0b01110, (outs tGPR:$Rd), (ins tGPR:$Rm, imm0_7:$imm3),
                    IIC_iALUi,
                    "add", "\t$Rd, $Rm, $imm3",
                    [(set tGPR:$Rd, (add tGPR:$Rm, imm0_7:$imm3))]> {
@@ -858,8 +858,8 @@ def tADDi3 :                    // A8.6.4 T1
 }
 
 def tADDi8 :                    // A8.6.4 T2
-  T1sItGenEncodeImm<{1,1,0,?,?}, (outs tGPR:$Rdn), (ins tGPR:$Rn, i32imm:$imm8),
-                    IIC_iALUi,
+  T1sItGenEncodeImm<{1,1,0,?,?}, (outs tGPR:$Rdn),
+                    (ins tGPR:$Rn, imm0_255:$imm8), IIC_iALUi,
                     "add", "\t$Rdn, $imm8",
                     [(set tGPR:$Rdn, (add tGPR:$Rn, imm8_255:$imm8))]>;
 
diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
index 3db8a7d4d1e..0313ef4b71e 100644
--- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
+++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
@@ -3013,6 +3013,11 @@ processInstruction(MCInst &Inst,
       Inst = TmpInst;
     }
     break;
+  case ARM::tADDi8:
+    // If the immediate is in the range 0-7, we really wanted tADDi3.
+    if (Inst.getOperand(3).getImm() < 8)
+      Inst.setOpcode(ARM::tADDi3);
+    break;
   }
 }
 
diff --git a/test/MC/ARM/basic-thumb-instructions.s b/test/MC/ARM/basic-thumb-instructions.s
index 9c2bee7f18f..3f19dfe5d71 100644
--- a/test/MC/ARM/basic-thumb-instructions.s
+++ b/test/MC/ARM/basic-thumb-instructions.s
@@ -11,6 +11,18 @@
 _func:
 @ CHECK: _func
 
+@------------------------------------------------------------------------------
+@ ADD (immediate)
+@------------------------------------------------------------------------------
+        adds r1, r2, #3
+        adds r2, #3
+        adds r2, #8
+
+@ CHECK: adds	r1, r2, #3              @ encoding: [0xd1,0x1c]
+@ CHECK: adds	r2, r2, #3              @ encoding: [0xd2,0x1c]
+@ CHECK: adds	r2, #8                  @ encoding: [0x08,0x32]
+
+
 @------------------------------------------------------------------------------
 @ ADD (register)
 @------------------------------------------------------------------------------
@@ -18,4 +30,4 @@ _func:
         add r2, r8
 
 @ CHECK: adds	r1, r2, r3              @ encoding: [0xd1,0x18]
-@ CHECK: add	r2, r8                  @ encoding: [0x42,0x44]
+  CHECK: add	r2, r8                  @ encoding: [0x42,0x44]
-- 
2.34.1