pre-RA-sched: fix TargetOpcode usage
authorChristian Konig <christian.koenig@amd.com>
Wed, 20 Mar 2013 13:49:22 +0000 (13:49 +0000)
committerChristian Konig <christian.koenig@amd.com>
Wed, 20 Mar 2013 13:49:22 +0000 (13:49 +0000)
commit06091513c283c863296f01cc7c2e86b56bb50d02
tree8c82a666f9b500ee72b8615ade3d22d235aff14e
parentfd060a94a46db75c45b2a1789a8bc597a03e6ac1
pre-RA-sched: fix TargetOpcode usage

TargetOpcodes need to be treaded as Machine- and not ISD-Opcodes.

Signed-off-by: Christian König <christian.koenig@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177518 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp