oota-llvm.git
10 years agoSimply test for available locations in optimization remarks.
Diego Novillo [Wed, 18 Jun 2014 18:46:58 +0000 (18:46 +0000)]
Simply test for available locations in optimization remarks.

When emitting optimization remarks, we test for the presence of
instruction locations by testing for a valid llvm.dbg.cu annotation.
This is slightly inefficient because we can simply ask whether the
debug location we have is known or not.

Additionally, if my current plan works, I will need to remove the
llvm.dbg.cu annotation from the IL (or prevent it from being generated)
when -Rpass is used without -g.  In those cases, we'll want to generate
line tables but we will want to prevent code generation from emitting
DWARF code for them.

Tested on x86_64.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211204 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[PowerPC] Remove unnecessary load of r12 in indirect call
Ulrich Weigand [Wed, 18 Jun 2014 18:33:36 +0000 (18:33 +0000)]
[PowerPC] Remove unnecessary load of r12 in indirect call

When looking at the 64-bit SVR4 indirect call sequence, I noticed
an unnecessary load of r12.  And indeed the code says:

  // R12 must contain the address of an indirect callee.

But this is not correct; in the 64-bit SVR4 (ELFv1) ABI, there is
no need to load r12 at this point.  It seems this code and comment
is a remnant of code originally shared with the Darwin ABI ...

This patch simply removes the unnecessary load.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211203 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoUpdate to the latest registered ELF e_machine names and values.
Rafael Espindola [Wed, 18 Jun 2014 18:30:15 +0000 (18:30 +0000)]
Update to the latest registered ELF e_machine names and values.

Patch by John Wolf!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211202 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRun clang-format in a small chunk of code I am about to change.
Rafael Espindola [Wed, 18 Jun 2014 18:26:53 +0000 (18:26 +0000)]
Run clang-format in a small chunk of code I am about to change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211201 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoProfileData: Fix copy-paste type in RawInstrProfReader
Justin Bogner [Wed, 18 Jun 2014 18:20:44 +0000 (18:20 +0000)]
ProfileData: Fix copy-paste type in RawInstrProfReader

These deleted definitions had the wrong types.

Patch by Alex L!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211199 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[ARM] [MC] Refactor the constant pool classes
Weiming Zhao [Wed, 18 Jun 2014 18:17:25 +0000 (18:17 +0000)]
[ARM] [MC] Refactor the constant pool classes

ARMTargetStreamer implements ConstantPool and AssmeblerConstantPools
to keep track of assembler-generated constant pools that are used for
ldr-pseudo.

When implementing ldr-pseudo for AArch64, these two classes can be reused.
So this patch factors them out from ARM target to the general MC lib.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211198 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoADT: correct typo in comment
Ed Maste [Wed, 18 Jun 2014 18:08:55 +0000 (18:08 +0000)]
ADT: correct typo in comment

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211196 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600: Expand vector fceil
Jan Vesely [Wed, 18 Jun 2014 17:57:29 +0000 (17:57 +0000)]
R600: Expand vector fceil

Move fp64 fceil tests to fceil64.ll

v2: rebase

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211194 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[PowerPC] Simplify and improve loading into TOC register
Ulrich Weigand [Wed, 18 Jun 2014 17:52:49 +0000 (17:52 +0000)]
[PowerPC] Simplify and improve loading into TOC register

During an indirect function call sequence on the 64-bit SVR4 ABI,
generate code must load and then restore the TOC register.

This does not use a regular LOAD instruction since the TOC
register r2 is marked as reserved.  Instead, the are two
special instruction patterns:

 let RST = 2, DS = 2 in
 def LDinto_toc: DSForm_1a<58, 0, (outs), (ins g8rc:$reg),
                     "ld 2, 8($reg)", IIC_LdStLD,
                     [(PPCload_toc i64:$reg)]>, isPPC64;

 let RST = 2, DS = 10, RA = 1 in
 def LDtoc_restore : DSForm_1a<58, 0, (outs), (ins),
                     "ld 2, 40(1)", IIC_LdStLD,
                     [(PPCtoc_restore)]>, isPPC64;

Note that these not only restrict the destination of the
load to r2, but they also restrict the *source* of the
load to particular address combinations.  The latter is
a problem when we want to support the ELFv2 ABI, since
there the TOC save slot is no longer at 40(1).

This patch replaces those two instructions with a single
instruction pattern that only hard-codes r2 as destination,
but supports generic addresses as source.  This will allow
supporting the ELFv2 ABI, and also helps generate more
efficient code for calls to absolute addresses (allowing
simplification of the ppc64-calls.ll test case).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211193 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoWork around ridiculous warning.
Matt Arsenault [Wed, 18 Jun 2014 17:45:58 +0000 (17:45 +0000)]
Work around ridiculous warning.

Apparently C++ doesn't really have hex floating point constants.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211192 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[PowerPC] Add back test case for absolute calls (removed in r211174)
Ulrich Weigand [Wed, 18 Jun 2014 17:28:56 +0000 (17:28 +0000)]
[PowerPC] Add back test case for absolute calls (removed in r211174)

As requested by Hal Finkel, this adds back a test for calls to
a known-constant function pointer value, and verifies that the
64-bit SVR4 indirect function call sequence is used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211190 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd a triple so that right syntax is choosen on mac osx systems
Arnold Schwaighofer [Wed, 18 Jun 2014 17:20:49 +0000 (17:20 +0000)]
Add a triple so that right syntax is choosen on mac osx systems

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211188 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600/SI: Add intrinsics for brev instructions
Matt Arsenault [Wed, 18 Jun 2014 17:13:57 +0000 (17:13 +0000)]
R600/SI: Add intrinsics for brev instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211187 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600/SI: Prettier operand printing for 64-bit ops.
Matt Arsenault [Wed, 18 Jun 2014 17:13:51 +0000 (17:13 +0000)]
R600/SI: Prettier operand printing for 64-bit ops.

Copy what is done for 32-bit already so the order is about the same.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211186 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips] SYNC $stype instruction was added in Mips32
Matheus Almeida [Wed, 18 Jun 2014 17:10:30 +0000 (17:10 +0000)]
[mips] SYNC $stype instruction was added in Mips32
but SYNC with an implied operand ($stype = 0) is valid since Mips2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211185 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix a memory leak in the error path.
Rafael Espindola [Wed, 18 Jun 2014 17:07:15 +0000 (17:07 +0000)]
Fix a memory leak in the error path.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211184 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600: Implement f64 ftrunc, ffloor and fceil.
Matt Arsenault [Wed, 18 Jun 2014 17:05:30 +0000 (17:05 +0000)]
R600: Implement f64 ftrunc, ffloor and fceil.

CI has instructions for these, so this fixes them for older hardware.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211183 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600: Custom lower f64 frint for pre-CI
Matt Arsenault [Wed, 18 Jun 2014 17:05:26 +0000 (17:05 +0000)]
R600: Custom lower f64 frint for pre-CI

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211182 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600/SI: Temporary fix for f64 fneg
Matt Arsenault [Wed, 18 Jun 2014 17:05:22 +0000 (17:05 +0000)]
R600/SI: Temporary fix for f64 fneg

This should be a source modifier, but this unblocks
most of my math patches.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211181 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600/SI: Comparisons set vcc.
Matt Arsenault [Wed, 18 Jun 2014 16:53:48 +0000 (16:53 +0000)]
R600/SI: Comparisons set vcc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211178 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[X86] AVX512: Add non-temporal stores
Adam Nemet [Wed, 18 Jun 2014 16:51:10 +0000 (16:51 +0000)]
[X86] AVX512: Add non-temporal stores

Note that I followed the AVX2 convention here and didn't add LLVM intrinsics
for stores.  These can be generated with the nontemporal hint on LLVM IR
stores (see new test). The GCC builtins are lowered directly into nontemporal
stores.

<rdar://problem/17082571>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211176 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[X86] AVX512: Specify compressed displacement for vmovntdqa
Adam Nemet [Wed, 18 Jun 2014 16:51:07 +0000 (16:51 +0000)]
[X86] AVX512: Specify compressed displacement for vmovntdqa

Use the max 64-bit element size with EVEX_CD8.  This should work since element
size is ignored for a full-vector access (FVM).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211175 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[PowerPC] Do not use BLA with the 64-bit SVR4 ABI
Ulrich Weigand [Wed, 18 Jun 2014 16:14:04 +0000 (16:14 +0000)]
[PowerPC] Do not use BLA with the 64-bit SVR4 ABI

The PowerPC back-end uses BLA to implement calls to functions at
known-constant addresses, which is apparently used for certain
system routines on Darwin.

However, with the 64-bit SVR4 ABI, this is actually incorrect.
An immediate function pointer value on this platform is not
directly usable as a target address for BLA:
- in the ELFv1 ABI, the function pointer value refers to the
  *function descriptor*, not the code address
- in the ELFv2 ABI, the function pointer value refers to the
  global entry point, but BL(A) would only be correct when
  calling the *local* entry point

This bug didn't show up since using immediate function pointer
values is not usually done in the 64-bit SVR4 ABI in the first
place.  However, I ran into this issue with a certain use case
of LLVM as JIT, where immediate function pointer values were
uses to implement callbacks from JITted code to helpers in
statically compiled code.

Fixed by simply not using BLA with the 64-bit SVR4 ABI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211174 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoDo not XFAIL test/tools/llvm-cov tests on powerpc64le
Ulrich Weigand [Wed, 18 Jun 2014 15:52:18 +0000 (15:52 +0000)]
Do not XFAIL test/tools/llvm-cov tests on powerpc64le

All tests in test/tools/llvm-cov fail on big-endian targets and are
supposed to be XFAILed there.  However, including "powerpc64" in the
XFAIL line is now incorrect, since that matches both powerpc64- and
powerpc64le- targets, and the tests pass on the latter.

Update the XFAIL lines to use powerpc64- instead (like mips64-).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211172 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[PowerPC] Fix emitting instruction pairs on LE
Ulrich Weigand [Wed, 18 Jun 2014 15:37:07 +0000 (15:37 +0000)]
[PowerPC] Fix emitting instruction pairs on LE

My patch r204634 to emit instructions in little-endian format failed to
handle those special cases where we emit a pair of instructions from a
single LLVM MC instructions (like the bl; nop pairs used to implement
the call sequence).

In those cases, we still need to emit the "first" instruction (the one
in the more significant word) first, on both big and little endian,
and not swap them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211171 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoSupport LE in RelocVisitor::visitELF_PPC64_*
Ulrich Weigand [Wed, 18 Jun 2014 15:15:49 +0000 (15:15 +0000)]
Support LE in RelocVisitor::visitELF_PPC64_*

Since we now support both LE and BE PPC64 variants, use of getAddend64BE
is no longer correct.  Use the generic getELFRelocationAddend instead,
as was already done for Mips.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211170 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips] Fix expansion of memory operation if destination register is not a GPR.
Matheus Almeida [Wed, 18 Jun 2014 14:49:56 +0000 (14:49 +0000)]
[mips] Fix expansion of memory operation if destination register is not a GPR.

Summary:
The assembler tries to reuse the destination register for memory operations whenever
it can but it's not possible to do so if the destination register is not a GPR.

Example:
  ldc1 $f0, sym
should expand to:
  lui $at, %hi(sym)
  ldc1 $f0, %lo(sym)($at)

It's entirely wrong to expand to:
  lui $f0, %hi(sym)
  ldc1 $f0, %lo(sym)($f0)

Reviewers: dsanders

Reviewed By: dsanders

Differential Revision: http://reviews.llvm.org/D4173

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211169 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips] Report correct location when "erroring" about the use of $at when it's not...
Matheus Almeida [Wed, 18 Jun 2014 14:46:05 +0000 (14:46 +0000)]
[mips] Report correct location when "erroring" about the use of $at when it's not available.

Summary: This removes the FIXMEs from test/MC/Mips/mips-noat.s.

Reviewers: dsanders

Reviewed By: dsanders

Differential Revision: http://reviews.llvm.org/D4172

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211168 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips][mips64r6] Add BLTC and BLTUC instructions
Zoran Jovanovic [Wed, 18 Jun 2014 14:36:00 +0000 (14:36 +0000)]
[mips][mips64r6] Add BLTC and BLTUC instructions
Differential Revision: http://reviews.llvm.org/D3923

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211167 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips] Access $at only if necessary.
Matheus Almeida [Wed, 18 Jun 2014 14:15:42 +0000 (14:15 +0000)]
[mips] Access $at only if necessary.

Summary:
This patch doesn't really change the logic behind expandMemInst but it allows
us to assemble .S files that use .set noat with some macros. For example:

.set noat
lw $k0, offset($k1)

Can expand to:
lui $k0, %hi(offset)
addu $k0, $k0, $k1
lw $k0, %lo(offset)($k0)

with no need to access $at.

Reviewers: dsanders, vmedic

Reviewed By: dsanders, vmedic

Differential Revision: http://reviews.llvm.org/D4159

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211165 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd pattern for unsigned v4i32->v4f64 convert on AVX512.
Cameron McInally [Wed, 18 Jun 2014 14:04:37 +0000 (14:04 +0000)]
Add pattern for unsigned v4i32->v4f64 convert on AVX512.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211164 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips] Update MipsAsmParser so that it's possible to handle immediates that start...
Matheus Almeida [Wed, 18 Jun 2014 13:55:18 +0000 (13:55 +0000)]
[mips] Update MipsAsmParser so that it's possible to handle immediates that start with the binary operator NOT (~).

Reviewers: dsanders

Reviewed By: dsanders

Differential Revision: http://reviews.llvm.org/D4158

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211163 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips] Implement alias for 'and' and 'or' instructions for all ISAs.
Matheus Almeida [Wed, 18 Jun 2014 13:30:57 +0000 (13:30 +0000)]
[mips] Implement alias for 'and' and 'or' instructions for all ISAs.

Summary:
Examples:
and $2, 4 <=> andi $2, $2, 4
or $2, 4 <=> ori $2, $2, 4

Reviewers: dsanders

Reviewed By: dsanders

Differential Revision: http://reviews.llvm.org/D4155

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211161 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips] Remove the last usage of parseRegister from MipsAsmParser.
Matheus Almeida [Wed, 18 Jun 2014 13:08:59 +0000 (13:08 +0000)]
[mips] Remove the last usage of parseRegister from MipsAsmParser.

Summary:
Added negative test case so that we can be sure we handle erroneous situations
while parsing the .cpsetup directive.

Reviewers: dsanders

Reviewed By: dsanders

Differential Revision: http://reviews.llvm.org/D3681

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211160 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600: Implement 64bit SRA
Jan Vesely [Wed, 18 Jun 2014 12:27:17 +0000 (12:27 +0000)]
R600: Implement 64bit SRA

v2: Use capitalized variable name

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211159 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600: Implement 64bit SRL
Jan Vesely [Wed, 18 Jun 2014 12:27:15 +0000 (12:27 +0000)]
R600: Implement 64bit SRL

v2: use C++ style comment

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211158 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600: Implement 64bit SHL
Jan Vesely [Wed, 18 Jun 2014 12:27:13 +0000 (12:27 +0000)]
R600: Implement 64bit SHL

v2: Use c++ style comment

Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211157 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[msan] Handle X86 *.psad.* and *.pmadd.* intrinsics.
Evgeniy Stepanov [Wed, 18 Jun 2014 12:02:29 +0000 (12:02 +0000)]
[msan] Handle X86 *.psad.* and *.pmadd.* intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211156 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoDAG: move sret demotion into most basic LowerCallTo implementation.
Tim Northover [Wed, 18 Jun 2014 11:52:44 +0000 (11:52 +0000)]
DAG: move sret demotion into most basic LowerCallTo implementation.

It looks like there are two versions of LowerCallTo here: the
SelectionDAGBuilder one is designed to operate on LLVM IR, and the
TargetLowering one in the case where everything is at DAG level.

Previously, only the SelectionDAGBuilder variant could handle demoting
an impossible return to sret semantics (before delegating to the
TargetLowering version), but this functionality is also useful for
certain libcalls (e.g. 128-bit operations on 32-bit x86).  So this
commit moves the sret handling down a level.

rdar://problem/17242889

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211155 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[llvm-readobj] Fix member functions name style.
Simon Atanasyan [Wed, 18 Jun 2014 09:24:01 +0000 (09:24 +0000)]
[llvm-readobj] Fix member functions name style.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211152 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[llvm-readobj] Fix compile error.
Simon Atanasyan [Wed, 18 Jun 2014 09:23:55 +0000 (09:23 +0000)]
[llvm-readobj] Fix compile error.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211151 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[llvm-readobj][ELF] New `-mips-plt-got` command line option to output
Simon Atanasyan [Wed, 18 Jun 2014 08:47:09 +0000 (08:47 +0000)]
[llvm-readobj][ELF] New `-mips-plt-got` command line option to output
MIPS GOT section.

Patch reviewed by Rafael Espindola.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211150 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRevert "Random Number Generator (llvm)"
JF Bastien [Wed, 18 Jun 2014 06:33:23 +0000 (06:33 +0000)]
Revert "Random Number Generator (llvm)"

This reverts commit cccba093090d127e0b6d17473b14c264c14c5259.

It causes build breakage.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211146 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRandom Number Generator (llvm)
JF Bastien [Wed, 18 Jun 2014 06:23:25 +0000 (06:23 +0000)]
Random Number Generator (llvm)

Summary:
Provides an abstraction for a random number generator (RNG) that produces a stream of pseudo-random numbers.
The current implementation uses C++11 facilities and is therefore not cryptographically secure.

The RNG is salted with the text of the current command line invocation.
In addition, a user may specify a seed (reproducible builds).

In clang, the seed can be set via
  -frandom-seed=X
In the back end, the seed can be set via
  -rng-seed=X

This is the llvm part of the patch.
clang part: D3391

Reviewers: ahomescu, rinon, nicholas, jfb

Reviewed By: jfb

Subscribers: jfb, perl

Differential Revision: http://reviews.llvm.org/D3390

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211145 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[AArch64] Fix a pattern match failure caused by creating improper CONCAT_VECTOR.
Kevin Qin [Wed, 18 Jun 2014 05:54:42 +0000 (05:54 +0000)]
[AArch64] Fix a pattern match failure caused by creating improper CONCAT_VECTOR.

ReconstructShuffle() may wrongly creat a CONCAT_VECTOR trying to
concat 2 of v2i32 into v4i16. This commit is to fix this issue and
try to generate UZP1 instead of lots of MOV and INS.
Patch is initalized by Kevin Qin, and refactored by Tim Northover.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211144 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoReplace some assert(0)'s with llvm_unreachable.
Craig Topper [Wed, 18 Jun 2014 05:05:13 +0000 (05:05 +0000)]
Replace some assert(0)'s with llvm_unreachable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211141 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd the coverage cflags to the link step as well to make sure
Eric Christopher [Tue, 17 Jun 2014 23:27:32 +0000 (23:27 +0000)]
Add the coverage cflags to the link step as well to make sure
that we link in the support libraries.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211131 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAllow X86FastIsel to cope with 64 bit absolute relocations
Louis Gerbarg [Tue, 17 Jun 2014 23:22:41 +0000 (23:22 +0000)]
Allow X86FastIsel to cope with 64 bit absolute relocations

This patch is a follow up to r211040 & r211052. Rather than bailing out of fast
isel this patch will generate an alternate instruction (movabsq) instead of the
leaq. While this will always have enough room to handle the 64 bit displacment
it is generally over kill for internal symbols (most displacements will be
within 32 bits) but since we have no way of communicating the code model to the
the assmebler in order to avoid flagging an absolute leal/leaq as illegal when
using a symbolic displacement.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211130 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[FastISel][X86] Optimize predicates and fold CMP instructions.
Juergen Ributzka [Tue, 17 Jun 2014 21:55:43 +0000 (21:55 +0000)]
[FastISel][X86] Optimize predicates and fold CMP instructions.

This optimizes predicates for certain compares, such as fcmp oeq %x, %x to
fcmp ord %x, %x. The latter one is more efficient to generate.

The same optimization is applied to conditional branches.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211126 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRemove more occurrences of the unused-mutex-parameter pattern.
Zachary Turner [Tue, 17 Jun 2014 21:54:18 +0000 (21:54 +0000)]
Remove more occurrences of the unused-mutex-parameter pattern.

This pattern loses some of its usefulness when the mutex type is
statically polymorphic as opposed to runtime polymorphic, as
swapping out the mutex type requires changing a significant number
of function parameters, and templatizing the function parameter
requires the methods to be defined in the headers.

Furthermore, if LLVM is compiled with threads disabled then there
may even be no mutex to acquire anyway, so it should not be up to
individual APIs to know whether or not acquiring a mutex is required
to use those APIs to begin with.  It should be up to the user of the
API.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211125 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600/SI: Make sure target flags are set on pseudo VOP3 instructions
Tom Stellard [Tue, 17 Jun 2014 19:34:46 +0000 (19:34 +0000)]
R600/SI: Make sure target flags are set on pseudo VOP3 instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211120 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agolit: simplify population of the actual_inputs array
Hans Wennborg [Tue, 17 Jun 2014 18:17:46 +0000 (18:17 +0000)]
lit: simplify population of the actual_inputs array

Add all inputs to the array, except those starting with @, which
are treated as response files and expanded.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211119 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoMerge lib/Support/WindowsError.cpp into ib/Support/ErrorHandling.cpp.
Rafael Espindola [Tue, 17 Jun 2014 18:06:45 +0000 (18:06 +0000)]
Merge lib/Support/WindowsError.cpp into ib/Support/ErrorHandling.cpp.

The OSX ranlib warns on files with no symbols, and lib/Support/WindowsError.cpp
was empty when building on non-windows.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211118 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd "-format darwin" to llvm-size to be like darwin's size(1) -m output, and
Kevin Enderby [Tue, 17 Jun 2014 17:54:13 +0000 (17:54 +0000)]
Add "-format darwin" to llvm-size to be like darwin's size(1) -m output, and
and the -l option for the long format.  Also when the object is a Mach-O
file and the format is berkeley produce output like darwin’s default size(1)
summary berkeley derived output.

Like System V format, there are also some small changes in how and where
the file names and archive member names are printed for darwin and
Mach-O.

Like the changes to llvm-nm these are the first steps in seeing if it is
possible to make llvm-size produce the same output as darwin's size(1).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211117 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600/SI: Match cttz_zero_undef
Matt Arsenault [Tue, 17 Jun 2014 17:36:27 +0000 (17:36 +0000)]
R600/SI: Match cttz_zero_undef

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211116 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600/SI: Match ctlz_zero_undef
Matt Arsenault [Tue, 17 Jun 2014 17:36:24 +0000 (17:36 +0000)]
R600/SI: Match ctlz_zero_undef

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211115 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agomark the old jit tests as unsupported for powerpc64 (for cmake)
Will Schmidt [Tue, 17 Jun 2014 17:04:42 +0000 (17:04 +0000)]
mark the old jit tests as unsupported for powerpc64 (for cmake)

mark the old JIT tests as unsupported for powerpc64 - CMake style.
This follows the style used for hexagon/arm64/aarch64.
The equivalent tests still run under the supported MCJIT/*

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211111 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600: Use LDS and vectors for private memory
Tom Stellard [Tue, 17 Jun 2014 16:53:14 +0000 (16:53 +0000)]
R600: Use LDS and vectors for private memory

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211110 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600/SI: Add a pattern for llvm.AMDGPU.barrier.global
Tom Stellard [Tue, 17 Jun 2014 16:53:09 +0000 (16:53 +0000)]
R600/SI: Add a pattern for llvm.AMDGPU.barrier.global

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211109 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoSelectionDAG: Expand i64 = FP_TO_SINT i32
Tom Stellard [Tue, 17 Jun 2014 16:53:07 +0000 (16:53 +0000)]
SelectionDAG: Expand i64 = FP_TO_SINT i32

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211108 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600/SI: Re-initialize the m0 register after using it for indirect addressing
Tom Stellard [Tue, 17 Jun 2014 16:53:04 +0000 (16:53 +0000)]
R600/SI: Re-initialize the m0 register after using it for indirect addressing

We need to store a value greater than or equal to the number of LDS
bytes allocated by the shader in the m0 register in order for LDS
instructions to work correctly.

We always initialize m0 at the beginning of a shader, but this register
is also used for indirect addressing offsets, so we need to
re-initialize it any time we use indirect addressing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211107 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[FastISel][X86] Fix previous refactoring commit (r211077)
Juergen Ributzka [Tue, 17 Jun 2014 14:47:45 +0000 (14:47 +0000)]
[FastISel][X86] Fix previous refactoring commit (r211077)

Overlooked that fcmp_une uses an "or" instead of an "and" for combining the
flags.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211104 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFixed jump threading going to infinite loop.
Dinesh Dwivedi [Tue, 17 Jun 2014 14:34:19 +0000 (14:34 +0000)]
Fixed jump threading going to infinite loop.

This patch add code to remove unreachable blocks from function
as they may cause jump threading to stuck in infinite loop.

Differential Revision: http://reviews.llvm.org/D3991

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211103 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoMove SetTheory from utils/TableGen into lib/TableGen so Clang can use it.
James Molloy [Tue, 17 Jun 2014 13:10:38 +0000 (13:10 +0000)]
Move SetTheory from utils/TableGen into lib/TableGen so Clang can use it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211100 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix memory leak of RegScavenger accidentally added in r211037.
James Molloy [Tue, 17 Jun 2014 12:31:41 +0000 (12:31 +0000)]
Fix memory leak of RegScavenger accidentally added in r211037.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211097 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAArch64: estimate inline asm length during branch relaxation
Tim Northover [Tue, 17 Jun 2014 11:31:42 +0000 (11:31 +0000)]
AArch64: estimate inline asm length during branch relaxation

To make sure branches are in range, we need to do a better job of estimating
the length of an inline assembly block than "it's probably 1 instruction, who'd
write asm with more than that?".

Fortunately there's already a (highly suspect, see how many ways you can think
of to break it!) callback for this purpose, which is used by the other targets.

rdar://problem/17277590

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211095 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[msan] Fix a comment.
Evgeniy Stepanov [Tue, 17 Jun 2014 11:26:00 +0000 (11:26 +0000)]
[msan] Fix a comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211094 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoConvertUTF tests: remove uses of initializer lists to restore compatibility
Dmitri Gribenko [Tue, 17 Jun 2014 09:33:24 +0000 (09:33 +0000)]
ConvertUTF tests: remove uses of initializer lists to restore compatibility
with MSVC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211093 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[msan] Fix handling of multiplication by a constant with a number of trailing zeroes.
Evgeniy Stepanov [Tue, 17 Jun 2014 09:23:12 +0000 (09:23 +0000)]
[msan] Fix handling of multiplication by a constant with a number of trailing zeroes.

Multiplication by an integer with a number of trailing zero bits leaves
the same number of lower bits of the result initialized to zero.
This change makes MSan take this into account in the case of multiplication by
a compile-time constant.

We don't handle the general, non-constant, case because
(a) it's not going to be cheap (computation-wise);
(b) multiplication by a partially uninitialized value in user code is
    a bad idea anyway.

Constant case must be handled because it appears from LLVM optimization of a
completely valid user code, as the test case in compiler-rt demonstrates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211092 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoSupport: Inject LLVM_VERSION_INFO into the Support library
Justin Bogner [Tue, 17 Jun 2014 06:52:47 +0000 (06:52 +0000)]
Support: Inject LLVM_VERSION_INFO into the Support library

Mimic r116632 in passing LLVM_VERSION_INFO from the Makefile build
system to the build. This improves the -version output of tools that
use llvm::cl under the configure+make system.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211091 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agotools: Add a space between package version and LLVM_VERSION_INFO
Justin Bogner [Tue, 17 Jun 2014 06:52:41 +0000 (06:52 +0000)]
tools: Add a space between package version and LLVM_VERSION_INFO

This reads a little strangely. Add a space to clean it up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211090 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoConvert a few loops to use ranges.
Rafael Espindola [Tue, 17 Jun 2014 03:00:40 +0000 (03:00 +0000)]
Convert a few loops to use ranges.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211089 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd an overload for SourceMgr::PrintMessage that takes an existing diagnostic.
Jordan Rose [Tue, 17 Jun 2014 02:15:40 +0000 (02:15 +0000)]
Add an overload for SourceMgr::PrintMessage that takes an existing diagnostic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211087 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoModernize doc comments for SourceMgr.
Jordan Rose [Tue, 17 Jun 2014 02:15:36 +0000 (02:15 +0000)]
Modernize doc comments for SourceMgr.

No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211086 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[InstCombine] mark ADD with nuw if no unsigned overflow
Jingyue Wu [Tue, 17 Jun 2014 00:42:07 +0000 (00:42 +0000)]
[InstCombine] mark ADD with nuw if no unsigned overflow

Summary:
As a starting step, we only use one simple heuristic: if the sign bits
of both a and b are zero, we can prove "add a, b" do not unsigned
overflow, and thus convert it to "add nuw a, b".

Updated all affected tests and added two new tests (@zero_sign_bit and
@zero_sign_bit2) in AddOverflow.ll

Test Plan: make check-all

Reviewers: eliben, rafael, meheff, chandlerc

Reviewed By: chandlerc

Subscribers: chandlerc, llvm-commits

Differential Revision: http://reviews.llvm.org/D4144

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211084 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix build breakage caused by change to ValueMapTest.
Zachary Turner [Tue, 17 Jun 2014 00:38:40 +0000 (00:38 +0000)]
Fix build breakage caused by change to ValueMapTest.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211083 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoSROA: Only split loads on byte boundaries
Duncan P. N. Exon Smith [Tue, 17 Jun 2014 00:19:35 +0000 (00:19 +0000)]
SROA: Only split loads on byte boundaries

r199771 accidently broke the logic that makes sure that SROA only splits
load on byte boundaries.  If such a split happens, some bits get lost
when reassembling loads of wider types, causing data corruption.

Move the width check up to reject such splits early, avoiding the
corruption.  Fixes PR19250.

Patch by: Björn Steinbrink <bsteinbr@gmail.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211082 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoExpose ValueMap's mutex type as a typedef instead of a sys::Mutex.
Zachary Turner [Tue, 17 Jun 2014 00:17:38 +0000 (00:17 +0000)]
Expose ValueMap's mutex type as a typedef instead of a sys::Mutex.

This enables static polymorphism of the mutex type, which is
necessary in order to replace the standard mutex implementation
with a different type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211080 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[FastISel][X86] Refactor the code to get the X86 condition from a helper function...
Juergen Ributzka [Mon, 16 Jun 2014 23:58:24 +0000 (23:58 +0000)]
[FastISel][X86] Refactor the code to get the X86 condition from a helper function. NFC.

Make use of helper functions to simplify the branch and compare instruction
selection in FastISel. Also add test cases for compare and conditonal branch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211077 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoTeach LoopUnrollPass to respect loop unrolling hints in metadata.
Eli Bendersky [Mon, 16 Jun 2014 23:53:02 +0000 (23:53 +0000)]
Teach LoopUnrollPass to respect loop unrolling hints in metadata.

[This is resubmitting r210721, which was reverted due to suspected breakage
which turned out to be unrelated].

Some extra review comments were addressed. See D4090 and D4147 for more details.

The Clang change that produces this metadata was committed in r210667

Patch by Mark Heffernan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211076 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRevert r211066, 211067, 211068, 211069, 211070.
Zachary Turner [Mon, 16 Jun 2014 22:49:41 +0000 (22:49 +0000)]
Revert r211066, 211067, 211068, 211069, 211070.

These were committed accidentally from the wrong branch before having
a review sign-off.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211072 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoCleanup more unreferenced MutexGuard parameters on functions.
Zachary Turner [Mon, 16 Jun 2014 22:41:08 +0000 (22:41 +0000)]
Cleanup more unreferenced MutexGuard parameters on functions.

These parameters are intended to serve as sort of a contract that
you cannot access the functions outside of a mutex.  However, the
entire JIT class cannot be accessed outside of a mutex anyway, and
all methods acquire a lock as soon as they are entered.  Since the
containing class already is not intended to be thread-safe, it only
serves to add code clutter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211071 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoProgrammer's Manual changes.
Zachary Turner [Mon, 16 Jun 2014 22:40:48 +0000 (22:40 +0000)]
Programmer's Manual changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211070 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoKill the LLVM global lock.
Zachary Turner [Mon, 16 Jun 2014 22:40:42 +0000 (22:40 +0000)]
Kill the LLVM global lock.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211069 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRemove some code churn.
Zachary Turner [Mon, 16 Jun 2014 22:40:29 +0000 (22:40 +0000)]
Remove some code churn.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211068 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRemove some more code out into a separate CL.
Zachary Turner [Mon, 16 Jun 2014 22:40:17 +0000 (22:40 +0000)]
Remove some more code out into a separate CL.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211067 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoUsers of the llvm global mutex must now acquire it manually.
Zachary Turner [Mon, 16 Jun 2014 22:39:38 +0000 (22:39 +0000)]
Users of the llvm global mutex must now acquire it manually.

This allows the mutex to be acquired in a guarded, RAII fashion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211066 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd load/store functionality
Reed Kotler [Mon, 16 Jun 2014 22:05:47 +0000 (22:05 +0000)]
Add load/store functionality

Summary:
This patches allows non conversions like i1=i2; where both are global ints.
In addition, arithmetic and other things start to work since fast-isel will use
existing patterns for non fast-isel from tablegen files where applicable.

In addition i8, i16 will work in this limited context for assignment without the need
for sign extension (zero or signed). It does not matter how i8 or i16 are loaded (zero or sign extended)
since only the 8 or 16 relevant bits are used and clang will ask for sign extension before using them in
arithmetic. This is all made more complete in forthcoming patches.

for example:
  int i, j=1, k=3;

  void foo() {
    i = j + k;
  }

Keep in mind that this pass is not enabled right now and is an experimental pass
It can only be enabled with a hidden option to llvm of -mips-fast-isel.

Test Plan: Run test-suite, loadstore2.ll and I will run some executable tests.

Reviewers: dsanders

Subscribers: mcrosier

Differential Revision: http://reviews.llvm.org/D3856

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211061 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAArch64: Add backend intrinsic for rbit.
Jim Grosbach [Mon, 16 Jun 2014 21:55:35 +0000 (21:55 +0000)]
AArch64: Add backend intrinsic for rbit.

Define an intrinsic for the frontend to use and pattern match it to
the RBIT instruction.

rdar://9283021

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211058 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoARM: intrinsic support for rbit.
Jim Grosbach [Mon, 16 Jun 2014 21:55:30 +0000 (21:55 +0000)]
ARM: intrinsic support for rbit.

We already have an ARMISD node. Create an intrinsic to map to it so we can
add support for the frontend __rbit() intrinsic.

rdar://9283021

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211057 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[PPC64] Fix PR19893 - improve code generation for local function addresses
Bill Schmidt [Mon, 16 Jun 2014 21:36:02 +0000 (21:36 +0000)]
[PPC64] Fix PR19893 - improve code generation for local function addresses

Rafael opened http://llvm.org/bugs/show_bug.cgi?id=19893 to track non-optimal
code generation for forming a function address that is local to the compile
unit.  The existing code was treating both local and non-local functions
identically.

This patch fixes the problem by properly identifying local functions and
generating the proper addis/addi code.  I also noticed that Rafael's earlier
changes to correct the surrounding code in PPCISelLowering.cpp were also
needed for fast instruction selection in PPCFastISel.cpp, so this patch
fixes that code as well.

The existing test/CodeGen/PowerPC/func-addr.ll is modified to test the new
code generation.  I've added a -O0 run line to test the fast-isel code as
well.

Tested on powerpc64[le]-unknown-linux-gnu with no regressions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211056 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoSince the DataLayout is always found off of the subtarget go ahead
Eric Christopher [Mon, 16 Jun 2014 21:18:27 +0000 (21:18 +0000)]
Since the DataLayout is always found off of the subtarget go ahead
and query the base target machine implementation for it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211055 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoClean up some unnecessary mutex guards.
Zachary Turner [Mon, 16 Jun 2014 20:54:28 +0000 (20:54 +0000)]
Clean up some unnecessary mutex guards.

These were being used as unreferenced parameters to enforce that
the methods must not be called without holding a mutex, but all
of the methods in question were internal, and the methods were
only exposed through an interface whose entire purpose was to
serialize access to these structures, so expecting the methods
to be accessed under a mutex is reasonable enough.

Reviewed by: blaikie

Differential Revision: http://reviews.llvm.org/D4162

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211054 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoImprove comments for r211040
Louis Gerbarg [Mon, 16 Jun 2014 20:31:50 +0000 (20:31 +0000)]
Improve comments for r211040

Added comment to clarify why we r211040 choose to bail out of fast isel instead
of generating a more complicated relocation, and fix mislabelled register in the
comments of the asan test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211052 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRevert "lit: warn when passed invalid pathname" (r210597)
Hans Wennborg [Mon, 16 Jun 2014 20:18:41 +0000 (20:18 +0000)]
Revert "lit: warn when passed invalid pathname" (r210597)

It was pointed out that this breaks the "virtual test discovery"
mechanism, which allows for narming tests in the test exec root.

Reverting until I can figure out how to fix this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211048 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoARM: implement correct atomic operations on v7M
Tim Northover [Mon, 16 Jun 2014 18:49:36 +0000 (18:49 +0000)]
ARM: implement correct atomic operations on v7M

ARM v7M has ldrex/strex but not ldrexd/strexd. This means 32-bit
operations should work as normal, but 64-bit ones are almost certainly
doomed.

Patch by Phoebe Buckheister.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211042 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix illegal relocations in X86FastISel
Louis Gerbarg [Mon, 16 Jun 2014 17:35:40 +0000 (17:35 +0000)]
Fix illegal relocations in X86FastISel

On x86_86  the lea instruction can only use a 32 bit immediate value. When
the code is compiled statically the RIP register is not used, meaning the
immediate is all that can be used for the relocation, which is not sufficient
in the case of targets more than +/- 2GB away. This patch bails out of fast
isel in those cases and reverts to DAG which does the right thing.

Test case included.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211040 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoLowerSwitch: track bounding range for the condition tree.
Jim Grosbach [Mon, 16 Jun 2014 16:55:20 +0000 (16:55 +0000)]
LowerSwitch: track bounding range for the condition tree.

When LowerSwitch transforms a switch instruction into a tree of ifs it
is actually performing a binary search into the various case ranges, to
see if the current value falls into one cases range of values.

So, if we have a program with something like this:

switch (a) {
case 0:
  do0();
  break;
case 1:
  do1();
  break;
case 2:
  do2();
  break;
default:
  break;
}

the code produced is something like this:

  if (a < 1) {
    if (a == 0) {
      do0();
    }
  } else {
    if (a < 2) {
      if (a == 1) {
        do1();
      }
    } else {
      if (a == 2) {
        do2();
      }
    }
  }

This code is inefficient because the check (a == 1) to execute do1() is
not needed.

The reason is that because we already checked that (a >= 1) initially by
checking that also  (a < 2) we basically already inferred that (a == 1)
without the need of an extra basic block spawned to check if actually (a
== 1).

The patch addresses this problem by keeping track of already
checked bounds in the LowerSwitch algorithm, so that when the time
arrives to produce a Leaf Block that checks the equality with the case
value / range the algorithm can decide if that block is really needed
depending on the already checked bounds .

For example, the above with "a = 1" would work like this:

the bounds start as LB: NONE , UB: NONE
as (a < 1) is emitted the bounds for the else path become LB: 1 UB:
NONE. This happens because by failing the test (a < 1) we know that the
value "a" cannot be smaller than 1 if we enter the else branch.
After the emitting the check (a < 2) the bounds in the if branch become
LB: 1 UB: 1. This is because by checking that "a" is smaller than 2 then
the upper bound becomes 2 - 1 = 1.

When it is time to emit the leaf block for "case 1:" we notice that 1
can be squeezed exactly in between the LB and UB, which means that if we
arrived to that block there is no need to emit a block that checks if (a
== 1).

Patch by: Marcello Maggioni <hayarms@gmail.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211038 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRefactor the disabling of Thumb-1 LDM/STM generation
James Molloy [Mon, 16 Jun 2014 16:42:53 +0000 (16:42 +0000)]
Refactor the disabling of Thumb-1 LDM/STM generation

Originally I switched the LD/ST optimizer off in TargetMachine as it was previously, but Eric has suggested he'd prefer that it be short-circuited in the pass itself.

No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211037 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix pr17056.
Rafael Espindola [Mon, 16 Jun 2014 16:41:00 +0000 (16:41 +0000)]
Fix pr17056.

This makes llvm-nm ignore members that are not sufficiently aligned for
lib/Object to handle.

These archives are invalid. GNU AR is able to handle this, but in general
just warns about broken archive members.

We should probably start warning too, but for now just make sure llvm-nm
exits with an 0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211036 91177308-0d34-0410-b5e6-96231b3b80d8