oota-llvm.git
9 years ago[DAGCombiner] Fix ReplaceExtractVectorEltOfLoadWithNarrowedLoad for BE
Ulrich Weigand [Tue, 5 May 2015 19:33:37 +0000 (19:33 +0000)]
[DAGCombiner] Fix ReplaceExtractVectorEltOfLoadWithNarrowedLoad for BE

For little-endian, the function would convert (extract_vector_elt (load X), Y)
to X + Y*sizeof(elt).  For big-endian it would instead use
X + sizeof(vec) - Y*sizeof(elt).  The big-endian case wasn't right since
vector index order always follows memory/array order, even for big-endian.
(Note that the current handling has to be wrong for Y==0 since it would
access beyond the end of the vector.)

Original patch by Richard Sandiford.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236529 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[LegalizeVectorTypes] Allow single loads and stores for more short vectors
Ulrich Weigand [Tue, 5 May 2015 19:32:57 +0000 (19:32 +0000)]
[LegalizeVectorTypes] Allow single loads and stores for more short vectors

When lowering a load or store for TypeWidenVector, the type legalizer
would use a single load or store if the associated integer type was legal.
E.g. it would load a v4i8 as an i32 if i32 was legal.

This patch extends that behavior to promoted integers as well as legal ones.
If the integer type for the full vector width is TypePromoteInteger,
the element type is going to be TypePromoteInteger too, and it's still
better to use a single promoting load or truncating store rather than N
individual promoting loads or truncating stores.  E.g. if you have a v2i8
on a target where i16 is promoted to i32, it's better to load the v2i8 as
an i16 rather than load both i8s individually.

Original patch by Richard Sandiford.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236528 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[SystemZ] Add vector intrinsics
Ulrich Weigand [Tue, 5 May 2015 19:31:09 +0000 (19:31 +0000)]
[SystemZ] Add vector intrinsics

This adds intrinsics to allow access to all of the z13 vector instructions.
Note that instructions whose semantics can be described by standard LLVM IR
do not get any intrinsics.

For each instructions whose semantics *cannot* (fully) be described, we
define an LLVM IR target-specific intrinsic that directly maps to this
instruction.

For instructions that also set the condition code, the LLVM IR intrinsic
returns the post-instruction CC value as a second result.  Instruction
selection will attempt to detect code that compares that CC value against
constants and use the condition code directly instead.

Based on a patch by Richard Sandiford.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236527 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[SystemZ] Mark v1i128 and v1f128 as unsupported
Ulrich Weigand [Tue, 5 May 2015 19:30:05 +0000 (19:30 +0000)]
[SystemZ] Mark v1i128 and v1f128 as unsupported

The ABI specifies that <1 x i128> and <1 x fp128> are supposed to be
passed in vector registers.  We do not yet support those types, and
some infrastructure is missing before we can do so.

In order to prevent accidentally generating code violating the ABI,
this patch adds checks to detect those types and error out if user
code attempts to use them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236526 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[SystemZ] Handle sub-128 vectors
Ulrich Weigand [Tue, 5 May 2015 19:29:21 +0000 (19:29 +0000)]
[SystemZ] Handle sub-128 vectors

The ABI allows sub-128 vectors to be passed and returned in registers,
with the vector occupying the upper part of a register.  We therefore
want to legalize those types by widening the vector rather than promoting
the elements.

The patch includes some simple tests for sub-128 vectors and also tests
that we can recognize various pack sequences, some of which use sub-128
vectors as temporary results.  One of these forms is based on the pack
sequences generated by llvmpipe when no intrinsics are used.

Signed unpacks are recognized as BUILD_VECTORs whose elements are
individually sign-extended.  Unsigned unpacks can have the equivalent
form with zero extension, but they also occur as shuffles in which some
elements are zero.

Based on a patch by Richard Sandiford.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236525 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[SystemZ] Add CodeGen support for scalar f64 ops in vector registers
Ulrich Weigand [Tue, 5 May 2015 19:28:34 +0000 (19:28 +0000)]
[SystemZ] Add CodeGen support for scalar f64 ops in vector registers

The z13 vector facility includes some instructions that operate only on the
high f64 in a v2f64, effectively extending the FP register set from 16
to 32 registers.  It's still better to use the old instructions if the
operands happen to fit though, since the older instructions have a shorter
encoding.

Based on a patch by Richard Sandiford.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236524 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[SystemZ] Add CodeGen support for v4f32
Ulrich Weigand [Tue, 5 May 2015 19:27:45 +0000 (19:27 +0000)]
[SystemZ] Add CodeGen support for v4f32

The architecture doesn't really have any native v4f32 operations except
v4f32->v2f64 and v2f64->v4f32 conversions, with only half of the v4f32
elements being used.  Even so, using vector registers for <4 x float>
and scalarising individual operations is much better than generating
completely scalar code, since there's much less register pressure.
It's also more efficient to do v4f32 comparisons by extending to 2
v2f64s, comparing those, then packing the result.

This particularly helps with llvmpipe.

Based on a patch by Richard Sandiford.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236523 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[SystemZ] Add CodeGen support for v2f64
Ulrich Weigand [Tue, 5 May 2015 19:26:48 +0000 (19:26 +0000)]
[SystemZ] Add CodeGen support for v2f64

This adds ABI and CodeGen support for the v2f64 type, which is natively
supported by z13 instructions.

Based on a patch by Richard Sandiford.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236522 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[SystemZ] Add CodeGen support for integer vector types
Ulrich Weigand [Tue, 5 May 2015 19:25:42 +0000 (19:25 +0000)]
[SystemZ] Add CodeGen support for integer vector types

This the first of a series of patches to add CodeGen support exploiting
the instructions of the z13 vector facility.  This patch adds support
for the native integer vector types (v16i8, v8i16, v4i32, v2i64).

When the vector facility is present, we default to the new vector ABI.
This is characterized by two major differences:
- Vector types are passed/returned in vector registers
  (except for unnamed arguments of a variable-argument list function).
- Vector types are at most 8-byte aligned.

The reason for the choice of 8-byte vector alignment is that the hardware
is able to efficiently load vectors at 8-byte alignment, and the ABI only
guarantees 8-byte alignment of the stack pointer, so requiring any higher
alignment for vectors would require dynamic stack re-alignment code.

However, for compatibility with old code that may use vector types, when
*not* using the vector facility, the old alignment rules (vector types
are naturally aligned) remain in use.

These alignment rules are not only implemented at the C language level
(implemented in clang), but also at the LLVM IR level.  This is done
by selecting a different DataLayout string depending on whether the
vector ABI is in effect or not.

Based on a patch by Richard Sandiford.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236521 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[SystemZ] Add z13 vector facility and MC support
Ulrich Weigand [Tue, 5 May 2015 19:23:40 +0000 (19:23 +0000)]
[SystemZ] Add z13 vector facility and MC support

This patch adds support for the z13 processor type and its vector facility,
and adds MC support for all new instructions provided by that facilily.

Apart from defining the new instructions, the main changes are:

- Adding VR128, VR64 and VR32 register classes.
- Making FP64 a subclass of VR64 and FP32 a subclass of VR32.
- Adding a D(V,B) addressing mode for scatter/gather operations
- Adding 1-, 2-, and 3-bit immediate operands for some 4-bit fields.
  Until now all immediate operands have been the same width as the
  underlying field (hence the assert->return change in decode[SU]ImmOperand).

In addition, sys::getHostCPUName is extended to detect running natively
on a z13 machine.

Based on a patch by Richard Sandiford.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236520 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert "Refactor UpdatePredRedefs and StepForward to avoid duplication. NFC"
Pete Cooper [Tue, 5 May 2015 18:49:08 +0000 (18:49 +0000)]
Revert "Refactor UpdatePredRedefs and StepForward to avoid duplication.  NFC"

This reverts commit 963cdbccf6e5578822836fd9b2ebece0ba9a60b7 (ie r236514)

This is to get the bots green while i investigate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236518 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert "Fix IfConverter to handle regmask machine operands."
Pete Cooper [Tue, 5 May 2015 18:49:05 +0000 (18:49 +0000)]
Revert "Fix IfConverter to handle regmask machine operands."

This reverts commit b27413cbfd78d959c18e713bfa271fb69e6b3303 (ie r236515).

This is to get the bots green while i investigate the failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236517 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix IfConverter to handle regmask machine operands.
Pete Cooper [Tue, 5 May 2015 18:31:36 +0000 (18:31 +0000)]
Fix IfConverter to handle regmask machine operands.

A regmask (typically seen on a call) clobbers the set of registers it lists.  The IfConverter, in UpdatePredRedefs, was handling register defs, but not regmasks.

These are slightly different to a def in that we need to add both an implicit use and def to appease the machine verifier.  Otherwise, uses after the if converted call could think they are reading an undefined register.

Reviewed by Matthias Braun and Quentin Colombet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236515 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRefactor UpdatePredRedefs and StepForward to avoid duplication. NFC
Pete Cooper [Tue, 5 May 2015 18:31:31 +0000 (18:31 +0000)]
Refactor UpdatePredRedefs and StepForward to avoid duplication.  NFC

The code was basically the same here already.  Just added an out parameter for a vector of seen defs so that UpdatePredRedefs can call StepForward first, then do its own post processing on the seen defs.

Will be used in the next commit to also handle regmasks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236514 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix typo in assert message. NFC.
Diego Novillo [Tue, 5 May 2015 18:24:47 +0000 (18:24 +0000)]
Fix typo in assert message. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236513 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix the clang -Werror build, use of uninitialized variable.
David Blaikie [Tue, 5 May 2015 18:12:33 +0000 (18:12 +0000)]
Fix the clang -Werror build, use of uninitialized variable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236512 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoUpdate BasicAliasAnalysis to understand that nothing aliases with undef values.
Daniel Berlin [Tue, 5 May 2015 18:10:49 +0000 (18:10 +0000)]
Update BasicAliasAnalysis to understand that nothing aliases with undef values.
It got this in some cases (if one of them was an identified object), but not in all cases.

This caused stores to undef to block load-forwarding in some cases, etc.

Added test to Transforms/GVN to verify optimization occurs as expected.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236511 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[opaque pointer type] Track explicit GEP pointee type through in-memory IR
David Blaikie [Tue, 5 May 2015 18:03:48 +0000 (18:03 +0000)]
[opaque pointer type] Track explicit GEP pointee type through in-memory IR

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236510 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRe-land "[WinEH] Add an EH registration and state insertion pass for 32-bit x86"
Reid Kleckner [Tue, 5 May 2015 17:44:16 +0000 (17:44 +0000)]
Re-land "[WinEH] Add an EH registration and state insertion pass for 32-bit x86"

This reverts commit r236360.

This change exposed a bug in WinEHPrepare by opting win32 code into EH
preparation. We already knew that WinEHPrepare has bugs, and is the
status quo for x64, so I don't think that's a reason to hold off on this
change. I disabled exceptions in the sanitizer tests in r236505 and an
earlier revision.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236508 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[ShrinkWrap] Add (a simplified version) of shrink-wrapping.
Quentin Colombet [Tue, 5 May 2015 17:38:16 +0000 (17:38 +0000)]
[ShrinkWrap] Add (a simplified version) of shrink-wrapping.

This patch introduces a new pass that computes the safe point to insert the
prologue and epilogue of the function.
The interest is to find safe points that are cheaper than the entry and exits
blocks.

As an example and to avoid regressions to be introduce, this patch also
implements the required bits to enable the shrink-wrapping pass for AArch64.

** Context **

Currently we insert the prologue and epilogue of the method/function in the
entry and exits blocks. Although this is correct, we can do a better job when
those are not immediately required and insert them at less frequently executed
places.
The job of the shrink-wrapping pass is to identify such places.

** Motivating example **

Let us consider the following function that perform a call only in one branch of
a if:
define i32 @f(i32 %a, i32 %b)  {
 %tmp = alloca i32, align 4
 %tmp2 = icmp slt i32 %a, %b
 br i1 %tmp2, label %true, label %false

true:
 store i32 %a, i32* %tmp, align 4
 %tmp4 = call i32 @doSomething(i32 0, i32* %tmp)
 br label %false

false:
 %tmp.0 = phi i32 [ %tmp4, %true ], [ %a, %0 ]
 ret i32 %tmp.0
}

On AArch64 this code generates (removing the cfi directives to ease
readabilities):
_f:                                     ; @f
; BB#0:
  stp x29, x30, [sp, #-16]!
  mov  x29, sp
  sub sp, sp, #16             ; =16
  cmp  w0, w1
  b.ge  LBB0_2
; BB#1:                                 ; %true
  stur  w0, [x29, #-4]
  sub x1, x29, #4             ; =4
  mov  w0, wzr
  bl  _doSomething
LBB0_2:                                 ; %false
  mov  sp, x29
  ldp x29, x30, [sp], #16
  ret

With shrink-wrapping we could generate:
_f:                                     ; @f
; BB#0:
  cmp  w0, w1
  b.ge  LBB0_2
; BB#1:                                 ; %true
  stp x29, x30, [sp, #-16]!
  mov  x29, sp
  sub sp, sp, #16             ; =16
  stur  w0, [x29, #-4]
  sub x1, x29, #4             ; =4
  mov  w0, wzr
  bl  _doSomething
  add sp, x29, #16            ; =16
  ldp x29, x30, [sp], #16
LBB0_2:                                 ; %false
  ret

Therefore, we would pay the overhead of setting up/destroying the frame only if
we actually do the call.

** Proposed Solution **

This patch introduces a new machine pass that perform the shrink-wrapping
analysis (See the comments at the beginning of ShrinkWrap.cpp for more details).
It then stores the safe save and restore point into the MachineFrameInfo
attached to the MachineFunction.
This information is then used by the PrologEpilogInserter (PEI) to place the
related code at the right place. This pass runs right before the PEI.

Unlike the original paper of Chow from PLDI’88, this implementation of
shrink-wrapping does not use expensive data-flow analysis and does not need hack
to properly avoid frequently executed point. Instead, it relies on dominance and
loop properties.

The pass is off by default and each target can opt-in by setting the
EnableShrinkWrap boolean to true in their derived class of TargetPassConfig.
This setting can also be overwritten on the command line by using
-enable-shrink-wrap.

Before you try out the pass for your target, make sure you properly fix your
emitProlog/emitEpilog/adjustForXXX method to cope with basic blocks that are not
necessarily the entry block.

** Design Decisions **

1. ShrinkWrap is its own pass right now. It could frankly be merged into PEI but
for debugging and clarity I thought it was best to have its own file.
2. Right now, we only support one save point and one restore point. At some
point we can expand this to several save point and restore point, the impacted
component would then be:
- The pass itself: New algorithm needed.
- MachineFrameInfo: Hold a list or set of Save/Restore point instead of one
  pointer.
- PEI: Should loop over the save point and restore point.
Anyhow, at least for this first iteration, I do not believe this is interesting
to support the complex cases. We should revisit that when we motivating
examples.

Differential Revision: http://reviews.llvm.org/D9210

<rdar://problem/3201744>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236507 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[Orc] Reapply r236465 with fixes for the MSVC bots.
Lang Hames [Tue, 5 May 2015 17:37:18 +0000 (17:37 +0000)]
[Orc] Reapply r236465 with fixes for the MSVC bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236506 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[bugpoint] Increase default memory limit to 400MB to fix bugpoint tests.
Daniel Sanders [Tue, 5 May 2015 16:29:40 +0000 (16:29 +0000)]
[bugpoint] Increase default memory limit to 400MB to fix bugpoint tests.

I tracked down the bug to an unchecked malloc in SmallVectorBase::grow_pod().
This malloc is returning NULL on my machine when running under bugpoint but not
when -enable-valgrind is given.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236504 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoThis patch adds ABI support for v1i128 data type.
Kit Barton [Tue, 5 May 2015 16:10:44 +0000 (16:10 +0000)]
This patch adds ABI support for v1i128 data type.
It adds v1i128 to the appropriate register classes and checks parameter passing
and return values.

This is related to http://reviews.llvm.org/D9081, which will add instructions
that exploit the v1i128 datatype.

Phabricator review: http://reviews.llvm.org/D9475

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236503 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoEmit comment for gc.relocate showing base and derived pointers in human readable...
Igor Laevsky [Tue, 5 May 2015 13:20:42 +0000 (13:20 +0000)]
Emit comment for gc.relocate showing base and derived pointers in human readable form.

Differential Revision: http://reviews.llvm.org/D9326

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236497 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[mips] Generate code for insert/extract operations when using the N64 ABI and MSA.
Daniel Sanders [Tue, 5 May 2015 10:32:24 +0000 (10:32 +0000)]
[mips] Generate code for insert/extract operations when using the N64 ABI and MSA.

Summary:
When using the N64 ABI, element-indices use the i64 type instead of i32.
In many cases, we can use iPTR to account for this but additional patterns
and pseudo's are also required.

This fixes most (but not quite all) failures in the test-suite when using
N64 and MSA together.

Reviewers: vkalintiris

Reviewed By: vkalintiris

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9342

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236494 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix regression in parsing armv{6,7}hl- triples. These are used by SUSE
Ismail Donmez [Tue, 5 May 2015 09:29:43 +0000 (09:29 +0000)]
Fix regression in parsing armv{6,7}hl- triples. These are used by SUSE
and Redhat currently.

Reviewed by Jonathan Roelofs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236492 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[mips][msa] Test basic operations for the N32 ABI too.
Daniel Sanders [Tue, 5 May 2015 08:48:35 +0000 (08:48 +0000)]
[mips][msa] Test basic operations for the N32 ABI too.

Summary:
This required adding instruction aliases for dneg.

N64 will be enabled shortly but requires additional bugfixes.

Reviewers: vkalintiris

Reviewed By: vkalintiris

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9341

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236489 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[lib/Fuzzer] use handle_abort=1 by default so that when assert() fires we save the...
Kostya Serebryany [Tue, 5 May 2015 01:42:55 +0000 (01:42 +0000)]
[lib/Fuzzer] use handle_abort=1 by default so that when assert() fires we save the test case

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236476 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[Orc] Revert r236465 - It broke the Windows bots.
Lang Hames [Mon, 4 May 2015 23:30:01 +0000 (23:30 +0000)]
[Orc] Revert r236465 - It broke the Windows bots.

Looks like the usual missing explicit move-constructor issue with MSVC. I should
have a fix shortly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236472 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[X86] Fix assertion while DAG combining offsets and ExternalSymbols
Reid Kleckner [Mon, 4 May 2015 23:22:36 +0000 (23:22 +0000)]
[X86] Fix assertion while DAG combining offsets and ExternalSymbols

ExternalSymbol nodes do not contain offsets, unlike GlobalValue nodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236471 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[ARM] IT block insertion needs to update kill flags
Pete Cooper [Mon, 4 May 2015 22:44:47 +0000 (22:44 +0000)]
[ARM] IT block insertion needs to update kill flags

When forming an IT block from the first MOV here:

%R2<def> = t2MOVr %R0, pred:1, pred:%CPSR, opt:%noreg
%R3<def> = tMOVr %R0<kill>, pred:14, pred:%noreg

the move in to R3 is moved out of the IT block so that later instructions on the same predicate can be inside this block, and we can share the IT instruction.

However, when moving the R3 copy out of the IT block, we need to clear its kill flags for anything in use at this point in time, ie, R0 here.

This appeases the machine verifier which thought that R0 wasn't defined when used.

I have a test case, but its extremely register allocator specific.  It would be too fragile to commit a test which depends on the register allocator here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236468 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAdd TransformUtils dependency to lli.
Pete Cooper [Mon, 4 May 2015 22:33:39 +0000 (22:33 +0000)]
Add TransformUtils dependency to lli.

After r236465, Orc uses ValueMaterializer and so needs to link against TransformUtils to get the ValueMaterializer::anchor().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236467 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[Orc] Refactor the compile-on-demand layer to make module partitioning lazy,
Lang Hames [Mon, 4 May 2015 22:03:10 +0000 (22:03 +0000)]
[Orc] Refactor the compile-on-demand layer to make module partitioning lazy,
and avoid cloning unused decls into every partition.

Module partitioning showed up as a source of significant overhead when I
profiled some trivial test cases. Avoiding the overhead of partitionging
for uncalled functions helps to mitigate this.

This change also means that it is no longer necessary to have a
LazyEmittingLayer underneath the CompileOnDemand layer, since the
CompileOnDemandLayer will not extract or emit function bodies until they are
called.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236465 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoVim: Fix some bugs in llvm indent plugin.
Matthias Braun [Mon, 4 May 2015 21:41:25 +0000 (21:41 +0000)]
Vim: Fix some bugs in llvm indent plugin.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236464 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoVim: Set filetype=python for lit configuration files.
Matthias Braun [Mon, 4 May 2015 21:41:23 +0000 (21:41 +0000)]
Vim: Set filetype=python for lit configuration files.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236463 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoDocument some of the options in test/lit.cfg
Matthias Braun [Mon, 4 May 2015 21:37:00 +0000 (21:37 +0000)]
Document some of the options in test/lit.cfg

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236462 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoLit: Allow overriding llvm tool paths+arguments, make -D an alias for --param
Matthias Braun [Mon, 4 May 2015 21:36:36 +0000 (21:36 +0000)]
Lit: Allow overriding llvm tool paths+arguments, make -D an alias for --param

These changes allow usages where you want to pass an additional
commandline option to all invocations of a specific llvm tool. Example:

> llvm-lit -Dllc=llc -enable-misched -verify-machineinstrs

Differential Revision: http://reviews.llvm.org/D9487

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236461 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agozap windows line endings; NFC
Sanjay Patel [Mon, 4 May 2015 21:27:27 +0000 (21:27 +0000)]
zap windows line endings; NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236460 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoCodeGen: match up correct insertvalue indices when assessing tail calls.
Tim Northover [Mon, 4 May 2015 20:41:51 +0000 (20:41 +0000)]
CodeGen: match up correct insertvalue indices when assessing tail calls.

When deciding whether a value comes from the aggregate or inserted value of an
insertvalue instruction, we compare the indices against those of the location
we're interested in. One of the lists needs reversing because the input data is
backwards (so that modifications take place at the end of the SmallVector), but
we were reversing both before leading to incorrect results.

Should fix PR23408

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236457 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoYAML: Add an optional 'flow' field to the mapping trait to allow flow mapping output.
Alex Lorenz [Mon, 4 May 2015 20:11:40 +0000 (20:11 +0000)]
YAML: Add an optional 'flow' field to the mapping trait to allow flow mapping output.

This patch adds an optional 'flow' field to the MappingTrait
class so that yaml IO will be able to output flow mappings.

Reviewers: Justin Bogner

Differential Revision: http://reviews.llvm.org/D9450

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236456 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRespect object format choice on Darwin
Keno Fischer [Mon, 4 May 2015 20:03:01 +0000 (20:03 +0000)]
Respect object format choice on Darwin

Summary:
The object format can be set to something other than MachO, e.g.
to use ELF-on-Darwin for MCJIT. This already works on Windows, so
there's no reason it shouldn't on Darwin.

Reviewers: lhames, grosbach

Subscribers: rafael, grosbach, t.p.northover, llvm-commits

Differential Revision: http://reviews.llvm.org/D6185

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236455 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix -Wmicrosoft warning by making enum unsigned
Reid Kleckner [Mon, 4 May 2015 18:21:35 +0000 (18:21 +0000)]
Fix -Wmicrosoft warning by making enum unsigned

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236436 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[IR/Diagnostic] Assert that DebugLoc is valid before accessing.
Davide Italiano [Mon, 4 May 2015 18:08:35 +0000 (18:08 +0000)]
[IR/Diagnostic] Assert that DebugLoc is valid before accessing.

PR: 23380
Differential Revision: http://reviews.llvm.org/D9464
Reviewed by: dexonsmith

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236435 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoOption parsing: properly handle flag aliases for joined options (PR23394)
Hans Wennborg [Mon, 4 May 2015 18:00:13 +0000 (18:00 +0000)]
Option parsing: properly handle flag aliases for joined options (PR23394)

A joined option always needs to have an argument, even if it's an empty one.

Clang would previously assert when trying to use --extra-warnings, which is
a flag alias for -W, which is a joined option.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236434 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[SystemZ] Reclassify f32 subregs of f64 registers
Ulrich Weigand [Mon, 4 May 2015 17:41:22 +0000 (17:41 +0000)]
[SystemZ] Reclassify f32 subregs of f64 registers

At the moment, all subregs defined by the SystemZ target can be modified
independently of the wider register.  E.g. writing to a GR32 does not
change the upper 32 bits of the GR64.  Writing to an FP32 does not change
the lower 32 bits of the FP64.

Hoewver, the upcoming support for the vector extension redefines FP64 as
one half of a V128.  Floating-point operations leave the other half of
a V128 in an unpredictable state, so it's no longer the case that writing
to an FP32 leaves the bits of the underlying register (the V128) alone.
I'd prefer to have separate subreg_ names for this situation, so that
it's obvious at a glance whether we're talking about a subreg that leaves
the other parts of the register alone.

No behavioral change intended.

Patch originally by Richard Sandiford.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236433 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[SystemZ] Clean up AsmParser isMem() handling
Ulrich Weigand [Mon, 4 May 2015 17:40:53 +0000 (17:40 +0000)]
[SystemZ] Clean up AsmParser isMem() handling

We know what MemoryKind an operand has at the time we construct it,
so we might as well just record it in an unused part of the structure.
This makes it easier to add scatter/gather addresses later.

No behavioral change intended.

Patch originally by Richard Sandiford.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236432 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[SystemZ] Fix getTargetNodeName
Ulrich Weigand [Mon, 4 May 2015 17:39:40 +0000 (17:39 +0000)]
[SystemZ] Fix getTargetNodeName

It seems SystemZTargetLowering::getTargetNodeName got out of sync with
some recent changes to the SystemZISD opcode list.  Add back all the
missing opcodes (and re-sort to the same order as SystemISelLowering.h).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236430 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoScheduleDAGInstrs should toggle kill flags on bundled instrs.
Pete Cooper [Mon, 4 May 2015 16:52:06 +0000 (16:52 +0000)]
ScheduleDAGInstrs should toggle kill flags on bundled instrs.

ScheduleDAGInstrs wasn't setting or clearing the kill flags on instructions inside bundles.  This led to code such as this

%R3<def> = t2ANDrr %R0
BUNDLE %ITSTATE<imp-def,dead>, %R0<imp-use,kill>
  t2IT 1, 24, %ITSTATE<imp-def>
  R6<def,tied6> = t2ORRrr %R0<kill>, ...

being transformed to

BUNDLE %ITSTATE<imp-def,dead>, %R0<imp-use>
  t2IT 1, 24, %ITSTATE<imp-def>
  R6<def,tied6> = t2ORRrr %R0<kill>, ...
%R3<def> = t2ANDrr %R0<kill>

where the kill flag was removed from the BUNDLE instruction, but not the t2ORRrr inside it.  The verifier then thought that
R0 was undefined when read by the AND.

This change make the toggleKillFlags method also check for bundles and toggle flags on bundled instructions.
Setting the kill flag is special cased as we only want to set the kill flag on the last instruction in the bundle.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236428 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600/SI: Code cleanup
Tom Stellard [Mon, 4 May 2015 16:45:08 +0000 (16:45 +0000)]
R600/SI: Code cleanup

This is a follow-up to r236004

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236427 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAVX-512: added a test for encoding
Elena Demikhovsky [Mon, 4 May 2015 12:59:15 +0000 (12:59 +0000)]
AVX-512: added a test for encoding
by Asaf Badouh (asaf.badouh@intel.com)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236421 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAVX-512: added calling convention for i1 vectors in 32-bit mode.
Elena Demikhovsky [Mon, 4 May 2015 12:40:50 +0000 (12:40 +0000)]
AVX-512: added calling convention for i1 vectors in 32-bit mode.
Fixed some bugs in extend/truncate for AVX-512 target.
Removed VBROADCASTM (masked broadcast) node, since it is not used any more.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236420 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAVX-512: added integer "add" and "sub" instructions with saturation for SKX
Elena Demikhovsky [Mon, 4 May 2015 12:35:55 +0000 (12:35 +0000)]
AVX-512: added integer "add" and "sub" instructions with saturation for SKX
with intrinsics and tests

by Asaf Badouh (asaf.badouh@intel.com)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236418 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAVX-512: enabled tests for AVX512F set
Elena Demikhovsky [Mon, 4 May 2015 11:09:41 +0000 (11:09 +0000)]
AVX-512: enabled tests for AVX512F set

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236416 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoAVX-512: Added VPACK* instructions forms for KNL and SKX
Elena Demikhovsky [Mon, 4 May 2015 09:14:02 +0000 (09:14 +0000)]
AVX-512: Added VPACK* instructions forms for KNL and SKX
and their intrinsics
by Asaf Badouh (asaf.badouh@intel.com)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236414 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoReplace windows_error calls with mapWindowsError.
Yaron Keren [Mon, 4 May 2015 04:48:10 +0000 (04:48 +0000)]
Replace windows_error calls with mapWindowsError.

After r210687, windows_error does nothing but call mapWindowsError.
Other Windows/*.inc files directly call mapWindowsError. This patch
updates Path.inc and Process.inc to do the same.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236409 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agollvm-cov: Warn if object file is newer than profile
Justin Bogner [Mon, 4 May 2015 04:09:38 +0000 (04:09 +0000)]
llvm-cov: Warn if object file is newer than profile

Looking at coverage with an out of date profile can be confusing.
Provide a little hint that something might be wrong.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236408 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoDeprecate in-source autotools builds
Jonathan Roelofs [Mon, 4 May 2015 02:04:54 +0000 (02:04 +0000)]
Deprecate in-source autotools builds

This is a followup from:
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20150323/268067.html

Upgrade instructions:
  $ mv llvm/include/llvm/Config/config.h ./config.h.BACKUP
  # copy the configure line from line 7 of llvm/config.log
  # (for example: `$ ./configure --no-create --no-recursion`)
  $ mkdir build
  $ cd build
  # run the configure line, but this time with '../llvm' at the beginning:
  $ ../llvm/configure --no-create --no-recursion

These warnings will soon be turned into hard errors after a week.  Speak up now
if this is going to be a problem for you.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236399 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[TableGen] Replace 'static_cast' with 'cast'.
Craig Topper [Mon, 4 May 2015 01:35:42 +0000 (01:35 +0000)]
[TableGen] Replace 'static_cast' with 'cast'.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236398 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[TableGen] Formatting cleanup. Mostly removing trailing whitespace and unnecessary...
Craig Topper [Mon, 4 May 2015 01:35:39 +0000 (01:35 +0000)]
[TableGen] Formatting cleanup. Mostly removing trailing whitespace and unnecessary curly braces. NFC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236397 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMasked gather and scatter intrinsics - enabled codegen for KNL.
Elena Demikhovsky [Sun, 3 May 2015 07:12:25 +0000 (07:12 +0000)]
Masked gather and scatter intrinsics - enabled codegen for KNL.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236394 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix typo in comment.
Nico Weber [Sat, 2 May 2015 21:34:39 +0000 (21:34 +0000)]
Fix typo in comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236392 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[SSE2] Minor tidyup of v16i8 SHL lowering. NFC.
Simon Pilgrim [Sat, 2 May 2015 14:42:43 +0000 (14:42 +0000)]
[SSE2] Minor tidyup of v16i8 SHL lowering. NFC.

Removed code that was replicating v8i16 'shift + mask' implementation that is done more nicely by making use of LowerScalarImmediateShift

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236388 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[DAGCombiner] Enabled vector float/double -> int constant folding
Simon Pilgrim [Sat, 2 May 2015 13:04:07 +0000 (13:04 +0000)]
[DAGCombiner] Enabled vector float/double -> int constant folding

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236387 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoLine ending fix
Simon Pilgrim [Sat, 2 May 2015 11:50:47 +0000 (11:50 +0000)]
Line ending fix

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236386 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[SSE] Added vector int (i32 and i64) -> float/double conversion tests
Simon Pilgrim [Sat, 2 May 2015 11:42:47 +0000 (11:42 +0000)]
[SSE] Added vector int (i32 and i64) -> float/double conversion tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236385 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[SSE] Added vector float/double -> i32 and i64 conversion tests
Simon Pilgrim [Sat, 2 May 2015 11:18:47 +0000 (11:18 +0000)]
[SSE] Added vector float/double -> i32 and i64 conversion tests

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236384 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoDebugInfo: Use low_pc relative debug_ranges under fission when the CU has a low_pc
David Blaikie [Sat, 2 May 2015 02:31:49 +0000 (02:31 +0000)]
DebugInfo: Use low_pc relative debug_ranges under fission when the CU has a low_pc

Seems we were setting the base address on the wrong DwarfCompileUnit
object so it wasn't being used when generating the ranges.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236377 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRework test to use FileCheck by making sure we have no xmm registers
Eric Christopher [Sat, 2 May 2015 01:06:17 +0000 (01:06 +0000)]
Rework test to use FileCheck by making sure we have no xmm registers
with numbers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236373 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMC: Tidy up comments and clean up formatting a bit. NFC.
Jim Grosbach [Sat, 2 May 2015 00:44:14 +0000 (00:44 +0000)]
MC: Tidy up comments and clean up formatting a bit. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236368 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix spelling.
Jim Grosbach [Sat, 2 May 2015 00:44:07 +0000 (00:44 +0000)]
Fix spelling.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236367 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert "[WinEH] Add an EH registration and state insertion pass for 32-bit x86"
Reid Kleckner [Fri, 1 May 2015 22:50:14 +0000 (22:50 +0000)]
Revert "[WinEH] Add an EH registration and state insertion pass for 32-bit x86"

This reverts commit r236359. Things are still broken despite testing. :(

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236360 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRe-land "[WinEH] Add an EH registration and state insertion pass for 32-bit x86"
Reid Kleckner [Fri, 1 May 2015 22:40:25 +0000 (22:40 +0000)]
Re-land "[WinEH] Add an EH registration and state insertion pass for 32-bit x86"

This reverts commit r236340.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236359 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[Hexagon] r236351 fix does not work on builder configurations yet.
Colin LeMahieu [Fri, 1 May 2015 22:39:20 +0000 (22:39 +0000)]
[Hexagon] r236351 fix does not work on builder configurations yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236358 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[AArch64][FastISel] Variant of the logical instructions that use two input
Quentin Colombet [Fri, 1 May 2015 21:34:57 +0000 (21:34 +0000)]
[AArch64][FastISel] Variant of the logical instructions that use two input
registers cannot write on SP.

rdar://problem/20748715

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236352 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[Hexagon] Removing variable unused in release.
Colin LeMahieu [Fri, 1 May 2015 21:30:22 +0000 (21:30 +0000)]
[Hexagon] Removing variable unused in release.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236351 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[Hexagon] Adding expression MC emission and removing XFAIL from test that hits this...
Colin LeMahieu [Fri, 1 May 2015 21:14:21 +0000 (21:14 +0000)]
[Hexagon] Adding expression MC emission and removing XFAIL from test that hits this code path.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236348 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[AArch64][FastISel] Fix the setting of kill flags for MUL -> UMULH sequences.
Quentin Colombet [Fri, 1 May 2015 20:57:11 +0000 (20:57 +0000)]
[AArch64][FastISel] Fix the setting of kill flags for MUL -> UMULH sequences.

rdar://problem/20748715

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236346 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix compilation of PDBApiTest.
Zachary Turner [Fri, 1 May 2015 20:51:49 +0000 (20:51 +0000)]
Fix compilation of PDBApiTest.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236345 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix build.
Zachary Turner [Fri, 1 May 2015 20:33:10 +0000 (20:33 +0000)]
Fix build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236343 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[llvm-pdbdump] Support dynamic load address and external symbols.
Zachary Turner [Fri, 1 May 2015 20:24:26 +0000 (20:24 +0000)]
[llvm-pdbdump] Support dynamic load address and external symbols.

This patch adds the --load-address command line option to
llvm-pdbdump, which dumps all addresses assuming the module has
loaded at the specified address.

Additionally, this patch adds an option to llvm-pdbdump to support
dumping of public symbols (i.e. symbols with external linkage).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236342 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoReapply [RuntimeDyldELF] Fold Placeholder into Addend
Keno Fischer [Fri, 1 May 2015 20:21:45 +0000 (20:21 +0000)]
Reapply [RuntimeDyldELF] Fold Placeholder into Addend

This reapplies r235060 and 235070, which were reverted because of test failures
in LLDB. The failure was caused because at  moment RuntimeDyld is processing
relocations for all sections, irrespective of whether we actually load them
into memory or not, but RuntimeDyld was not actually remembering where in memory
the unrelocated section is. This commit includes a fix for that issue by
remembering that pointer, though the longer term fix should be to stop processing
unneeded sections.

Original Summary:

This allows us to get rid of the original unrelocated object file after
we're done processing relocations (but before applying them).
MachO and COFF already do not require this (currently we have temporary hacks
to prevent ownership from being released, but those are brittle and should be
removed soon).

The placeholder mechanism allowed the relocation resolver to look at original
object file to obtain more information that are required to apply the
relocations. This is usually necessary in two cases:

- For relocations targetting sub-word memory locations, there may be pieces
  of the instruction at the target address which we should not override.
- Some relocations on some platforms allow an extra addend to be encoded in
  their immediate fields.

The problem is that in the second case the information cannot be recovered
after the relocations have been applied once because they will have been
overridden. In the first case we also need to be careful to not use any bits
that aren't fixed and may have been overriden by applying a first relocation.

In the past both have been fixed by just looking at original object file. This
patch attempts to recover the information from the first by looking at the
relocated object file, while the extra addend in the second case is read
upon relocation processing and addend to the regular addend.

I have tested this on X86. Other platforms represent my best understanding
of how those relocations should work, but I may have missed something because
I do not have access to those platforms.
We will keep the ugly workarounds in place for a couple of days, so this commit
can be reverted if it breaks the bots.

Differential Revision: http://reviews.llvm.org/D9028

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236341 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRevert "[WinEH] Add an EH registration and state insertion pass for 32-bit x86"
Reid Kleckner [Fri, 1 May 2015 20:14:04 +0000 (20:14 +0000)]
Revert "[WinEH] Add an EH registration and state insertion pass for 32-bit x86"

This reverts commit r236339, it breaks the win32 clang-cl self-host.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236340 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[WinEH] Add an EH registration and state insertion pass for 32-bit x86
Reid Kleckner [Fri, 1 May 2015 20:04:54 +0000 (20:04 +0000)]
[WinEH] Add an EH registration and state insertion pass for 32-bit x86

This pass is responsible for constructing the EH registration object
that gets linked into fs:00, which is all it does in this change. In the
future, it will also insert stores to update the EH state number.

I considered keeping this functionality in WinEHPrepare, but it's pretty
separable and X86 specific. It has conceptually very little to do with
the task of WinEHPrepare, which is currently outlining.  WinEHPrepare is
also in theory useful on ARM, but this logic is pretty x86 specific.

Reviewers: andrew.w.kaylor, majnemer

Differential Revision: http://reviews.llvm.org/D9422

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236339 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[ARM] Transfer the internal flag in thumb2 size reduction.
Pete Cooper [Fri, 1 May 2015 18:57:32 +0000 (18:57 +0000)]
[ARM] Transfer the internal flag in thumb2 size reduction.

Converting from t2LDRs to tLDRr caused the shift argument to drop the internal flag.  This would then throw machine verifier errors.

Unfortunately i'm having trouble reducing a test case.  I'm going to keep trying, but so far its a scary combination of machine sinking, an 'and i1', loads feeding loads, and a bunch of code which shouldn't change IT block formation, but does.  Its not useful to commit a test in that state as we have no way of knowing if it even hits this code reliably in future.

rdar://problem/20752113

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236333 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoMove unit test into anonymous namespace as per convention.
Douglas Katzman [Fri, 1 May 2015 18:51:06 +0000 (18:51 +0000)]
Move unit test into anonymous namespace as per convention.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236332 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoYAML: Fix the output of sequences that contain flow sequences.
Alex Lorenz [Fri, 1 May 2015 18:34:25 +0000 (18:34 +0000)]
YAML: Fix the output of sequences that contain flow sequences.

This patch fixes a bug where the YAML Output class emitted
a sequence of flow sequences without the '-' characters.
Before:

  seq:
    [ a, b ]
    [ c, d ]

After:

  seq:
    - [ a, b ]
    - [ c, d ]

Reviewers: Justin Bogner

Differential Revision: http://reviews.llvm.org/D9206

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236329 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoUpdate YamlIO documentation for the ScalarTraits class.
Alex Lorenz [Fri, 1 May 2015 18:20:23 +0000 (18:20 +0000)]
Update YamlIO documentation for the ScalarTraits class.

This patch adds the missing context parameter to the
input and output methods in ScalarTraits.

Differential Revision: http://reviews.llvm.org/D9173

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236328 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoARM: Align functions containing Thumb-2 jump tables to 4 bytes.
Peter Collingbourne [Fri, 1 May 2015 18:05:59 +0000 (18:05 +0000)]
ARM: Align functions containing Thumb-2 jump tables to 4 bytes.

Functions with jump tables need an alignment of 4 because they use the ADR
instruction, which aligns the PC to 4 bytes before adding an offset.

Differential Revision: http://reviews.llvm.org/D9424

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236327 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix infinite recursion in ScaledNumber::toInt.
Diego Novillo [Fri, 1 May 2015 17:59:15 +0000 (17:59 +0000)]
Fix infinite recursion in ScaledNumber::toInt.

Patch from dexonsmith. The call to toInt() was calling compareTo() which
in some cases would call back to toInt(), creating an infinite loop.

Fixed by simplifying the logic in compareTo() to avoid the co-recursion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236326 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[Sparc] Repair fixups in little endian mode.
James Y Knight [Fri, 1 May 2015 17:13:02 +0000 (17:13 +0000)]
[Sparc] Repair fixups in little endian mode.

Differential Revision: http://reviews.llvm.org/D9434

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236324 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoFix omission from adding sparcel (original http://reviews.llvm.org/D9263)
Douglas Katzman [Fri, 1 May 2015 16:49:58 +0000 (16:49 +0000)]
Fix omission from adding sparcel (original reviews.llvm.org/D9263)

"obviously" it needs to go in parseArch *and* getArchTypeForLLVMName.

Differential Revision: http://reviews.llvm.org/D9436

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236322 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemove std::move on return of temporary.
Benjamin Kramer [Fri, 1 May 2015 15:26:22 +0000 (15:26 +0000)]
Remove std::move on return of temporary.

No functionality change. Found by -Wpessimizing-move.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236318 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemove std::move on return of temporary.
Benjamin Kramer [Fri, 1 May 2015 15:25:29 +0000 (15:25 +0000)]
Remove std::move on return of temporary.

No functionality change. Found by -Wpessimizing-move.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236317 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoRemove std::move on return when it could prevent copy elision.
Benjamin Kramer [Fri, 1 May 2015 15:16:11 +0000 (15:16 +0000)]
Remove std::move on return when it could prevent copy elision.

Found by -Wpessimizing-move, no functional change. The APFloat and
PassManager change doesn't affect codegen as returning a by-value
argument will always result in a move.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236316 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[mips] [IAS] Fix error messages for using LI with 64-bit immediates.
Toma Tabacu [Fri, 1 May 2015 12:19:27 +0000 (12:19 +0000)]
[mips] [IAS] Fix error messages for using LI with 64-bit immediates.

Summary:
LI should never accept immediates larger than 32 bits.
The additional Is32BitImm boolean also paves the way for unifying the functionality that LA and LI have in common.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9289

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236313 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[CMake] Also search for prefixed versions of ld.gold
Niels Ole Salscheider [Fri, 1 May 2015 11:58:30 +0000 (11:58 +0000)]
[CMake] Also search for prefixed versions of ld.gold

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236312 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[mips] [IAS] Slightly improve shift instruction generation in expandLoadImm.
Toma Tabacu [Fri, 1 May 2015 10:26:47 +0000 (10:26 +0000)]
[mips] [IAS] Slightly improve shift instruction generation in expandLoadImm.

Summary:
Generate one DSLL32 of 0 instead of two consecutive DSLL of 16.
In order to do this I had to change createLShiftOri's template argument from a bool to an unsigned.

This also gave me the opportunity to rewrite the mips64-expansions.s test, as it was testing the same cases multiple times and skipping over other cases.
It was also somewhat unreadable, as the CHECK lines were grouped in a huge block of text at the beginning of the file.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8974

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236311 91177308-0d34-0410-b5e6-96231b3b80d8

9 years ago[SelectionDAG] Unary vector constant folding integer legality fixes
Simon Pilgrim [Fri, 1 May 2015 08:20:04 +0000 (08:20 +0000)]
[SelectionDAG] Unary vector constant folding integer legality fixes

This patch fixes issues with vector constant folding not correctly handling scalar input operands if they require implicit truncation - this was tested with llvm-stress as recommended by Patrik H Hagglund.

The patch ensures that integer input scalars from a build vector are correctly truncated before folding, and that constant integer scalar results are promoted to a legal type before inclusion in the new folded build vector.

I have added another crash test case and also a test for UINT_TO_FP / SINT_TO_FP using an non-truncated scalar input, which was failing before this patch.

Differential Revision: http://reviews.llvm.org/D9282

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236308 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600/SI: Add VCC as an implict def of SI_KILL
Tom Stellard [Fri, 1 May 2015 03:44:09 +0000 (03:44 +0000)]
R600/SI: Add VCC as an implict def of SI_KILL

When SI_KILL has a register operand, its lowered form writes to vcc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236307 91177308-0d34-0410-b5e6-96231b3b80d8

9 years agoR600/SI: Fix verifier errors from the SIAnnotateControlFlow pass
Tom Stellard [Fri, 1 May 2015 03:44:08 +0000 (03:44 +0000)]
R600/SI: Fix verifier errors from the SIAnnotateControlFlow pass

This pass was generating 'Instruction does not dominate all uses!'
errors for programs which had loops with a condition variable that
depended on the result of a phi instruction from outside of the loop.

The pass was inserting new phi nodes outside of the loop which used values
defined inside the loop.

http://bugs.freedesktop.org/show_bug.cgi?id=90056

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236306 91177308-0d34-0410-b5e6-96231b3b80d8