Hal Finkel [Fri, 19 Sep 2014 11:42:56 +0000 (11:42 +0000)]
Optionally enable more-aggressive FMA formation in DAGCombine
The heuristic used by DAGCombine to form FMAs checks that the FMUL has only one
use, but this is overly-conservative on some systems. Specifically, if the FMA
and the FADD have the same latency (and the FMA does not compete for resources
with the FMUL any more than the FADD does), there is no need for the
restriction, and furthermore, forming the FMA leaving the FMUL can still allow
for higher overall throughput and decreased critical-path length.
Here we add a new TLI callback, enableAggressiveFMAFusion, false by default, to
elide the hasOneUse check. This is enabled for PowerPC by default, as most
PowerPC systems will benefit.
Patch by Olivier Sallenave, thanks!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218120
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Chandler Carruth [Fri, 19 Sep 2014 09:45:21 +0000 (09:45 +0000)]
[x86] Recognize that we can use duplication to widen v16i8 shuffles due
to undef lanes as well as defined widenable lanes. This dramatically
improves the lowering we use for undef-shuffles in a zext-ish pattern
for SSE2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218115
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Chandler Carruth [Fri, 19 Sep 2014 08:51:06 +0000 (08:51 +0000)]
[x86] Actually test the SSE2 lowering for most of the zext-ish shuffles.
Not sure why I only did SSSE3 here. Also, I've left out some of the SSE2
ones because the shuffles are so absurd it's not worth transcribing
them. Will try to fix them to be sane and then check them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218114
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Chandler Carruth [Fri, 19 Sep 2014 08:37:44 +0000 (08:37 +0000)]
[x86] Teach the new vector shuffle lowering to also use pmovzx for v4i32
shuffles that are zext-ing.
Not a lot to see here; the undef lane variant is better handled with
pshufd, but this improves the actual zext pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218112
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Justin Bogner [Fri, 19 Sep 2014 08:13:16 +0000 (08:13 +0000)]
llvm-cov: Fix dropped lines when filters were applied
Uncovered lines in the middle of a covered region weren't being shown
when filtering to a particular function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218109
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Justin Bogner [Fri, 19 Sep 2014 08:13:12 +0000 (08:13 +0000)]
llvm-cov: Generalize -filename-equivalence
The filename-equivalence flag allows you to show coverage when your
source files don't have the same full paths as those that generated
the data. This is mostly useful for writing tests in a cross-platform
way.
This wasn't triggering in cases where the filename was derived
directly from the coverage data, which meant certain types of test
case were impossible to write. This patch fixes that, and following
patches involve tests that need this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218108
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Chandler Carruth [Fri, 19 Sep 2014 06:07:49 +0000 (06:07 +0000)]
[x86] Add a dedicated lowering path for zext-compatible vector shuffles
to the new vector shuffle lowering code.
This allows us to emit PMOVZX variants consistently for patterns where
it is a viable lowering. This instruction is both fast and allows us to
fold loads into it. This only hooks the new lowering up for i16 and i8
element widths, mostly so I could manage the change to the tests. I'll
add the i32 one next, although it is significantly less interesting.
One thing to note is that we already had some tests for these patterns
but those tests had far less horrible instructions. The problem is that
those tests weren't checking the strict start and end of the instruction
sequence. =[ As a consequence something changed in the lowering making
us generate *TERRIBLE* code for these patterns in SSE2 through SSSE3.
I've consolidated all of the tests and spelled out the madness that we
currently emit for these shuffles. I'm going to try to figure out what
has gone wrong here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218102
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Jiangning Liu [Fri, 19 Sep 2014 05:30:35 +0000 (05:30 +0000)]
Optimize sext/zext insertion algorithm in back-end.
With this optimization, we will not always insert zext for values crossing
basic blocks, but insert sext if the users of a value crossing basic block
has preference of sign predicate.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218101
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David Blaikie [Fri, 19 Sep 2014 04:55:05 +0000 (04:55 +0000)]
Omit DW_AT_frame_base under -gmlt for size
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218100
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David Blaikie [Fri, 19 Sep 2014 04:47:46 +0000 (04:47 +0000)]
Describe the -gmlt optimization committed in the previous revision.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218099
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David Blaikie [Fri, 19 Sep 2014 04:30:36 +0000 (04:30 +0000)]
Omit all the extra static attributes on subprograms in -gmlt
This omission will be done in a fancier manner once we're dealing with
"put gmlt in the skeleton CUs under fission" - it'll have to be
conditional on the kind of CU we're emitting into (skeleton or gmlt).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218098
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Hans Wennborg [Fri, 19 Sep 2014 01:14:56 +0000 (01:14 +0000)]
Fix an it's vs. its typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218093
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Matt Arsenault [Fri, 19 Sep 2014 00:42:06 +0000 (00:42 +0000)]
R600: Better fix for bug 20982
Just do the left shift as unsigned to avoid the UB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218092
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Chandler Carruth [Fri, 19 Sep 2014 00:30:24 +0000 (00:30 +0000)]
[x86] Extend this test to cover SSE4.1. Nothing interesting here, but
paves the way for subsequent changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218091
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Peter Collingbourne [Thu, 18 Sep 2014 22:56:00 +0000 (22:56 +0000)]
Try to fix i686-cygming bots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218086
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Matt Arsenault [Thu, 18 Sep 2014 22:28:56 +0000 (22:28 +0000)]
Use cast<> instead of unchecked dyn_cast<>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218085
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Peter Collingbourne [Thu, 18 Sep 2014 21:54:02 +0000 (21:54 +0000)]
Fix sphinx warning.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218081
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Peter Collingbourne [Thu, 18 Sep 2014 21:28:49 +0000 (21:28 +0000)]
LTO: introduce object file-based on-disk module format.
This format is simply a regular object file with the bitcode stored in a
section named ".llvmbc", plus any number of other (non-allocated) sections.
One immediate use case for this is to accommodate compilation processes
which expect the object file to contain metadata in non-allocated sections,
such as the ".go_export" section used by some Go compilers [1], although I
imagine that in the future we could consider compiling parts of the module
(such as large non-inlinable functions) directly into the object file to
improve LTO efficiency.
[1] http://golang.org/doc/install/gccgo#Imports
Differential Revision: http://reviews.llvm.org/D4371
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218078
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Quentin Colombet [Thu, 18 Sep 2014 21:17:50 +0000 (21:17 +0000)]
[ARM] Do not perform a tail call when the caller returns several values.
The fix is slightly different then x86 (see r216117) because the number of values
attached to a return can vary even for a single returned value (e.g., f64 yields
two returned values).
<rdar://problem/
18352998>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218076
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Justin Bogner [Thu, 18 Sep 2014 20:31:26 +0000 (20:31 +0000)]
llvm-cov: Simplify FunctionInstantiationSetCollector (NFC)
- Replace std::unordered_map with DenseMap
- Use std::pair instead of manually combining two unsigneds
- Assert if insert is called with invalid arguments
- Avoid an unnecessary copy of a std::vector
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218074
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Robin Morisset [Thu, 18 Sep 2014 18:56:04 +0000 (18:56 +0000)]
Restore "[ARM, Fix] Fix emitLeading/TrailingFence on old ARM processors"
Summary:
This patch was originally in D5304 (I could not find a way to reopen that revision).
It was accepted, commited and broke the build bots because the overloading of
the constructor of ArrayRef for braced initializer lists is not supported by all
toolchains. I then reverted it, and propose this fixed version that uses a plain
C array instead in makeDMB (that array is then converted implicitly to an
ArrayRef, but that is not behind an ifdef). Could someone confirm me whether
initialization lists for plain C arrays are supported by every toolchain used
to build llvm ? Otherwise I can just initialize the array in the old way:
args[0] = ...; .. ; args[5] = ...;
Below is the description of the original patch:
```
I had only tested this code for ARMv7 and ARMv8. This patch adds several
fallback paths if the processor does not support dmb ish:
- dmb sy if a cortex-M with support for dmb
- mcr p15, #0, r0, c7, c10, #5 for ARMv6 (special instruction equivalent to a DMB)
These fallback paths were chosen based on the code for fence seq_cst.
Thanks to luqmana for having noticed this bug.
```
Test Plan: Added more cases to atomic-load-store.ll + make check-all
Reviewers: jfb, t.p.northover, luqmana
Subscribers: llvm-commits, aemerson
Differential Revision: http://reviews.llvm.org/D5386
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218066
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Aaron Ballman [Thu, 18 Sep 2014 17:34:23 +0000 (17:34 +0000)]
Reverting NFC changes from r218050. Instead, the warning was disabled for GCC in r218059, so these changes are no longer required.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218062
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Lang Hames [Thu, 18 Sep 2014 16:43:24 +0000 (16:43 +0000)]
[MCJIT] Fix a debugging-output formatting bug in RuntimeDyld.
The mismatched mask (7 vs (ColsPerRow-1)) could lead to partial lines being
printed out of place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218061
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Frederic Riss [Thu, 18 Sep 2014 16:41:04 +0000 (16:41 +0000)]
Revert part of r218041.
The patch moved some logic around in an attempt to generate potentially more
DW_AT_declaration attributes. The patch was flawed though and it stopped
generating the attribute in some cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218060
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David Blaikie [Thu, 18 Sep 2014 16:34:25 +0000 (16:34 +0000)]
Disable GCC's -Woverloaded-virtual in the configure+make build. Clang's is better.
Turns out Clang's -Woverloaded-virtual is enabled by -Wall in both CMake
and Configure builds. We were only explicitly specifying it (thus
enabling GCC's version of the warning) in the Configure build.
The specific case of interest is:
struct base {
virtual void func();
virtual void func(int);
};
struct derived: base {
virtual void func(); // GCC warns here, because this causes
// func(int) to be hidden
};
I don't think that's worth getting fussed about (& Clang (indirectly
me... since I improved this warning in Clang) agrees or we would've made
the warning catch these cases.
Technically this could still lead to bugs/confusion if base had
func(int) and func(bool), derived overrode func(bool) and then a caller
with a derived object tried to call func(42) - it would silently call
func(bool). We should probably improve clang's warnings to catch this at
the call site at some point.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218059
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Matt Arsenault [Thu, 18 Sep 2014 15:52:26 +0000 (15:52 +0000)]
R600: Bug 20982 - Avoid undefined left shift of negative value
I'm not sure what the hardware actually does, so don't
bother trying to fold it for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218057
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Robert Khasanov [Thu, 18 Sep 2014 14:06:55 +0000 (14:06 +0000)]
[SKX] Deriving rmb multiclasses from general one (avx512_icmp_packed_rmb and avx512_icmp_cc_rmb).
Thanks Adam Nemet for notice about this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218051
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Aaron Ballman [Thu, 18 Sep 2014 13:27:14 +0000 (13:27 +0000)]
Fixing a bunch of -Woverloaded-virtual warnings due to hiding getSubtargetImpl from the base class. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218050
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Patrik Hagglund [Thu, 18 Sep 2014 11:52:57 +0000 (11:52 +0000)]
Alternative (to r216344) fix of gcc -Wpedantic.
As suggested by David Blaikie, this may be easier to read.
The original warning was:
../tools/llvm-cov/llvm-cov.cpp:53:49: error: ISO C++ forbids zero-size array 'argv' [-Werror=pedantic]
std::string Invocation(std::string(argv[0]) + " " + argv[1]);
It seems to be the case that GCC's warning gets confused and thinks
'argv' is a declaration here. GCC bugzilla issue #61259.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218048
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Frederic Riss [Thu, 18 Sep 2014 09:38:23 +0000 (09:38 +0000)]
Always emit DW_AT_declaration attribute when the variable isn't a definition.
Summary:
This doesn't show up today as we don't emit decalration only variables. This
will be tested when the followup patches implementing import of forward
declared entities lands in clang.
Reviewers: echristo, dblaikie, aprantl
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D5382
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218041
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Frederic Riss [Thu, 18 Sep 2014 09:38:15 +0000 (09:38 +0000)]
Fix DWARFUnitSection::getUnitForOffset().
The current code is only able to return the right unit if the passed offset
is the exact offset of a section. Generalize the search function by comparing
againt the offset of the next unit instead and by switching the search
algorithm to upper_bound.
This way, the unit returned is the first unit with a getNextUnitOffset()
strictly greater than the searched offset, which is exactly what we want.
Note that there is no need for testing the range of the resulting unit as
the offsets of a DWARFUnitSection are in a single contiguous range from
0 inclusive to lastUnit->getNextUnitOffset() exclusive.
Reviewers: dblaikie samsonov
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D5262
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218040
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Chandler Carruth [Thu, 18 Sep 2014 09:00:25 +0000 (09:00 +0000)]
[x86] Use PALIGNR for v4i32 and v2i64 blends when appropriate.
There is no purpose in using it for single-input shuffles as
pshufd is just as fast and doesn't tie the two operands. This removes
a substantial amount of wrong-domain blend operations in SSSE3 mode. It
also completes the usage of PALIGNR for integer shuffles and addresses
one of the test cases Quentin hit with the new vector shuffle lowering.
There is still the question of whether and when to use this for floating
point shuffles. It is faster than shufps or shufpd but in the integer
domain. I don't yet really have a good heuristic here for when to use
this instruction for floating point vectors.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218038
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Chandler Carruth [Thu, 18 Sep 2014 08:33:04 +0000 (08:33 +0000)]
[x86] Add an SSSE3 run and check mode to the 128-bit v2 tests of the new
vector shuffle lowering. This will be needed for up-coming palignr
tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218037
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Daniel Sanders [Thu, 18 Sep 2014 08:28:39 +0000 (08:28 +0000)]
[mips] Remove custom versions of CCState::AnalyzeReturn() and CCState::AnalyzeCallReturn().
Summary:
The N32/N64 ABI's return f128 values in $f0 and $f2 for hard-float and $v0 and
$a0 for soft-float. The registers used in the soft-float case differ from the
usual $v0, and $v1 specified for return values.
Both cases were previously handled by duplicating the CCState::AnalyzeReturn()
and CCState::AnalyzeCallReturn() functions and modifying them to delegate to
a different assignment function for f128 and further replace the register type
for the hard-float case. There is a simpler way to do both of these.
We now use the common functions and select an initial assignment function based
on whether the original type is f128 or not. We then handle the hard-float case
using CCBitConvertToType<>.
No functional change.
Reviewers: vmedic
Reviewed By: vmedic
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D5269
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218036
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Juergen Ributzka [Thu, 18 Sep 2014 08:07:40 +0000 (08:07 +0000)]
Revert "[FastISel][AArch64] Fold bit test and branch into TBZ and TBNZ."
Reverting it until I have time to investigate a regression.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218035
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Juergen Ributzka [Thu, 18 Sep 2014 07:26:26 +0000 (07:26 +0000)]
Fix previous commit: [FastISel][AArch64] Simplify XALU multiplies.
When folding the intrinsic flag into the branch or select we also have to
consider the fact if the intrinsic got simplified, because it changes the
flag we have to check for.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218034
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Juergen Ributzka [Thu, 18 Sep 2014 07:04:54 +0000 (07:04 +0000)]
[FastISel][AArch64] Simplify XALU multiplies.
Simplify {s|u}mul.with.overflow to {s|u}add.with.overflow when possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218033
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Juergen Ributzka [Thu, 18 Sep 2014 07:04:49 +0000 (07:04 +0000)]
[FastISel][AArch64] Followup commit for 218031 to handle negative offsets too.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218032
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Juergen Ributzka [Thu, 18 Sep 2014 05:40:47 +0000 (05:40 +0000)]
[FastISel][AArch64] Try to fold the offset into the add instruction when simplifying a memory address.
Small optimization in 'simplifyAddress'. When the offset cannot be encoded in
the load/store instruction, then we need to materialize the address manually.
The add instruction can encode a wider range of immediates than the load/store
instructions. This change tries to fold the offset into the add instruction
first before materializing the offset in a register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218031
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Juergen Ributzka [Thu, 18 Sep 2014 05:40:41 +0000 (05:40 +0000)]
[FastISel][AArch64] Fold 'AND' instruction during the address computation.
The 'AND' instruction could be used to mask out the lower 32 bits of a register.
If this is done inside an address computation we might be able to fold the
instruction into the memory instruction itself.
and x1, x1, #0xffffffff ---> ldrb x0, [x0, w1, uxtw]
ldrb x0, [x0, x1]
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218030
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Chandler Carruth [Thu, 18 Sep 2014 04:38:32 +0000 (04:38 +0000)]
[x86] Add an SSSE3 run to the v4 shuffle test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218028
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Saleem Abdulrasool [Thu, 18 Sep 2014 04:28:29 +0000 (04:28 +0000)]
ARM: prevent crash on ELF directives on COFF
Certain directives are unsupported on Windows (some of which could/should be
supported). We would not diagnose the use but rather crash during the emission
as we try to access the Target Streamer. Add an assertion to prevent creating a
NULL reference (which is not permitted under C++) as well as a test to ensure
that we can diagnose the disabled directives.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218014
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Chandler Carruth [Thu, 18 Sep 2014 04:11:29 +0000 (04:11 +0000)]
[x86] Initial step of teaching the new vector shuffle lowering about
PALIGNR. This just adds it to the v8i16 and v16i8 lowering steps where
it is completely unmatched. It also introduces the logic for detecting
rotation shuffle masks even in the presence of single input or blend
masks and arbitrarily undef lanes.
I've added fairly comprehensive tests for the matching logic in v8i16
because the tests at that size are much easier to write and manage.
I've not checked the SSE2 code generated for these tests because the
code is *horrible*. It is absolute madness. Testing it will just make
the test brittle without giving any interesting improvements in the
correctness confidence.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218013
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Saleem Abdulrasool [Thu, 18 Sep 2014 03:49:55 +0000 (03:49 +0000)]
ARM: use a more precise check for MachO
Rather than relying on support for a specific directive to determine if we are
targeting MachO, explicitly check the output format.
As an additional bonus, cleanup the caret diagnostic for the non-MachO case and
avoid the spurious error caused by not discarding the statement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218012
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Juergen Ributzka [Thu, 18 Sep 2014 02:44:13 +0000 (02:44 +0000)]
[FastISel][AArch64] Fold bit test and branch into TBZ and TBNZ.
Teach selectBranch to fold bit test and branch into a single instruction (TBZ or
TBNZ).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218010
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Eric Christopher [Thu, 18 Sep 2014 00:39:20 +0000 (00:39 +0000)]
Add file to CMake build as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218005
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Eric Christopher [Thu, 18 Sep 2014 00:34:14 +0000 (00:34 +0000)]
Add a new pass FunctionTargetTransformInfo. This pass serves as a
shim between the TargetTransformInfo immutable pass and the Subtarget
via the TargetMachine and Function. Migrate a single call from
BasicTargetTransformInfo as an example and provide shims where TargetMachine
begins taking a Function to determine the subtarget.
No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218004
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Samuel Antao [Wed, 17 Sep 2014 23:25:06 +0000 (23:25 +0000)]
Fix FastISel bug in boolean returns for PowerPC.
For PPC targets, FastISel does not take the sign extension information into account when selecting return instructions whose operands are constants. A consequence of this is that the return of boolean values is not correct. This patch fixes the problem by evaluating the sign extension information also for constants, forwarding this information to PPCMaterializeInt which takes this information to drive the sign extension during the materialization.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217993
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Samuel Antao [Wed, 17 Sep 2014 22:47:28 +0000 (22:47 +0000)]
Remove unnecessary blank space (test commit)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217991
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David Blaikie [Wed, 17 Sep 2014 22:27:36 +0000 (22:27 +0000)]
Reapply fix in r217988 (reverted in r217989) and remove the alternative fix committed in r217987.
This type isn't owned polymorphically (as demonstrated by making the
dtor protected and everything still compiling) so just address the
warning by protecting the base dtor and making the derived class final.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217990
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David Blaikie [Wed, 17 Sep 2014 22:17:59 +0000 (22:17 +0000)]
Revert "Fix -Wnon-virtual-dtor warning introduced in r217982."
An alternative fix was already committed.
This reverts commit r217988.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217989
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David Blaikie [Wed, 17 Sep 2014 22:15:40 +0000 (22:15 +0000)]
Fix -Wnon-virtual-dtor warning introduced in r217982.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217988
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Chris Bieneman [Wed, 17 Sep 2014 22:09:38 +0000 (22:09 +0000)]
Fixing the sanitizer build failure:
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux/builds/12868/steps/annotate/logs/stdio
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217987
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Juergen Ributzka [Wed, 17 Sep 2014 21:55:55 +0000 (21:55 +0000)]
[FastISel][AArch64] Custom lower sdiv by power-of-2.
Emit an optimized instruction sequence for sdiv by power-of-2 depending on the
exact flag.
This fixes rdar://problem/
18224511.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217986
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Nick Kledzik [Wed, 17 Sep 2014 21:53:07 +0000 (21:53 +0000)]
[llvm-objdump] clean up test cases now that build bots are green
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217985
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Justin Bogner [Wed, 17 Sep 2014 21:48:52 +0000 (21:48 +0000)]
llvm-cov: Push some more debug output into the View (NFC)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217984
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Chris Bieneman [Wed, 17 Sep 2014 21:06:59 +0000 (21:06 +0000)]
Fixing a build error.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217983
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Chris Bieneman [Wed, 17 Sep 2014 20:55:46 +0000 (20:55 +0000)]
Refactoring SimplifyLibCalls to remove static initializers and generally cleaning up the code.
Summary: This eliminates ~200 lines of code mostly file scoped struct definitions that were unnecessary.
Reviewers: chandlerc, resistor
Reviewed By: resistor
Subscribers: morisset, resistor, llvm-commits
Differential Revision: http://reviews.llvm.org/D5364
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217982
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Rafael Espindola [Wed, 17 Sep 2014 20:41:13 +0000 (20:41 +0000)]
Internalize common symbols when we can.
This fixes pr20974.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217981
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Juergen Ributzka [Wed, 17 Sep 2014 20:35:41 +0000 (20:35 +0000)]
[FastISel][AArch64] Simplify mul to shift when possible.
This is related to rdar://problem/
18369687.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217980
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Alexey Samsonov [Wed, 17 Sep 2014 20:17:52 +0000 (20:17 +0000)]
Exclude known and bugzilled failures from UBSan bootstrap
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217979
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Juergen Ributzka [Wed, 17 Sep 2014 19:51:38 +0000 (19:51 +0000)]
[FastISel][AArch64] Fold mul into add/sub and logical operations.
Try to fold the multiply into the add/sub or logical operations (when
possible).
This is related to rdar://problem/
18369687.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217978
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Juergen Ributzka [Wed, 17 Sep 2014 19:19:31 +0000 (19:19 +0000)]
[FastISel][AArch64] Fold mul into the address computation of memory operations.
Teach 'computeAddress' to also fold multiplies into the address computation
(when possible).
This fixes rdar://problem/
18369443.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217977
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Justin Bogner [Wed, 17 Sep 2014 18:23:47 +0000 (18:23 +0000)]
llvm-cov: Rework the API for getting the coverage of a file (NFC)
This encapsulates how we handle the coverage regions of a file or
function. In the old model, the user had to deal with nested regions,
so they needed to maintain their own auxiliary data structures to get
any useful information out of this. The new API provides a sequence of
non-overlapping coverage segments, which makes it possible to render
coverage information in a single pass and avoids a fair amount of
extra work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217975
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Alexey Samsonov [Wed, 17 Sep 2014 18:23:07 +0000 (18:23 +0000)]
Fixup for r217830. Don't do left shifts on negative values
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217974
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Robin Morisset [Wed, 17 Sep 2014 18:09:13 +0000 (18:09 +0000)]
Revert "[ARM, Fix] Fix emitLeading/TrailingFence on old ARM processors"
It is breaking the build on the buildbots but works fine on my machine, I revert
while trying to understand what happens (it appears to depend on the compiler used
to build, I probably used a C++11 feature that is not perfectly supported by some
of the buildbots).
This reverts commit
feb3176c4d006f99af8b40373abd56215a90e7cc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217973
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Juergen Ributzka [Wed, 17 Sep 2014 18:05:34 +0000 (18:05 +0000)]
[FastISel][AArch64] Fold compare with zero and branch into CBZ and CBNZ.
This takes advanatage of the CBZ and CBNZ instruction to further optimize the
common null check pattern into a single instruction.
This is related to rdar://problem/
18358882.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217972
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Yaron Keren [Wed, 17 Sep 2014 17:50:34 +0000 (17:50 +0000)]
Another required re-setting for MCStreamer::reset().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217970
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Matt Arsenault [Wed, 17 Sep 2014 17:48:32 +0000 (17:48 +0000)]
R600/SI: Remove assert
Since read2 / write2 are emitted for 4-byte aligned 8-byte
accesses, these are seen by the scheduler.
The DAG scheduler is semi-deprecated, so just
ignore these for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217969
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Matt Arsenault [Wed, 17 Sep 2014 17:48:30 +0000 (17:48 +0000)]
R600/SI: Rough first implementation of shouldClusterLoads
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217968
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Alexey Samsonov [Wed, 17 Sep 2014 17:47:21 +0000 (17:47 +0000)]
Fix float division-by-zero in R600 scheduler.
This bug was reported by UBSan.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217967
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Juergen Ributzka [Wed, 17 Sep 2014 17:46:47 +0000 (17:46 +0000)]
[FastISel][AArch64] Improve branch selection to support all FP conditions.
This adds the last two missing floating-point condition codes (FCMP_UEQ and
FCMP_ONE) also to the branch selection. In these two cases an additonal branch
instruction is required.
This also adds unit tests to checks all the different condition codes.
This is related o rdar://problem/
18358882.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217966
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Robin Morisset [Wed, 17 Sep 2014 17:41:16 +0000 (17:41 +0000)]
[ARM, Fix] Fix emitLeading/TrailingFence on old ARM processors
Summary:
I had only tested this code for ARMv7 and ARMv8. This patch adds several
fallback paths if the processor does not support dmb ish:
- dmb sy if a cortex-M with support for dmb
- mcr p15, #0, r0, c7, c10, #5 for ARMv6 (special instruction equivalent to a DMB)
These fallback paths were chosen based on the code for fence seq_cst.
Thanks to luqmana for having noticed this bug.
Test Plan: Added more cases to atomic-load-store.ll + make check-all
Reviewers: jfb, t.p.northover, luqmana
Subscribers: aemerson, llvm-commits
Differential Revision: http://reviews.llvm.org/D5304
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217965
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Matt Arsenault [Wed, 17 Sep 2014 17:32:13 +0000 (17:32 +0000)]
R600/SI: Change formatting of printed FP immediates
Only 1 decimal place should be printed for inline immediates.
Other constants should be hex constants.
Does not include f64 tests because folding those inline
immediates currently does not work.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217964
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Chad Rosier [Wed, 17 Sep 2014 16:35:09 +0000 (16:35 +0000)]
[IndVarSimplify] Partially revert r217953 to see if this fixes the bots.
Specifically, disable widening of unsigned compare instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217962
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Justin Bogner [Wed, 17 Sep 2014 15:43:01 +0000 (15:43 +0000)]
LineIterator: Provide a variant that keeps blank lines
It isn't always useful to skip blank lines, as evidenced by the
somewhat awkward use of line_iterator in llvm-cov. This adds a knob to
control whether or not to skip blanks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217960
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Matt Arsenault [Wed, 17 Sep 2014 15:35:43 +0000 (15:35 +0000)]
R600/SI: Remove promotion of instructions to e64 forms.
Instructions are now generally selected to the e64 forms originally,
and shrunk down later. Rename foldOperands to legalizeOperands,
since that's really most of what it tries to do.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217959
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Chad Rosier [Wed, 17 Sep 2014 14:10:33 +0000 (14:10 +0000)]
[IndVarSimplify] Widen loop compare instructions.
This improves other optimizations such as LSR. A sext may be added to the
compare's other operand, but this can often be hoisted outside of the loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217953
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Andrea Di Biagio [Wed, 17 Sep 2014 11:32:31 +0000 (11:32 +0000)]
[InstCombine] Fix wrong folding of constant comparison involving ahsr and negative quantities (PR20945).
Example:
define i1 @foo(i32 %a) {
%shr = ashr i32 -9, %a
%cmp = icmp ne i32 %shr, -5
ret i1 %cmp
}
Before this fix, the instruction combiner wrongly thought that %shr
could have never been equal to -5. Therefore, %cmp was always folded to 'true'.
However, when %a is equal to 1, then %cmp evaluates to 'false'. Therefore,
in this example, it is not valid to fold %cmp to 'true'.
The problem was only affecting the case where the comparison was between
negative quantities where one of the quantities was obtained from arithmetic
shift of a negative constant.
This patch fixes the problem with the wrong folding (fixes PR20945).
With this patch, the 'icmp' from the example is now simplified to a
comparison between %a and 1. This still allows us to get rid of the arithmetic
shift (%shr).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217950
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Frederic Riss [Wed, 17 Sep 2014 09:28:34 +0000 (09:28 +0000)]
Add DIBuilder functions to build RAUWable DIVariables and DIFunctions.
Summary: These will be used to implement support for useful forward declarartions.
Reviewers: echristo, dblaikie, aprantl
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D5328
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217949
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Yaron Keren [Wed, 17 Sep 2014 09:25:36 +0000 (09:25 +0000)]
Add and update reset() and doInitialization() methods to MC* and passes.
This enables reusing a PassManager instead of re-constructing it every time.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217948
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Toma Tabacu [Wed, 17 Sep 2014 09:01:54 +0000 (09:01 +0000)]
[mips] Add assembler support for the .set nodsp directive.
Summary: This directive is used to tell the assembler to reject DSP-specific instructions.
Reviewers: dsanders
Reviewed By: dsanders
Differential Revision: http://reviews.llvm.org/D5142
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217946
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Justin Bogner [Wed, 17 Sep 2014 08:12:12 +0000 (08:12 +0000)]
llvm-cov: Fix a typo
It doesn't make sense for this default parameter to be false, since
false makes the function a no-op.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217945
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Pavel Chupin [Wed, 17 Sep 2014 07:09:23 +0000 (07:09 +0000)]
[x32] Fix function indirect calls
Summary: Zero-extend register to 64-bit for callq/jmpq.
Test Plan: 3 tests added
Reviewers: nadav, dschuff
Subscribers: llvm-commits, zinovy.nis
Differential Revision: http://reviews.llvm.org/D5355
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217942
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Justin Bogner [Wed, 17 Sep 2014 06:32:48 +0000 (06:32 +0000)]
Add move constructors/assignment to make MSVC happy after r217940
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217941
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Justin Bogner [Wed, 17 Sep 2014 05:33:20 +0000 (05:33 +0000)]
llvm-cov: Distinguish expansion/instantiation from SourceCoverageView
SourceCoverageView currently has "Kind" and a list of child views, all
of which must have either an expansion or an instantiation Kind. In
addition to being an error-prone design, this makes it awkward to
differentiate between the two child types and adds a number of
optionally used members to the type.
Split the subview types into their own separate objects, and maintain
lists of each rather than one combined "Children" list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217940
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David Majnemer [Wed, 17 Sep 2014 04:16:35 +0000 (04:16 +0000)]
InstSimplify: Don't allow (x srem y) urem y -> x srem y
Let's consider the case where:
%x i16 = 32768
%y i16 = 384
%x srem %y = 65408
(%x srem %y) urem %y = 128
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217939
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David Majnemer [Wed, 17 Sep 2014 03:34:34 +0000 (03:34 +0000)]
InstSimplify: ((X % Y) % Y) -> (X % Y)
Patch by Sonam Kumari!
Differential Revision: http://reviews.llvm.org/D5350
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217937
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Nick Kledzik [Wed, 17 Sep 2014 01:51:43 +0000 (01:51 +0000)]
[Object] keep trailing '\0' out of StringRef when parsing mach-o bindings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217935
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Richard Trieu [Wed, 17 Sep 2014 01:47:52 +0000 (01:47 +0000)]
| -> ||
No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217934
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Nick Kledzik [Wed, 17 Sep 2014 00:53:44 +0000 (00:53 +0000)]
Fix identify_magic() with mach-o stub dylibs.
The wrong value was returned and the unittest did not cover the stub dylib case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217933
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Nick Kledzik [Wed, 17 Sep 2014 00:25:22 +0000 (00:25 +0000)]
[llvm-objdump] properly use c_str() with format("%s"). Improve getLibraryShortNameByIndex() error handling.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217930
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Robin Morisset [Wed, 17 Sep 2014 00:06:58 +0000 (00:06 +0000)]
[X86] Use the generic AtomicExpandPass instead of X86AtomicExpandPass
This required a new hook called hasLoadLinkedStoreConditional to know whether
to expand atomics to LL/SC (ARM, AArch64, in a future patch Power) or to
CmpXchg (X86).
Apart from that, the new code in AtomicExpandPass is mostly moved from
X86AtomicExpandPass. The main result of this patch is to get rid of that
pass, which had lots of code duplicated with AtomicExpandPass.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217928
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Quentin Colombet [Tue, 16 Sep 2014 22:36:07 +0000 (22:36 +0000)]
[CodeGenPrepare][AddressingModeMatcher] The promotion mechanism was expecting
instructions when truncate, sext, or zext were created. Fix that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217926
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Nick Kledzik [Tue, 16 Sep 2014 22:03:13 +0000 (22:03 +0000)]
[llvm-objdump] improve error reporting of bad mach-o ordinals
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217909
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Yaron Keren [Tue, 16 Sep 2014 21:31:04 +0000 (21:31 +0000)]
This add a reset method for WinCOFFObjectWriter, like other MC* classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217907
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Nick Kledzik [Tue, 16 Sep 2014 21:29:54 +0000 (21:29 +0000)]
tweak test case for debugging bot
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217906
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Owen Anderson [Tue, 16 Sep 2014 20:28:00 +0000 (20:28 +0000)]
Add back a fallback case for targets that do not or cannot implement getNoopForMachoTarget().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217899
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Kevin Enderby [Tue, 16 Sep 2014 18:00:57 +0000 (18:00 +0000)]
Hookup the MCSymbolizer to llvm-objdump’s disassembly for Mach-O files.
First step done in this commit is to get flush out enough of the
SymbolizerGetOpInfo() routine to symbolic an X86_64 hello world .o and
its loading of the literal string and call to printf. Also the code to
symbolicate the X86_64_RELOC_SUBTRACTOR relocation and a test is also
added to show a slightly more complicated case.
Next will be to flush out enough of SymbolizerSymbolLookUp() to get the
literal string “Hello world” printed as a comment on the instruction that load
the pointer to it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217893
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Matt Arsenault [Tue, 16 Sep 2014 18:00:23 +0000 (18:00 +0000)]
Fix typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217892
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