Learn how to xfail a test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48219 91177308-0d34-0410-b5e6-96231b3b80d8

When the register allocator runs out of registers, spill a physical register around the def's and use's of the interval being allocated to make it possible for the interval to target a register and spill it right away and restore a register for uses. This likely generates terrible code but is before than aborting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48218 91177308-0d34-0410-b5e6-96231b3b80d8

In 32-bit mode, mark 64-bit GPR's as unallocatable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48217 91177308-0d34-0410-b5e6-96231b3b80d8

XFAIL due to Dale's change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48216 91177308-0d34-0410-b5e6-96231b3b80d8

Some LegalizeTypes code factorization and minor
enhancements.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48215 91177308-0d34-0410-b5e6-96231b3b80d8

compile: double test() {}

into:

_test:
fldz
ret

instead of:

_test:
subl $12, %esp
#IMPLICIT_DEF %xmm0
movsd %xmm0, (%esp)
fldl (%esp)
addl $12, %esp
ret

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48213 91177308-0d34-0410-b5e6-96231b3b80d8

Fix the build on gcc 4.2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48212 91177308-0d34-0410-b5e6-96231b3b80d8

fix grammer

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48211 91177308-0d34-0410-b5e6-96231b3b80d8

Initial multiple return values support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48210 91177308-0d34-0410-b5e6-96231b3b80d8

Change the model for FP Stack return to use fp operands on the
RET instruction instead of using FpSET_ST0_32.  This also generalizes
the code to handling returning of multiple FP results.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48209 91177308-0d34-0410-b5e6-96231b3b80d8

variadic instructions don't have operand info for variadic arguments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48208 91177308-0d34-0410-b5e6-96231b3b80d8

Upgrade this test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48207 91177308-0d34-0410-b5e6-96231b3b80d8

Generalize ExpandIntToFP to handle the case where the operand is legal
and it's the result that requires expansion. This code is a little confusing
because the TargetLoweringInfo tables for [US]INT_TO_FP use the operand type
(the integer type) rather than the result type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48206 91177308-0d34-0410-b5e6-96231b3b80d8

If a register operand comes from the variadic part of a node, don't
verify the register constraint matches what the instruction expects.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48205 91177308-0d34-0410-b5e6-96231b3b80d8

Temporarily revert 48175.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48204 91177308-0d34-0410-b5e6-96231b3b80d8

Fix thinko: alias always defines new symbol. Even is aliasee itself is undefined.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48203 91177308-0d34-0410-b5e6-96231b3b80d8

More APInt-ification.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48201 91177308-0d34-0410-b5e6-96231b3b80d8

emit an ID # for each regclass ID.  Chris doesn't like to have to count.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48200 91177308-0d34-0410-b5e6-96231b3b80d8

abort with an assert instead of a cerr to get line#

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48199 91177308-0d34-0410-b5e6-96231b3b80d8

Use utostr instead of a stringstream.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48198 91177308-0d34-0410-b5e6-96231b3b80d8

- Style cleanup in IA64ISelLowering.h: add 'virtual' keyword for consistency.
- Add test pattern matching in CellSPU's icmp32.ll test harness
- Fix CellSPU fcmp.ll-generated assert.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48197 91177308-0d34-0410-b5e6-96231b3b80d8

Correctly clone FlaggedNodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48196 91177308-0d34-0410-b5e6-96231b3b80d8

Initialize ArgTypes directly instead of manually copying in the elements.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48195 91177308-0d34-0410-b5e6-96231b3b80d8

APInt-ify this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48194 91177308-0d34-0410-b5e6-96231b3b80d8

Remove an unnecessary #include

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48193 91177308-0d34-0410-b5e6-96231b3b80d8

Don't emit FP_REG_KILL into a block that just returns.  Nothing
can be live out of the block anyway, so it isn't needed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48192 91177308-0d34-0410-b5e6-96231b3b80d8

Implement more support for fp-to-i128 and i128-to-fp conversions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48189 91177308-0d34-0410-b5e6-96231b3b80d8

Disable prolog code that aligns the stack when a
local object of >16 byte alignment exists.  It does not
work and getting it to work is not trivial, as explained
in the comment.  This fixes all the remaining ppc32
failures in the struct-layout-1 part of the gcc testsuite.

(gcc does not support this either, and the only way to
get such an object is with __attribute__((aligned)) or
generic vectors; it can't be done in a standard-conforming
program, or with Altivec.  So I think disabling it is OK.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48188 91177308-0d34-0410-b5e6-96231b3b80d8

Update llc flags for PPC register scavenger.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48187 91177308-0d34-0410-b5e6-96231b3b80d8

Change the "enable/disable" mechanism so that we can enable PPC register
scavenging for 32-bit and 64-bit separately.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48186 91177308-0d34-0410-b5e6-96231b3b80d8

Add sanity checks

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48184 91177308-0d34-0410-b5e6-96231b3b80d8

Typo: 'function' => 'alias'

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48183 91177308-0d34-0410-b5e6-96231b3b80d8

Syntactic sugar'ify stuff :)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48182 91177308-0d34-0410-b5e6-96231b3b80d8

Always run 'make check' :) Fix fallout from prev. commit: query for possible
alias destination only if we don't have anything to link to

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48181 91177308-0d34-0410-b5e6-96231b3b80d8

Make error messages to have common style

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48180 91177308-0d34-0410-b5e6-96231b3b80d8

Properly link globals with aliases

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48179 91177308-0d34-0410-b5e6-96231b3b80d8

This passes now

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48178 91177308-0d34-0410-b5e6-96231b3b80d8

Remove the LinkGlobal weirderness in common linking phase.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48177 91177308-0d34-0410-b5e6-96231b3b80d8

Typo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48176 91177308-0d34-0410-b5e6-96231b3b80d8

If the register allocator ran out of registers, just abort for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48175 91177308-0d34-0410-b5e6-96231b3b80d8

Eliminate the FP_GET_ST0/FP_SET_ST0 target-specific dag nodes, just lower to
copyfromreg/copytoreg instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48174 91177308-0d34-0410-b5e6-96231b3b80d8

Document multiple return values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48173 91177308-0d34-0410-b5e6-96231b3b80d8

Fix mul expansion to check the correct number of bits for
zero extension when checking if an unsigned multiply is
safe.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48171 91177308-0d34-0410-b5e6-96231b3b80d8

Somewhat better solution.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48170 91177308-0d34-0410-b5e6-96231b3b80d8

Default ISD::PREFETCH to expand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48169 91177308-0d34-0410-b5e6-96231b3b80d8

Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48167 91177308-0d34-0410-b5e6-96231b3b80d8

fix 80 col violations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48166 91177308-0d34-0410-b5e6-96231b3b80d8

The __sync primitives only work on x86 and alpha;
xfail this test elsewhere.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48164 91177308-0d34-0410-b5e6-96231b3b80d8

Simplify

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48163 91177308-0d34-0410-b5e6-96231b3b80d8

Restore optimization that merges blocks when inline function
has single return value.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48162 91177308-0d34-0410-b5e6-96231b3b80d8

Simplify

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48161 91177308-0d34-0410-b5e6-96231b3b80d8

simplify

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48160 91177308-0d34-0410-b5e6-96231b3b80d8

Add -m32 to compilation line; test is only valid in
32-bit environment.  PR 2136.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48159 91177308-0d34-0410-b5e6-96231b3b80d8

Stylistic modifications. No functionality changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48158 91177308-0d34-0410-b5e6-96231b3b80d8

These tests don't work unless SSE2 is active.
Judging from the checking comments this is intentional,
so add the flag (makes them pass on non-x86 host).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48157 91177308-0d34-0410-b5e6-96231b3b80d8

There is no "-mattr=+sse1" flag; fix test for non-x86 hosts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48156 91177308-0d34-0410-b5e6-96231b3b80d8

Use uint64_t not unsigned long long.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48154 91177308-0d34-0410-b5e6-96231b3b80d8

Integer comparison tests for CellSPU.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48152 91177308-0d34-0410-b5e6-96231b3b80d8

Fix formatting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48151 91177308-0d34-0410-b5e6-96231b3b80d8

Refresh Makefile.ocaml in objdir if it is modified in srcdir.

Patch by Erick Tryzelaar!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48150 91177308-0d34-0410-b5e6-96231b3b80d8

Refresh Makefile.ocaml in objdir if it is modified in srcdir.

Patch by Erick Tryzelaar!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48149 91177308-0d34-0410-b5e6-96231b3b80d8

Regenerate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48148 91177308-0d34-0410-b5e6-96231b3b80d8

Adding ocamldoc generation.

Patch by Erick Tryzelaar.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48147 91177308-0d34-0410-b5e6-96231b3b80d8

Formatting improvements.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48146 91177308-0d34-0410-b5e6-96231b3b80d8

Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC's
return ValueType can depend its operands' ValueType.

This is a cosmetic change, no functionality impacted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48145 91177308-0d34-0410-b5e6-96231b3b80d8

Add description of individual bits in CR. This fix PR1765.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48143 91177308-0d34-0410-b5e6-96231b3b80d8

Minor cleanup. No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48142 91177308-0d34-0410-b5e6-96231b3b80d8

- Fix a subtle bug in RemoveCopyByCommutingDef. ALR is the live range where the source is defined; BLR is the live range which is defined by the copy.
If ALR and BLR overlaps and end of BLR extends beyond end of ALR, e.g.
 A = or A, B
 ...
 B = A
 ...
 C = A<kill>
 ...
   = B

then do not add kills of A to the newly created B interval.
- Also fix some kill info update bug.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48141 91177308-0d34-0410-b5e6-96231b3b80d8

Doh

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48140 91177308-0d34-0410-b5e6-96231b3b80d8

Add nosubmit option to control what is sent back to the results server.
Patch by Joachim Durchholz. Thanks!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48139 91177308-0d34-0410-b5e6-96231b3b80d8

Move StrongPHIElimination after live interval analysis.  This will make things happier down the road.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48138 91177308-0d34-0410-b5e6-96231b3b80d8

Remove llvm-upgrade and update tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48137 91177308-0d34-0410-b5e6-96231b3b80d8

Avoid creating BUILD_VECTOR of all zero elements of "non-normalized" type (e.g. v8i16 on x86) after legalizer. Instruction selection does not expect to see them. In all likelihood this can only be an issue in a bugpoint reduced test case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48136 91177308-0d34-0410-b5e6-96231b3b80d8

remove an execution test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48135 91177308-0d34-0410-b5e6-96231b3b80d8

switch from hard coded g++/as tools to the ones detected from
the build system.  Patch by Joachim Durchholz  for PR2121

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48134 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a typo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48133 91177308-0d34-0410-b5e6-96231b3b80d8

Fix PR2120 by changing the replacement order to change compile_cxx
before compile_c.  Patch by Joachim Durchholz!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48132 91177308-0d34-0410-b5e6-96231b3b80d8

Allow insert_subreg into implicit, target-specific values.
Change insert/extract subreg instructions to be able to be used in TableGen patterns.
Use the above features to reimplement an x86-64 pseudo instruction as a pattern.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48130 91177308-0d34-0410-b5e6-96231b3b80d8

Update the .cvs files to match today's asm syntax change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48128 91177308-0d34-0410-b5e6-96231b3b80d8

Revert accidentally committed local changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48126 91177308-0d34-0410-b5e6-96231b3b80d8

Add support in TableGen for unknown operands that infer their type from the pattern their used in. This will be used to allow insert/extract subreg patterns in .td files!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48125 91177308-0d34-0410-b5e6-96231b3b80d8

Turn unwind_to into "unwinds to".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48123 91177308-0d34-0410-b5e6-96231b3b80d8

Increase ISD::ParamFlags to 64 bits.  Increase the ByValSize
field to 32 bits, thus enabling correct handling of ByVal
structs bigger than 0x1ffff.  Abstract interface a bit.
Fixes gcc.c-torture/execute/pr23135.c and
gcc.c-torture/execute/pr28982b.c in gcc testsuite (were ICE'ing
on ppc32, quietly producing wrong code on x86-32.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48122 91177308-0d34-0410-b5e6-96231b3b80d8

This works on x86_64

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48121 91177308-0d34-0410-b5e6-96231b3b80d8

Darwin PPC64 indirect call target goes in X12, not R12.  This fixes these
two regression tests:
test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert.ll
test/CodeGen/PowerPC/2007-10-21-LocalRegAllocAssert2.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48120 91177308-0d34-0410-b5e6-96231b3b80d8

cell really does support cross-regclass moves, because R3 is in lots of different regclasses, and the code is not consistent when it comes to value tracking.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48119 91177308-0d34-0410-b5e6-96231b3b80d8

make sure ar.pfs is in a register class, this fixes test/CodeGen/IA64/ret-0.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48118 91177308-0d34-0410-b5e6-96231b3b80d8

remove an extraneous (and ugly) default argument, thanks Duncan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48117 91177308-0d34-0410-b5e6-96231b3b80d8

Fix RUN line.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48116 91177308-0d34-0410-b5e6-96231b3b80d8

Fix some compilation errors on msvc:
- "Redefinition of I" (iterator masks previous definition)
- include missing header file

Patch by Argiris Kirtzidis!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48115 91177308-0d34-0410-b5e6-96231b3b80d8

And again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48112 91177308-0d34-0410-b5e6-96231b3b80d8

Braces belong here. No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48111 91177308-0d34-0410-b5e6-96231b3b80d8

Temporary XFAIL the test, until I'll commit a fix

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48110 91177308-0d34-0410-b5e6-96231b3b80d8

SCCP also needs to be taught to follow unwind_to

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48109 91177308-0d34-0410-b5e6-96231b3b80d8

fp_round's produced by getCopyFromParts should always be exact, because
they are produced by calls (which are known exact) and by cross block copies
which are known to be produced by extends.

This improves:

define double @test2() {
%tmp85 = call double asm sideeffect "fld0", "={st(0)}"()
ret double %tmp85
}

from:

_test2:
subl $20, %esp
# InlineAsm Start
fld0
# InlineAsm End
fstpl 8(%esp)
movsd 8(%esp), %xmm0
movsd %xmm0, (%esp)
fldl (%esp)
addl $20, %esp
#FP_REG_KILL
ret

to:

_test2:
# InlineAsm Start
fld0
# InlineAsm End
#FP_REG_KILL
ret

by avoiding a f64 <-> f80 trip

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48108 91177308-0d34-0410-b5e6-96231b3b80d8

teach X86InstrInfo::copyRegToReg how to copy into ST(0) from
an RFP register class.

Teach ScheduleDAG how to handle CopyToReg with different src/dst
reg classes.

This allows us to compile trivial inline asms that expect stuff
on the top of x87-fp stack.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48107 91177308-0d34-0410-b5e6-96231b3b80d8

Don't eliminate blocks that are only reachable by unwind_to.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48106 91177308-0d34-0410-b5e6-96231b3b80d8

Add ScheduleDAG support for copytoreg where the src/dst register are
in different register classes, e.g. copy of ST(0) to RFP*.  This gets
some really trivial inline asm working that plops things on the top of
stack (PR879)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48105 91177308-0d34-0410-b5e6-96231b3b80d8

add some code to support cross-register class copying from
RST -> RFP{32/64/80}.  We only handle ST(0) for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48104 91177308-0d34-0410-b5e6-96231b3b80d8

Remove llvm-upgrade and update tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48103 91177308-0d34-0410-b5e6-96231b3b80d8