oota-llvm.git
12 years agoMerge vpermps/vpermd and vpermpd/vpermq SD nodes.
Craig Topper [Mon, 16 Apr 2012 00:41:45 +0000 (00:41 +0000)]
Merge vpermps/vpermd and vpermpd/vpermq SD nodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154782 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix SDTypeProfile for vpermps. The mask operand should be v8i32.
Craig Topper [Mon, 16 Apr 2012 00:12:20 +0000 (00:12 +0000)]
Fix SDTypeProfile for vpermps. The mask operand should be v8i32.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154781 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoSpacing fixes and 80 column fixes. Use 0 instead of 0x80 for undef indices in vpermps...
Craig Topper [Sun, 15 Apr 2012 23:48:57 +0000 (23:48 +0000)]
Spacing fixes and 80 column fixes. Use 0 instead of 0x80 for undef indices in vpermps/vpermd. Hardware only looks at lower 3-bits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154780 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRemove AVX2 vpermq and vpermpd intrinsics. These can now be handled with normal shuff...
Craig Topper [Sun, 15 Apr 2012 22:43:31 +0000 (22:43 +0000)]
Remove AVX2 vpermq and vpermpd intrinsics. These can now be handled with normal shuffle vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154778 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMake member variables of AsmToken private. Remove unnecessary forward declarations...
Craig Topper [Sun, 15 Apr 2012 22:00:22 +0000 (22:00 +0000)]
Make member variables of AsmToken private. Remove unnecessary forward declarations. Remove an unnecessary include.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154775 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix class name.
Jakub Staszak [Sun, 15 Apr 2012 20:22:36 +0000 (20:22 +0000)]
Fix class name.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154773 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoDo not convert between fp128 <-> ppc_fp128 since there is no legal cast conversion...
Nadav Rotem [Sun, 15 Apr 2012 20:17:14 +0000 (20:17 +0000)]
Do not convert between fp128 <-> ppc_fp128 since there is no legal cast conversion between the two.

Patch by nobled <nobled@dreamwidth.org>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154772 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix filename and register numbers.
Jakub Staszak [Sun, 15 Apr 2012 20:13:47 +0000 (20:13 +0000)]
Fix filename and register numbers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154771 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix PR12529. The Vxx family of instructions are only supported by AVX.
Nadav Rotem [Sun, 15 Apr 2012 19:36:44 +0000 (19:36 +0000)]
Fix PR12529.  The Vxx family of instructions are only supported by AVX.
Use non-vex instructions for SSE4.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154770 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd the MDBuilder helper class for conveniently creating metadata.
Duncan Sands [Sun, 15 Apr 2012 18:03:49 +0000 (18:03 +0000)]
Add the MDBuilder helper class for conveniently creating metadata.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154766 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoWire up support for diagnostic ranges in the ARMAsmParser.
Benjamin Kramer [Sun, 15 Apr 2012 17:04:27 +0000 (17:04 +0000)]
Wire up support for diagnostic ranges in the ARMAsmParser.

As an example, attach range info to the "invalid instruction" message:

$ clang -arch arm -c asm.c
asm.c:2:11: error: invalid instruction
  __asm__("foo r0");
          ^
<inline asm>:1:2: note: instantiated into assembly here
        foo r0
        ^~~

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154765 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoWhen emulating vselect using OR/AND/XOR make sure to bitcast the result back to the...
Nadav Rotem [Sun, 15 Apr 2012 15:08:09 +0000 (15:08 +0000)]
When emulating vselect using OR/AND/XOR make sure to bitcast the result back to the original type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154764 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdded VPERM optimization for AVX2 shuffles
Elena Demikhovsky [Sun, 15 Apr 2012 11:18:59 +0000 (11:18 +0000)]
Added VPERM optimization for AVX2 shuffles

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154761 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoHexagonCopyToCombine.cpp: Silence two warnings, -Wunused-variable, with -Asserts.
NAKAMURA Takumi [Sun, 15 Apr 2012 05:33:43 +0000 (05:33 +0000)]
HexagonCopyToCombine.cpp: Silence two warnings, -Wunused-variable, with -Asserts.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154759 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTarget/Hexagon: Tweak to fix msvc build.
NAKAMURA Takumi [Sun, 15 Apr 2012 05:09:09 +0000 (05:09 +0000)]
Target/Hexagon: Tweak to fix msvc build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154758 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRemove trailing whitespace.
Anshuman Dasgupta [Sat, 14 Apr 2012 20:59:13 +0000 (20:59 +0000)]
Remove trailing whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154755 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd VLIW packetizer to ReleaseNotes.html and CREDITS.TXT. Committing patch
Anshuman Dasgupta [Sat, 14 Apr 2012 20:57:13 +0000 (20:57 +0000)]
Add VLIW packetizer to ReleaseNotes.html and CREDITS.TXT. Committing patch
by Sundeep Kushwaha.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154754 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd the loop unrolling info to ReleaseNotes.html and CREDITS.TXT.
Brendon Cahoon [Sat, 14 Apr 2012 16:54:12 +0000 (16:54 +0000)]
Add the loop unrolling info to ReleaseNotes.html and CREDITS.TXT.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154752 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoThere is no need for setIsExact to be public. Make it private.
Duncan Sands [Sat, 14 Apr 2012 15:43:22 +0000 (15:43 +0000)]
There is no need for setIsExact to be public.  Make it private.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154750 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRename "fpaccuracy" metadata to the more generic "fpmath". That's because I'm
Duncan Sands [Sat, 14 Apr 2012 12:36:06 +0000 (12:36 +0000)]
Rename "fpaccuracy" metadata to the more generic "fpmath".  That's because I'm
thinking of generalizing it to be able to specify other freedoms beyond accuracy
(such as that NaN's don't have to be respected).  I'd like the 3.1 release (the
first one with this metadata) to have the more generic name already rather than
having to auto-upgrade it in 3.2.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154744 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMake StringMap's copy ctor non-explicit.
Benjamin Kramer [Sat, 14 Apr 2012 09:04:57 +0000 (09:04 +0000)]
Make StringMap's copy ctor non-explicit.

Without this gcc doesn't allow us to put a StringMap into a
std::map. Works with clang though.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154737 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix an error in BBVectorize important for vectorizing pointer types.
Hal Finkel [Sat, 14 Apr 2012 07:32:50 +0000 (07:32 +0000)]
Fix an error in BBVectorize important for vectorizing pointer types.

When vectorizing pointer types it is important to realize that potential
pairs cannot be connected via the address pointer argument of a load or store.
This is because even after vectorization, the address is still a scalar because
the address of the higher half of the pair is implicit from the address of the
lower half (it need not be, and should not be, explicitly computed).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154735 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoEnhance BBVectorize to more-properly handle pointer values and vectorize GEPs.
Hal Finkel [Sat, 14 Apr 2012 07:32:43 +0000 (07:32 +0000)]
Enhance BBVectorize to more-properly handle pointer values and vectorize GEPs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154734 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agomisched: Added CanHandleTerminators.
Andrew Trick [Fri, 13 Apr 2012 23:29:54 +0000 (23:29 +0000)]
misched: Added CanHandleTerminators.

This is a special flag for targets that really want their block
terminators in the DAG. The default scheduler cannot handle this
correctly, so it becomes the specialized scheduler's responsibility to
schedule terminators.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154712 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRemove old code to strip out unwanted PPC slices for Apple llvmCore.
Bob Wilson [Fri, 13 Apr 2012 22:58:53 +0000 (22:58 +0000)]
Remove old code to strip out unwanted PPC slices for Apple llvmCore.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154706 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix X86 codegen for 'atomicrmw nand' to generate *x = ~(*x & y), not *x = ~*x & y.
Richard Smith [Fri, 13 Apr 2012 22:47:00 +0000 (22:47 +0000)]
Fix X86 codegen for 'atomicrmw nand' to generate *x = ~(*x & y), not *x = ~*x & y.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154705 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRemove iostream from New Value Jump.
Sirish Pande [Fri, 13 Apr 2012 21:01:35 +0000 (21:01 +0000)]
Remove iostream from New Value Jump.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154703 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd support to BBVectorize for vectorizing selects.
Hal Finkel [Fri, 13 Apr 2012 20:45:45 +0000 (20:45 +0000)]
Add support to BBVectorize for vectorizing selects.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154700 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd support for Hexagon Architectural feature, New Value Jump.
Sirish Pande [Fri, 13 Apr 2012 20:22:31 +0000 (20:22 +0000)]
Add support for Hexagon Architectural feature, New Value Jump.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154696 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoPass to replace tranfer/copy instructions into combine instruction where possible.
Sirish Pande [Fri, 13 Apr 2012 20:22:19 +0000 (20:22 +0000)]
Pass to replace tranfer/copy instructions into combine instruction where possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154695 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoReduce malloc traffic in DwarfAccelTable
Benjamin Kramer [Fri, 13 Apr 2012 20:06:17 +0000 (20:06 +0000)]
Reduce malloc traffic in DwarfAccelTable

- Don't copy offsets into HashData, the underlying vector won't change once the table is finalized.
- Allocate HashData and HashDataContents in a BumpPtrAllocator.
- Allocate string map entries in the same allocator.
- Random cleanups.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154694 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoSupport for Hexagon backend.
Tony Linthicum [Fri, 13 Apr 2012 19:09:44 +0000 (19:09 +0000)]
Support for Hexagon backend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154692 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoSupport for Hexagon backend.
Tony Linthicum [Fri, 13 Apr 2012 19:09:18 +0000 (19:09 +0000)]
Support for Hexagon backend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154691 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoOn Darwin targets, only use vfma etc. if the source use fma() intrinsic explicitly.
Evan Cheng [Fri, 13 Apr 2012 18:59:28 +0000 (18:59 +0000)]
On Darwin targets, only use vfma etc. if the source use fma() intrinsic explicitly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154689 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd some comments, and fix a few places that missed setting Changed.
Dan Gohman [Fri, 13 Apr 2012 18:57:48 +0000 (18:57 +0000)]
Add some comments, and fix a few places that missed setting Changed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154687 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFor ARM disassembly only print 32 unsigned bits for the address of branch
Kevin Enderby [Fri, 13 Apr 2012 18:46:37 +0000 (18:46 +0000)]
For ARM disassembly only print 32 unsigned bits for the address of branch
targets so if the branch target has the high bit set it does not get printed as:
 beq     0xffffffff8008c404

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154685 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoConsider ObjC runtime calls objc_storeWeak and others which make a copy of
Dan Gohman [Fri, 13 Apr 2012 18:28:58 +0000 (18:28 +0000)]
Consider ObjC runtime calls objc_storeWeak and others which make a copy of
their argument as "escape" points for objc_retainBlock optimization.
This fixes rdar://11229925.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154682 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoBy default, use Early-CSE instead of GVN for vectorization cleanup.
Hal Finkel [Fri, 13 Apr 2012 17:15:33 +0000 (17:15 +0000)]
By default, use Early-CSE instead of GVN for vectorization cleanup.

As has been suggested by Duncan and others, Early-CSE and GVN should
do similar redundancy elimination, but Early-CSE is much less expensive.
Most of my autovectorization benchmarks show a performance regresion, but
all of these are < 0.1%, and so I think that it is still worth using
the less expensive pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154673 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoCatch the Python exception when subprocess.Popen is failing.
Sylvestre Ledru [Fri, 13 Apr 2012 11:22:18 +0000 (11:22 +0000)]
Catch the Python exception when subprocess.Popen is failing.

For example, if llc cannot be found, the full python stacktrace is displayed
and no interesting information are provided.
+ fail the process when an exception occurs

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154665 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRemove unused variable.
Benjamin Kramer [Fri, 13 Apr 2012 08:09:12 +0000 (08:09 +0000)]
Remove unused variable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154661 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoSilence various build warnings from Hexagon backend that show up in release builds...
Craig Topper [Fri, 13 Apr 2012 06:38:11 +0000 (06:38 +0000)]
Silence various build warnings from Hexagon backend that show up in release builds. Mostly converting 'assert(0)' to 'llvm_unreachable' to silence warnings about missing returns. Also fold some variable declarations into asserts to prevent the variables from being unused in release builds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154660 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix target specific intrinsic handling to adjust intrinsic number before doing attrib...
Craig Topper [Fri, 13 Apr 2012 06:14:57 +0000 (06:14 +0000)]
Fix target specific intrinsic handling to adjust intrinsic number before doing attribute table lookup. Also fix attribute table lookup to handle 'invalid' intrinsic correctly. Fixes PR12542

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154658 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRemove getElfArchType from ELF.h. It's only used in ELFObjectFile.cpp and there's...
Craig Topper [Fri, 13 Apr 2012 05:58:19 +0000 (05:58 +0000)]
Remove getElfArchType from ELF.h. It's only used in ELFObjectFile.cpp and there's already a copy there. ELF.h was hiding the one there and causing an unused function warning.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154657 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoUse the new Use-aware dominates method to apply the objc runtime
Dan Gohman [Fri, 13 Apr 2012 01:08:28 +0000 (01:08 +0000)]
Use the new Use-aware dominates method to apply the objc runtime
library return value optimization for phi uses. Even when the
phi itself is not dominated, the specific use may be dominated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154647 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoCode-gen may inject code into the IR before it emits the ASM. The linker
Bill Wendling [Fri, 13 Apr 2012 01:06:27 +0000 (01:06 +0000)]
Code-gen may inject code into the IR before it emits the ASM. The linker
obviously cannot know that this code is present, let alone used. So prevent the
internalize pass from internalizing those global values which code-gen may
insert.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154645 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoDon't move objc_autorelease calls past autorelease pool boundaries when
Dan Gohman [Fri, 13 Apr 2012 00:59:57 +0000 (00:59 +0000)]
Don't move objc_autorelease calls past autorelease pool boundaries when
optimizing autorelease calls on phi nodes with null operands.
This fixes rdar://11207070.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154642 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoDef here is an Instruction, so !isa<Instruction>(Def) is always false,
Dan Gohman [Fri, 13 Apr 2012 00:50:57 +0000 (00:50 +0000)]
Def here is an Instruction, so !isa<Instruction>(Def) is always false,
as Eli noticed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154641 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd forms of dominates and isReachableFromEntry that accept a Use
Dan Gohman [Thu, 12 Apr 2012 23:31:46 +0000 (23:31 +0000)]
Add forms of dominates and isReachableFromEntry that accept a Use
directly instead of a user Instruction. This allows them to test
whether a def dominates a particular operand if the user instruction
is a PHI.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154631 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix a few more places in the ARM disassembler so that branches get
Kevin Enderby [Thu, 12 Apr 2012 23:13:34 +0000 (23:13 +0000)]
Fix a few more places in the ARM disassembler so that branches get
symbolic operands added when using the C disassembler API.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154628 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoUpdate CMake build.
Ted Kremenek [Thu, 12 Apr 2012 22:15:23 +0000 (22:15 +0000)]
Update CMake build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154622 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoHexagon: fix CMake error.
Evandro Menezes [Thu, 12 Apr 2012 21:44:58 +0000 (21:44 +0000)]
Hexagon: fix CMake error.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154620 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoDisable Hexagon test temporarily.
Sirish Pande [Thu, 12 Apr 2012 21:06:54 +0000 (21:06 +0000)]
Disable Hexagon test temporarily.

There is an assert at line 558 in ScheduleDAGInstrs::buildSchedGraph(AliasAnalysis *AA).
This assert needs to addressed for post RA scheduler. Until that assert is addressed,
any passes that uses post ra scheduler will fail. So, I am temporarily disabling the
hexagon tests until that fix is in.

The assert is as follows:
    assert(!MI->isTerminator() && !MI->isLabel() &&
               "Cannot schedule terminators or labels!");

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154617 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoHexagonPacketizer patch.
Sirish Pande [Thu, 12 Apr 2012 21:06:38 +0000 (21:06 +0000)]
HexagonPacketizer patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154616 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoThis patch improves the MCJIT runtime dynamic loader by adding new handling
Preston Gurd [Thu, 12 Apr 2012 20:13:57 +0000 (20:13 +0000)]
This patch improves the MCJIT runtime dynamic loader by adding new handling
of zero-initialized sections, virtual sections and common symbols
and preventing the loading of sections which are not required for
execution such as debug information.

Patch by Andy Kaylor!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154610 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoGeneralize r153635 to deal with TokenFactor chains; also clean up the logic and fix...
Evan Cheng [Thu, 12 Apr 2012 19:14:21 +0000 (19:14 +0000)]
Generalize r153635 to deal with TokenFactor chains; also clean up the logic and fix the tests. rdar://11069732, rdar://11236106

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154604 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoHexagon: enable assembler output through the MC layer.
Evandro Menezes [Thu, 12 Apr 2012 17:55:53 +0000 (17:55 +0000)]
Hexagon: enable assembler output through the MC layer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154597 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd DFA generator for VLIW targets to ReleaseNotes.html and CREDITS.TXT.
Anshuman Dasgupta [Thu, 12 Apr 2012 15:17:35 +0000 (15:17 +0000)]
Add DFA generator for VLIW targets to ReleaseNotes.html and CREDITS.TXT.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154590 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRemove README entry obsoleted by register masks.
Benjamin Kramer [Thu, 12 Apr 2012 12:47:29 +0000 (12:47 +0000)]
Remove README entry obsoleted by register masks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154588 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRemove a remaining reference to the obsolete C backend in configure
Jean-Daniel Dupas [Thu, 12 Apr 2012 12:02:39 +0000 (12:02 +0000)]
Remove a remaining reference to the obsolete C backend in configure

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154587 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix 128-bit ptest intrinsics to take v2i64 instead of v4f32 since these are integer...
Craig Topper [Thu, 12 Apr 2012 07:23:00 +0000 (07:23 +0000)]
Fix 128-bit ptest intrinsics to take v2i64 instead of v4f32 since these are integer instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154580 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoARM 'adr' fixups don't need the interworking addend tweaking.
Jim Grosbach [Thu, 12 Apr 2012 01:19:35 +0000 (01:19 +0000)]
ARM 'adr' fixups don't need the interworking addend tweaking.

They reference the PC directly, so things work properly that way.

rdar://11231229

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154576 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRevert changes that were accidentally committed.
Akira Hatanaka [Wed, 11 Apr 2012 23:19:55 +0000 (23:19 +0000)]
Revert changes that were accidentally committed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154563 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix string that is being checked.
Akira Hatanaka [Wed, 11 Apr 2012 23:11:33 +0000 (23:11 +0000)]
Fix string that is being checked.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154547 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoEmit neg.s or neg.d only if -enable-no-nans-fp-math is supplied by user,
Akira Hatanaka [Wed, 11 Apr 2012 22:59:08 +0000 (22:59 +0000)]
Emit neg.s or neg.d only if -enable-no-nans-fp-math is supplied by user,
otherwise expand FNEG during legalization.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154546 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoEmit abs.s or abs.d only if -enable-no-nans-fp-math is supplied by user.
Akira Hatanaka [Wed, 11 Apr 2012 22:49:04 +0000 (22:49 +0000)]
Emit abs.s or abs.d only if -enable-no-nans-fp-math is supplied by user.
Invalid operation is signaled if the operand of these instructions is NaN.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154545 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFixed a case of ARM disassembly getting an assert on a bad encoding
Kevin Enderby [Wed, 11 Apr 2012 22:40:17 +0000 (22:40 +0000)]
Fixed a case of ARM disassembly getting an assert on a bad encoding
of a VST instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154544 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix bugs in lowering of FCOPYSIGN nodes.
Akira Hatanaka [Wed, 11 Apr 2012 22:13:04 +0000 (22:13 +0000)]
Fix bugs in lowering of FCOPYSIGN nodes.

- FCOPYSIGN nodes that have operands of different types were not handled.
- Different code was generated depending on the endianness of the target.

Additionally, code is added that emits INS and EXT instructions, if they are
supported by target (they are R2 instructions).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154540 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoRemove incorrect comment.
Jim Grosbach [Wed, 11 Apr 2012 21:09:54 +0000 (21:09 +0000)]
Remove incorrect comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154533 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTidy up. Remove hard tab characters.
Jim Grosbach [Wed, 11 Apr 2012 21:02:33 +0000 (21:02 +0000)]
Tidy up. Remove hard tab characters.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154532 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTidy up. Whitespace.
Jim Grosbach [Wed, 11 Apr 2012 21:02:30 +0000 (21:02 +0000)]
Tidy up. Whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154531 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix pasto.
Benjamin Kramer [Wed, 11 Apr 2012 20:20:37 +0000 (20:20 +0000)]
Fix pasto.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154527 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTypo.
Chad Rosier [Wed, 11 Apr 2012 19:21:58 +0000 (19:21 +0000)]
Typo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154522 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTableGen's regpressure: emit per-registerclass weight limits.
Andrew Trick [Wed, 11 Apr 2012 18:16:28 +0000 (18:16 +0000)]
TableGen's regpressure: emit per-registerclass weight limits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154518 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoARM 'vuzp.32 Dd, Dm' is a pseudo-instruction.
Jim Grosbach [Wed, 11 Apr 2012 17:40:18 +0000 (17:40 +0000)]
ARM 'vuzp.32 Dd, Dm' is a pseudo-instruction.

While there is an encoding for it in VUZP, the result of that is undefined,
so we should avoid it. Define the instruction as a pseudo for VTRN.32
instead, as the ARM ARM indicates.

rdar://11222366

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154511 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTableGen'd regpressure: register unit set pruning.
Andrew Trick [Wed, 11 Apr 2012 17:35:26 +0000 (17:35 +0000)]
TableGen'd regpressure: register unit set pruning.

The pruning is more complete if it is not done incrementally. The code
is also a tad less convluted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154510 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoARM 'vzip.32 Dd, Dm' is a pseudo-instruction.
Jim Grosbach [Wed, 11 Apr 2012 16:53:25 +0000 (16:53 +0000)]
ARM 'vzip.32 Dd, Dm' is a pseudo-instruction.

While there is an encoding for it in VZIP, the result of that is undefined,
so we should avoid it. Define the instruction as a pseudo for VTRN.32
instead, as the ARM ARM indicates.

rdar://11221911

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154505 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix the build under Debian GNU/Hurd.
Sylvestre Ledru [Wed, 11 Apr 2012 15:35:36 +0000 (15:35 +0000)]
Fix the build under Debian GNU/Hurd.
Thanks to Pino Toscano for the patch

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154500 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoCache the hash value of the operands in the MDNode.
Benjamin Kramer [Wed, 11 Apr 2012 14:06:54 +0000 (14:06 +0000)]
Cache the hash value of the operands in the MDNode.

FoldingSet is implemented as a chained hash table. When there is a hash
collision during insertion, which is common as we fill the table until a
load factor of 2.0 is hit, we walk the chained elements, comparing every
operand with the new element's operands. This can be very expensive if the
MDNode has many operands.

We sacrifice a word of space in MDNode to cache the full hash value, reducing
compares on collision to a minimum. MDNode grows from 28 to 32 bytes + operands
on x86. On x86_64 the new bits fit nicely into existing padding, not growing
the struct at all.

The actual speedup depends a lot on the test case and is typically between
1% and 2% for C++ code with clang -c -O0 -g.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154497 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFoldingSet: Push the hash through FoldingSetTraits::Equals, so clients can use it.
Benjamin Kramer [Wed, 11 Apr 2012 14:06:47 +0000 (14:06 +0000)]
FoldingSet: Push the hash through FoldingSetTraits::Equals, so clients can use it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154496 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoCompute hashes directly with hash_combine instead of taking a detour through FoldingS...
Benjamin Kramer [Wed, 11 Apr 2012 14:06:39 +0000 (14:06 +0000)]
Compute hashes directly with hash_combine instead of taking a detour through FoldingSetNodeID.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154495 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoremove unused argument
Nadav Rotem [Wed, 11 Apr 2012 11:05:21 +0000 (11:05 +0000)]
remove unused argument

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154494 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd a C binding to the Target and TargetMachine classes to allow for emitting
Duncan Sands [Wed, 11 Apr 2012 10:25:24 +0000 (10:25 +0000)]
Add a C binding to the Target and TargetMachine classes to allow for emitting
binary and assembly. Patch by Carlo Kok.  Emitting was inspired by but not based
on the D llvm bindings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154493 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd two statistics to help track how we are computing the inline cost.
Chandler Carruth [Wed, 11 Apr 2012 10:15:10 +0000 (10:15 +0000)]
Add two statistics to help track how we are computing the inline cost.

Yea, 'NumCallerCallersAnalyzed' isn't a great name, suggestions welcome.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154492 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoReapply 154397. Original message:
Nadav Rotem [Wed, 11 Apr 2012 08:26:11 +0000 (08:26 +0000)]
Reapply 154397. Original message:

Fix a dagcombine optimization which assumes that the vsetcc result type is always
of the same size as the compared values. This is ture for SSE/AVX/NEON but not
for all targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154490 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoComment typo fix.
Duncan Sands [Wed, 11 Apr 2012 08:13:47 +0000 (08:13 +0000)]
Comment typo fix.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154488 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd more fused mul+add/sub patterns. rdar://10139676
Evan Cheng [Wed, 11 Apr 2012 06:59:47 +0000 (06:59 +0000)]
Add more fused mul+add/sub patterns. rdar://10139676

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154484 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoReapply 154396 after fixing a test.
Nadav Rotem [Wed, 11 Apr 2012 06:40:27 +0000 (06:40 +0000)]
Reapply 154396 after fixing a test.

Original message:
Modify the code that lowers shuffles to blends from using blendvXX to vblendXX.
blendV uses a register for the selection while Vblend uses an immediate.
On sandybridge they still have the same latency and execute on the same execution ports.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154483 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoClean up ARM fused multiply + add/sub support some more: rename some isel
Evan Cheng [Wed, 11 Apr 2012 05:33:07 +0000 (05:33 +0000)]
Clean up ARM fused multiply + add/sub support some more: rename some isel
predicates.
Also remove NEON2 since it's not really useful and it is confusing. If
NEON + VFP4 implies NEON2 but NEON2 doesn't imply NEON + VFP4, what does it
really mean?

rdar://10139676

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154480 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix an overly indented line. Remove an 'else' after an 'if' that returns.
Craig Topper [Wed, 11 Apr 2012 04:55:51 +0000 (04:55 +0000)]
Fix an overly indented line. Remove an 'else' after an 'if' that returns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154479 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoInline implVisitAluOverflow by introducing a nested switch to convert the intrinsic...
Craig Topper [Wed, 11 Apr 2012 04:34:11 +0000 (04:34 +0000)]
Inline implVisitAluOverflow by introducing a nested switch to convert the intrinsic to an nodetype.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154478 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTablegen'd regpressure: emit the weighted pressure limit.
Andrew Trick [Wed, 11 Apr 2012 04:31:33 +0000 (04:31 +0000)]
Tablegen'd regpressure: emit the weighted pressure limit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154477 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTable-generated register pressure fixes.
Andrew Trick [Wed, 11 Apr 2012 03:19:15 +0000 (03:19 +0000)]
Table-generated register pressure fixes.

Handle mixing allocatable and unallocatable register gracefully.
Simplify the pruning of register unit sets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154474 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoOptimize code a bit by calling push_back only once in some loops. Reduces compiled...
Craig Topper [Wed, 11 Apr 2012 03:06:35 +0000 (03:06 +0000)]
Optimize code a bit by calling push_back only once in some loops. Reduces compiled code size a bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154473 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMatch (fneg (fma) to vfnma. rdar://10139676
Evan Cheng [Wed, 11 Apr 2012 01:21:25 +0000 (01:21 +0000)]
Match (fneg (fma) to vfnma. rdar://10139676

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154469 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoAdd retw and lretw instructions. Also, fix Intel syntax parsing for all
Charles Davis [Wed, 11 Apr 2012 01:10:53 +0000 (01:10 +0000)]
Add retw and lretw instructions. Also, fix Intel syntax parsing for all
ret instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154468 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoMerge fma.ll into fusedMAC.ll
Evan Cheng [Wed, 11 Apr 2012 01:03:11 +0000 (01:03 +0000)]
Merge fma.ll into fusedMAC.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154466 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix ARM disassembly of VLD instructions with writebacks.  And add test a case
Kevin Enderby [Wed, 11 Apr 2012 00:25:40 +0000 (00:25 +0000)]
Fix ARM disassembly of VLD instructions with writebacks.  And add test a case
for all opcodes handed by DecodeVLDInstruction() in ARMDisassembler.cpp .

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154459 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoARM add missing Thumb1 two-operand aliases for shift-by-immediate.
Jim Grosbach [Wed, 11 Apr 2012 00:15:16 +0000 (00:15 +0000)]
ARM add missing Thumb1 two-operand aliases for shift-by-immediate.

rdar://11222742

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154457 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoFix a number of problems with ARM fused multiply add/subtract instructions.
Evan Cheng [Wed, 11 Apr 2012 00:13:00 +0000 (00:13 +0000)]
Fix a number of problems with ARM fused multiply add/subtract instructions.
1. The new instruction itinerary entries are not properly described.
2. The asm parser can't handle vfms and vfnms.
3. There were no assembler, disassembler test cases.
4. HasNEON2 has the wrong assembler predicate.
rdar://10139676

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154456 91177308-0d34-0410-b5e6-96231b3b80d8

12 years agoTweak MachineLICM heuristics for cheap instructions.
Jakob Stoklund Olesen [Wed, 11 Apr 2012 00:00:28 +0000 (00:00 +0000)]
Tweak MachineLICM heuristics for cheap instructions.

Allow cheap instructions to be hoisted if they are register pressure
neutral or better. This happens if the instruction is the last loop use
of another virtual register.

Only expensive instructions are allowed to increase loop register
pressure.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154455 91177308-0d34-0410-b5e6-96231b3b80d8