implementation keyword is going .. going .. gone.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35404 91177308-0d34-0410-b5e6-96231b3b80d8

GEP index sinking fixes:
1) Take address scale into consideration. e.g. i32* -> scale 4.
2) Examine all the users of GEP.
3) Generalize to inter-block GEP's (no longer uses loopinfo).
4) Don't do xform if GEP has other variable index(es).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35403 91177308-0d34-0410-b5e6-96231b3b80d8

don't use 'not' when we can use a positive test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35402 91177308-0d34-0410-b5e6-96231b3b80d8

new test case for PR1280

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35401 91177308-0d34-0410-b5e6-96231b3b80d8

For PR1280:
When converting an add/xor/and triplet into a trunc/sext, only do so if the
intermediate integer type is a bitwidth that the targets can handle.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35400 91177308-0d34-0410-b5e6-96231b3b80d8

For PR1280:
Remove test cases for and/xor/add -> trunc/sext that use bit widths that
the targets cannot code gen.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35399 91177308-0d34-0410-b5e6-96231b3b80d8

Added a test case for PR1279.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35398 91177308-0d34-0410-b5e6-96231b3b80d8

new testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35397 91177308-0d34-0410-b5e6-96231b3b80d8

Fix for PR1279. Dead def has a live interval of length 1. Copy coalescing should
not violate that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35396 91177308-0d34-0410-b5e6-96231b3b80d8

upgrade a random test

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35395 91177308-0d34-0410-b5e6-96231b3b80d8

Remove cruft I put in there...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35394 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a problem building llvm-gcc on amd64-unknown-freebsd6.2, due to the
system assembler not groking legal instructions like "leal (,%esi,8), %ecx".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35393 91177308-0d34-0410-b5e6-96231b3b80d8

Unbreak mmx arithmetic. It was barfing trying to do v8i8 arithmetic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35392 91177308-0d34-0410-b5e6-96231b3b80d8

new testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35391 91177308-0d34-0410-b5e6-96231b3b80d8

Fixing doxygen.cfg target. I'm not a makefile expert, so hopefully this correct.Tested doxygen generation on zion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35390 91177308-0d34-0410-b5e6-96231b3b80d8

Add the "unpack low packed data" instructions. This should be the last of
the MMX instructions that are needed...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35389 91177308-0d34-0410-b5e6-96231b3b80d8

Use SmallPtrSet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35388 91177308-0d34-0410-b5e6-96231b3b80d8

Test that a VIEW_CONVERT_EXPR used as an lvalue has the right type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35387 91177308-0d34-0410-b5e6-96231b3b80d8

Add better support for keywords.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35386 91177308-0d34-0410-b5e6-96231b3b80d8

Fix so that pandn is emitted instead of an xor/and combo. Add integer
comparison operators.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35385 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for integer comparison builtins.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35384 91177308-0d34-0410-b5e6-96231b3b80d8

Unbreaks non-debug builds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35383 91177308-0d34-0410-b5e6-96231b3b80d8

"The C standards do say that "char" may either be a "signed char" or "unsigned
char" and it is up to the compilers implementation or the platform which is
followed."
http://www.arm.linux.org.uk/docs/faqs/signedchar.php

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35382 91177308-0d34-0410-b5e6-96231b3b80d8

bugfix: sometimes the spiller puts a load between the "mov lr, pc" and "bx" of a CALL_NOLINK.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35381 91177308-0d34-0410-b5e6-96231b3b80d8

Remove dead code

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35380 91177308-0d34-0410-b5e6-96231b3b80d8

Split big monster into small helpers. No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35379 91177308-0d34-0410-b5e6-96231b3b80d8

For PR1276:
Allow doxygen documentation to be rebuilt manually with "make regendoc"
separately from "make install".

Patch by Scott Michel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35378 91177308-0d34-0410-b5e6-96231b3b80d8

For PR601:
Add a little flesh to the document skeleton.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35377 91177308-0d34-0410-b5e6-96231b3b80d8

SDISel does not preserve all, it changes CFG and other info.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35376 91177308-0d34-0410-b5e6-96231b3b80d8

Don't call getOperandConstraint() if operand index is greater than
TID->numOperands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35375 91177308-0d34-0410-b5e6-96231b3b80d8

Spell check.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35374 91177308-0d34-0410-b5e6-96231b3b80d8

Implement some minor review feedback.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35373 91177308-0d34-0410-b5e6-96231b3b80d8

Another test case for PR1271 where bad shift masks were generated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35372 91177308-0d34-0410-b5e6-96231b3b80d8

For PR1271:
Fix another incorrectly converted shift mask.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35371 91177308-0d34-0410-b5e6-96231b3b80d8

Reduce malloc/free traffic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35370 91177308-0d34-0410-b5e6-96231b3b80d8

It is not possible to determie dominance between two PHI nodes
based on their ordering.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35369 91177308-0d34-0410-b5e6-96231b3b80d8

Use std::vector<DFCalculateWorkObject> instead of
std::vector<DFCalculateWorkObject *> to reduce malloc/free traffic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35368 91177308-0d34-0410-b5e6-96231b3b80d8

Test case for PR1266.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35367 91177308-0d34-0410-b5e6-96231b3b80d8

findRegisterUseOperand() changed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35366 91177308-0d34-0410-b5e6-96231b3b80d8

Fix for PR1266. Don't mark a two address operand IsKill.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35365 91177308-0d34-0410-b5e6-96231b3b80d8

For PR1277:
Implement error handling for bytecode parsing.

Patch by Scott Michel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35364 91177308-0d34-0410-b5e6-96231b3b80d8

Change findRegisterUseOperand() to return operand index instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35363 91177308-0d34-0410-b5e6-96231b3b80d8

Fix reversed logic in getRegsUsed.  Rename RegStates to RegsAvailable to
hopefully forestall similar errors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35362 91177308-0d34-0410-b5e6-96231b3b80d8

eliminate use of std::set

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35361 91177308-0d34-0410-b5e6-96231b3b80d8

Add a comment to explain a folding transform.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35360 91177308-0d34-0410-b5e6-96231b3b80d8

Fix this test case to match output after a bug was fixed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35359 91177308-0d34-0410-b5e6-96231b3b80d8

Get better debug output by having modified instructions print both the
original and new instruction. A slight performance hit with ostringstream
but it is only for debug.
Also, clean up an uninitialized variable warning noticed in a release build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35358 91177308-0d34-0410-b5e6-96231b3b80d8

Get the number of bits to set in a mask correct for a shl/lshr transform.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35357 91177308-0d34-0410-b5e6-96231b3b80d8

Fix testsuite hang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35355 91177308-0d34-0410-b5e6-96231b3b80d8

For PR601:
Initial skeleton for pass documentation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35354 91177308-0d34-0410-b5e6-96231b3b80d8

Promote to v1i64 type...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35353 91177308-0d34-0410-b5e6-96231b3b80d8

Updated.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35352 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for the v1i64 type. This makes better code for this:

#include <mmintrin.h>

extern __m64 C;

void baz(__v2si *A, __v2si *B)
{
  *A = C;
  _mm_empty();
}

We get this:

_baz:
        call "L1$pb"
"L1$pb":
        popl %eax
        movl L_C$non_lazy_ptr-"L1$pb"(%eax), %eax
        movq (%eax), %mm0
        movl 4(%esp), %eax
        movq %mm0, (%eax)
        emms
        ret

GCC gives us this:

_baz:
        pushl   %ebx
        call    L3
"L00000000001$pb":
L3:
        popl    %ebx
        subl    $8, %esp
        movl    L_C$non_lazy_ptr-"L00000000001$pb"(%ebx), %eax
        movl    (%eax), %edx
        movl    4(%eax), %ecx
        movl    16(%esp), %eax
        movl    %edx, (%eax)
        movl    %ecx, 4(%eax)
        emms
        addl    $8, %esp
        popl    %ebx
        ret

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35351 91177308-0d34-0410-b5e6-96231b3b80d8

SIGN_EXTEND_INREG requires one extra operand, a ValueType node.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35350 91177308-0d34-0410-b5e6-96231b3b80d8

Test case for PR1271 involving construction of a bad mask to replace a
shift instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35349 91177308-0d34-0410-b5e6-96231b3b80d8

For PR1271:
Fix SingleSource/Regression/C/2003-05-21-UnionBitFields.c by changing a
getHighBitsSet call to getLowBitsSet call that was incorrectly converted
from the original lshr constant expression.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35348 91177308-0d34-0410-b5e6-96231b3b80d8

Look through bitcast when finding IVs.  (Chris' patch really.)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35347 91177308-0d34-0410-b5e6-96231b3b80d8

Start value symbol tables out small (space for 16 elts), not huge (space for 512).

This is particularly useful for the JIT, which lazily deserializes functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35346 91177308-0d34-0410-b5e6-96231b3b80d8

Add "feature" testcase for new switch lowering code

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35345 91177308-0d34-0410-b5e6-96231b3b80d8

Compute getLowBitsSet correctly. Using the complement of a 64-bit value
and shifting down without regard for the bitwidth of the APInt can lead
to incorrect initialization values. Instead, check for the word size case
(to avoid undef results from shift) and then do (1 << loBitsSet) - 1

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35344 91177308-0d34-0410-b5e6-96231b3b80d8

Add a test case for PR1271 (necessary, but not sufficient).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35343 91177308-0d34-0410-b5e6-96231b3b80d8

For PR1271:
Remove a use of getLowBitsSet that caused the mask used for replacement of
shl/lshr pairs with an AND instruction to be computed incorrectly. Its not
clear exactly why this is the case. This solves the disappearing shifts
problem, but it doesn't fix Regression/C/2003-05-21-UnionBitFields. It
seems there is more going on.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35342 91177308-0d34-0410-b5e6-96231b3b80d8

implement Transforms/InstCombine/cast2.ll:test3 and PR1263

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35341 91177308-0d34-0410-b5e6-96231b3b80d8

new testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35340 91177308-0d34-0410-b5e6-96231b3b80d8

Some cleanup from review:
* Don't assume shift amounts are <= 64 bits
* Avoid creating an extra APInt in SubOne and AddOne by using -- and ++
* Add another use of getLowBitsSet
* Convert a series of if statements to a switch

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35339 91177308-0d34-0410-b5e6-96231b3b80d8

First step of switch lowering refactoring: perform worklist-driven
strategy, emit JT's where possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35338 91177308-0d34-0410-b5e6-96231b3b80d8

Fix authorship

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35337 91177308-0d34-0410-b5e6-96231b3b80d8

fold constantexprs more aggressively, fixing PR1265

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35336 91177308-0d34-0410-b5e6-96231b3b80d8

Refactor several ConstantExpr::getXXX calls with ConstantInt arguments
using the facilities of APInt. While this duplicates a tiny fraction of
the constant folding code, it also makes the code easier to read and
avoids large ConstantExpr overhead for simple, known computations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35335 91177308-0d34-0410-b5e6-96231b3b80d8

add a note

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35334 91177308-0d34-0410-b5e6-96231b3b80d8

1. Avoid unnecessary APInt construction if possible.
2. Use isStrictlyPositive() instead of isPositive() in two places where
   they need APInt value > 0 not only >=0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35333 91177308-0d34-0410-b5e6-96231b3b80d8

Implement support for vector operands to inline asm, implementing
CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35332 91177308-0d34-0410-b5e6-96231b3b80d8

new testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35331 91177308-0d34-0410-b5e6-96231b3b80d8

add a note

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35330 91177308-0d34-0410-b5e6-96231b3b80d8

Fix CodeGen/PowerPC/2007-03-24-cntlzd.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35329 91177308-0d34-0410-b5e6-96231b3b80d8

test that the ppc backend can do 64-bit cntlz

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35328 91177308-0d34-0410-b5e6-96231b3b80d8

implement initial support for the silly X constraint.  Testcase here: CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35327 91177308-0d34-0410-b5e6-96231b3b80d8

new testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35326 91177308-0d34-0410-b5e6-96231b3b80d8

Make more uses of getHighBitsSet and get rid of some pointless & of an
APInt with its type mask.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35325 91177308-0d34-0410-b5e6-96231b3b80d8

Implement CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35324 91177308-0d34-0410-b5e6-96231b3b80d8

new testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35323 91177308-0d34-0410-b5e6-96231b3b80d8

switch TargetLowering::getConstraintType to take the entire constraint,
not just the first letter.  No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35322 91177308-0d34-0410-b5e6-96231b3b80d8

More APIntification:
* Convert the last use of a uint64_t that should have been an APInt.
* Change ComputeMaskedBits to have a const reference argument for the Mask
  so that recursions don't cause unneeded temporaries. This causes temps
  to be needed in other places (where the mask has to change) but this
  change optimizes for the recursion which is more frequent.
* Remove two instances of &ing a Mask with getAllOnesValue. Its not
  needed any more because APInt is accurate in its bit computations.
* Start using the getLowBitsSet and getHighBits set methods on APInt
  instead of shifting. This makes it more clear in the code what is
  going on.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35321 91177308-0d34-0410-b5e6-96231b3b80d8

Allow the b/h/w/k constraints to be applied to values that have multiple alternatives, and end up not being registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35320 91177308-0d34-0410-b5e6-96231b3b80d8

enforce the proper range for the i386 N constraint.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35319 91177308-0d34-0410-b5e6-96231b3b80d8

Fix test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35318 91177308-0d34-0410-b5e6-96231b3b80d8

new testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35317 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a typo in a comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35316 91177308-0d34-0410-b5e6-96231b3b80d8

Actually, for getHighBitsSet and getLowBitsSet, don't make a 0 bit size
illegal. Instead do the 0 valued construction for the user. This is because
the caller may not know (or care to check) that the number of bits set is
zero.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35315 91177308-0d34-0410-b5e6-96231b3b80d8

fix a regression on vector or instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35314 91177308-0d34-0410-b5e6-96231b3b80d8

Make it illegal to set 0 bits in getHighBitsSet and getLowBitsSet. For that
they should have used the uint64_t constructor. This avoids causing
undefined results via shifts by the word size when the bit width is an
exact multiple of the word size.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35313 91177308-0d34-0410-b5e6-96231b3b80d8

In the getBitsSet function, don't optimize for a common case that is
already covered by getLowBitsSet (i.e. when loBits==0). Consequently, remove
the default value for loBits and reorder the arguments to the more natural
loBits, hiBits order. This makes it more clear that this function is for bit
groups in the middle of the bit width and not towards one end or the other.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35312 91177308-0d34-0410-b5e6-96231b3b80d8

Don't invoke undefined behavior in shifts in the functions getHighBitsSet
and getLowBitsSet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35311 91177308-0d34-0410-b5e6-96231b3b80d8

Implement the getBitsSet function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35310 91177308-0d34-0410-b5e6-96231b3b80d8

Remove the last vestiges of this directory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35309 91177308-0d34-0410-b5e6-96231b3b80d8

Implement the getHighBitsSet and getLowBitsSet functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35308 91177308-0d34-0410-b5e6-96231b3b80d8

Get the signs in the right place!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35307 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a link.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35306 91177308-0d34-0410-b5e6-96231b3b80d8

Undo the last change and make this really implement remainder and not
modulus. The previous change was a result of incorrect documentation in
the LangRef.html.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35305 91177308-0d34-0410-b5e6-96231b3b80d8

Flip the srem tests around. Previous commit was to correct an apparent
bug in the srem implementation. Turns out it was a documentation bug
instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35304 91177308-0d34-0410-b5e6-96231b3b80d8