oota-llvm.git
10 years agoImplement the .ltorg directive for ARM assembly
David Peixotto [Thu, 19 Dec 2013 18:26:07 +0000 (18:26 +0000)]
Implement the .ltorg directive for ARM assembly

This directive will write out the assembler-maintained constant
pool for the current section. These constant pools are created to
support the ldr-pseudo instruction (e.g. ldr r0, =val).

The directive can be used by the programmer to place the constant
pool in a location that can be reached by a pc-relative offset in
the ldr instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197711 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoUnbreak ARM buildbots after r197653 by forcing the target triple on this test.
Josh Magee [Thu, 19 Dec 2013 18:14:42 +0000 (18:14 +0000)]
Unbreak ARM buildbots after r197653 by forcing the target triple on this test.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197709 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoImplement the ldr-pseudo opcode for ARM assembly
David Peixotto [Thu, 19 Dec 2013 18:12:36 +0000 (18:12 +0000)]
Implement the ldr-pseudo opcode for ARM assembly

The ldr-pseudo opcode is a convenience for loading 32-bit constants.
It is converted into a pc-relative load from a constant pool. For
example,

  ldr r0, =0x10001
  ldr r1, =bar

will generate this output in the final assembly

  ldr r0, .Ltmp0
  ldr r1, .Ltmp1
  ...
  .Ltmp0: .long 0x10001
  .Ltmp1: .long bar

Sketch of the LDR pseudo implementation:
  Keep a map from Section => ConstantPool

  When parsing ldr r0, =val
    parse val as an MCExpr
    get ConstantPool for current Section
    Label = CreateTempSymbol()
    remember val in ConstantPool at next free slot
    add operand to ldr that is MCSymbolRef of Label

  On finishParse() callback
    Write out all non-empty constant pools
    for each Entry in ConstantPool
      Emit Entry.Label
      Emit Entry.Value

Possible improvements to be added in a later patch:
  1. Does not convert load of small constants to mov
     (e.g. ldr r0, =0x1 => mov r0, 0x1)
  2. Does reuse constant pool entries for same constant

The implementation was tested for ARM, Thumb1, and Thumb2 targets on
linux and darwin.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197708 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd a finishParse() callback to the targer asm parser
David Peixotto [Thu, 19 Dec 2013 18:08:08 +0000 (18:08 +0000)]
Add a finishParse() callback to the targer asm parser

This callback is invoked when the parse has finished successfuly. It
will be used to write out ARM constant pools to implement the ldr
pseudo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197706 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoImproved fix for PR17827 (instcombine of shift/and/compare).
Kay Tiong Khoo [Thu, 19 Dec 2013 18:07:17 +0000 (18:07 +0000)]
Improved fix for PR17827 (instcombine of shift/and/compare).

This change fixes the case of arithmetic shift right - do not attempt to fold that case.
This change also relaxes the conditions when attempting to fold the logical shift right and shift left cases.

No additional IR-level test cases included at this time. See http://llvm.org/bugs/show_bug.cgi?id=17827 for proofs that these are correct transformations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197705 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRevert r197682, "[CMake] Introduce LIT in add_lit_target."
NAKAMURA Takumi [Thu, 19 Dec 2013 17:11:08 +0000 (17:11 +0000)]
Revert r197682, "[CMake] Introduce LIT in add_lit_target."

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197703 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoMove testcase to the appropriate X86 subdirectory.
Adrian Prantl [Thu, 19 Dec 2013 17:09:05 +0000 (17:09 +0000)]
Move testcase to the appropriate X86 subdirectory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197701 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoSmall simplification, p0 is the same as p.
Rafael Espindola [Thu, 19 Dec 2013 16:51:03 +0000 (16:51 +0000)]
Small simplification, p0 is the same as p.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197699 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoSupport for microMIPS control instructions.
Zoran Jovanovic [Thu, 19 Dec 2013 16:25:00 +0000 (16:25 +0000)]
Support for microMIPS control instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197696 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoLong doubles are required to be aligned to 128 bits and svr4 32 bits.
Rafael Espindola [Thu, 19 Dec 2013 16:23:59 +0000 (16:23 +0000)]
Long doubles are required to be aligned to 128 bits and svr4 32 bits.

Clang was already getting this right.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197694 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd a disassembler to the PowerPC backend
Hal Finkel [Thu, 19 Dec 2013 16:13:01 +0000 (16:13 +0000)]
Add a disassembler to the PowerPC backend

The tests for the disassembler were adapted from the encoder tests, and for the
most part, the output from the disassembler matches that encoder-test inputs.
There are some places where more-informative mnemonics could be produced
(notably for the branch instructions), and those cases are noted in the tests
with FIXMEs.

Future work includes:

 - Generating more-informative mnemonics when possible (this may also be done
   in the printer).

 - Remove the dependence on positional "numbered" operand-to-variable mapping
   (for both encoding and decoding).

 - Internally using 64-bit instruction variants in 64-bit mode (if this turns
   out to matter).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197693 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoSupport for microMIPS LL and SC instructions.
Zoran Jovanovic [Thu, 19 Dec 2013 16:12:56 +0000 (16:12 +0000)]
Support for microMIPS LL and SC instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197692 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd support for positionally-encoded operands to FixedLenDecoderEmitter
Hal Finkel [Thu, 19 Dec 2013 16:12:53 +0000 (16:12 +0000)]
Add support for positionally-encoded operands to FixedLenDecoderEmitter

Unfortunately, the PowerPC instruction definitions make heavy use of the
positional operand encoding heuristic to map operands onto bitfield variables
in the instruction definitions. Changing this to use name-based mapping is not
trivial, however, because additional infrastructure needs to be designed to
handle mapping of complex operands (with multiple suboperands) onto multiple
bitfield variables.

In the mean time, this adds support for positionally encoded operands to
FixedLenDecoderEmitter, so that we can generate a disassembler for the PowerPC
backend. To prevent an accidental reliance on this feature, and to prevent an
undesirable interaction with existing disassemblers, a backend must opt-in to
this support by setting the new decodePositionallyEncodedOperands
instruction-set bit to true.

When enabled, this iterates the variables that contribute to the instruction
encoding, just as the encoder does, and emulates the procedure the encoder uses
to map "numbered" operands to variables. The bit range for each variable is
also determined as the encoder determines them. This map is then consulted
during the decoder-generator's loop over operands to decode, allowing the
decoder to understand both position-based and name-based operand-to-variable
mappings.

As noted in the comment on the decodePositionallyEncodedOperands definition,
this support should be removed once it is no longer needed. There should be no
change to existing disassemblers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197691 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd a triple so that this passes on OS X.
Rafael Espindola [Thu, 19 Dec 2013 16:06:33 +0000 (16:06 +0000)]
Add a triple so that this passes on OS X.

I am surprised I am the first one to notice this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197689 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoSupport for microMIPS TLS relocations.
Zoran Jovanovic [Thu, 19 Dec 2013 16:02:32 +0000 (16:02 +0000)]
Support for microMIPS TLS relocations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197685 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agollvm-config: Don't show build tree with --obj-root for installed llvm-config. Show...
NAKAMURA Takumi [Thu, 19 Dec 2013 16:02:28 +0000 (16:02 +0000)]
llvm-config: Don't show build tree with --obj-root for installed llvm-config. Show $(prefix) instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197684 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agollvm-config: Show build root instead of parent path in build tree with --obj-root...
NAKAMURA Takumi [Thu, 19 Dec 2013 16:02:23 +0000 (16:02 +0000)]
llvm-config: Show build root instead of parent path in build tree with --obj-root for CMake multiconfig.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197683 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[CMake] Introduce LIT in add_lit_target.
NAKAMURA Takumi [Thu, 19 Dec 2013 16:02:17 +0000 (16:02 +0000)]
[CMake] Introduce LIT in add_lit_target.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197682 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd support for PointerLikeRegClass to FixedLenDecoderEmitter
Hal Finkel [Thu, 19 Dec 2013 14:58:22 +0000 (14:58 +0000)]
Add support for PointerLikeRegClass to FixedLenDecoderEmitter

This is more prep for adding the PowerPC disassembler. FixedLenDecoderEmitter
should recognize PointerLikeRegClass operands as register types, and generate
register-like decoding calls instead of treating them like immediates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197680 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[dfsan] Simplify code after r197677.
Evgeniy Stepanov [Thu, 19 Dec 2013 14:37:03 +0000 (14:37 +0000)]
[dfsan] Simplify code after r197677.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197679 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd an explicit insert point argument to SplitBlockAndInsertIfThen.
Evgeniy Stepanov [Thu, 19 Dec 2013 13:29:56 +0000 (13:29 +0000)]
Add an explicit insert point argument to SplitBlockAndInsertIfThen.

Currently SplitBlockAndInsertIfThen requires that branch condition is an
Instruction itself, which is very inconvenient, because it is sometimes an
Operator, or even a Constant.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197677 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoTeach the llvm-readobj COFF dumper to dump debug line tables from object files
Timur Iskhodzhanov [Thu, 19 Dec 2013 11:37:14 +0000 (11:37 +0000)]
Teach the llvm-readobj COFF dumper to dump debug line tables from object files

Reviewed at http://llvm-reviews.chandlerc.com/D2425

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197674 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRemove the COFF files with Z7 debug info from the repo
Timur Iskhodzhanov [Thu, 19 Dec 2013 11:30:21 +0000 (11:30 +0000)]
Remove the COFF files with Z7 debug info from the repo

Rationale: going to land D2425 shortly.
I'll re-land these COFF files along with D2425 to simplify the SVN history

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197673 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd REQUIRES:asserts to 3 tests in llvm/test/CodeGen/R600 added in r192212.
NAKAMURA Takumi [Thu, 19 Dec 2013 10:41:12 +0000 (10:41 +0000)]
Add REQUIRES:asserts to 3 tests in llvm/test/CodeGen/R600 added in r192212.

They are failing in assertions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197669 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agollvm-config: Introduce --system-libs to print SYSTEM_LIBS, and deprecate SYSTEM_LIBS...
NAKAMURA Takumi [Thu, 19 Dec 2013 08:46:36 +0000 (08:46 +0000)]
llvm-config: Introduce --system-libs to print SYSTEM_LIBS, and deprecate SYSTEM_LIBS in --ldflags.

Although --system-libs is expected to use after --libs, it can be used alone.

  $ bin/llvm-config --ldflags
  -L/path/to/llvm/objroot/lib

  $ bin/llvm-config --libs object
  -lLLVMObject -lLLVMSupport

  $ bin/llvm-config --system-libs
    (Blank line. "all" is assumed but nothing is printed.)
  -lrt -ldl -ltinfo -lpthread -lz

  $ bin/llvm-config --ldflags --libs --system-libs object
  -L/path/to/llvm/objroot/lib
  -lLLVMObject -lLLVMSupport
  -lrt -ldl -ltinfo -lpthread -lz

It is reimplementation of r197380, and workaround for PR3347 and PR8449.

FIXME: Each LLVM component may have its dependent system libs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197664 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoGCOV.cpp: Fix format strings, %lf. Don't use %lf to double.
NAKAMURA Takumi [Thu, 19 Dec 2013 08:46:28 +0000 (08:46 +0000)]
GCOV.cpp: Fix format strings, %lf. Don't use %lf to double.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197663 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoIntroduce clean-ups in llvm/unittests/Makefile.unittest, to sweep stray *Tests.
NAKAMURA Takumi [Thu, 19 Dec 2013 07:09:28 +0000 (07:09 +0000)]
Introduce clean-ups in llvm/unittests/Makefile.unittest, to sweep stray *Tests.

Stray *Tests might stay after reverting.

FIXME: Could we apply this feature to clang/unittests?
FIXME: Implement this feature to CMake.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197661 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoR600/SI: Make private pointers be 32-bit.
Matt Arsenault [Thu, 19 Dec 2013 05:32:55 +0000 (05:32 +0000)]
R600/SI: Make private pointers be 32-bit.

Different sized address spaces should theoretically work
most of the time now, and since 64-bit add is currently
disabled, using more 32-bit pointers fixes some cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197659 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix missing C++ mode comment
Matt Arsenault [Thu, 19 Dec 2013 05:32:44 +0000 (05:32 +0000)]
Fix missing C++ mode comment

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197658 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoARM IAS: support .inst directive
Saleem Abdulrasool [Thu, 19 Dec 2013 05:17:58 +0000 (05:17 +0000)]
ARM IAS: support .inst directive

This adds support for the .inst directive.  This is an ARM specific directive to
indicate an instruction encoded as a constant expression.  The major difference
between .word, .short, or .byte and .inst is that the latter will be
disassembled as an instruction since it does not get flagged as data.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197657 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoNo point in having a "#if 0"ed unittest.
Rafael Espindola [Thu, 19 Dec 2013 03:44:13 +0000 (03:44 +0000)]
No point in having a "#if 0"ed unittest.

It is also not clear what the value of the test was. The API is used from
existing tools and can (and is) tested with lit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197654 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[stackprotector] Use analysis from the StackProtector pass for stack layout in PEI...
Josh Magee [Thu, 19 Dec 2013 03:17:11 +0000 (03:17 +0000)]
[stackprotector] Use analysis from the StackProtector pass for stack layout in PEI a nd LocalStackSlot passes.

This changes the MachineFrameInfo API to use the new SSPLayoutKind information
produced by the StackProtector pass (instead of a boolean flag) and updates a
few pass dependencies (to preserve the SSP analysis).

The stack layout follows the same approach used prior to this change - i.e.,
only LargeArray stack objects will be placed near the canary and everything
else will be laid out normally.  After this change, structures containing large
arrays will also be placed near the canary - a case previously missed by the
old implementation.

Out of tree targets will need to update their usage of
MachineFrameInfo::CreateStackObject to remove the MayNeedSP argument.

The next patch will implement the rules for sspstrong and sspreq.  The end goal
is to support ssp-strong stack layout rules.

WIP.

Differential Revision: http://llvm-reviews.chandlerc.com/D2158

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197653 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix a buffer overrun detected by AddressSanitizer.
Anna Zaks [Thu, 19 Dec 2013 02:35:26 +0000 (02:35 +0000)]
Fix a buffer overrun detected by AddressSanitizer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197647 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd stack alignment information for Sparc.
Rafael Espindola [Thu, 19 Dec 2013 02:21:16 +0000 (02:21 +0000)]
Add stack alignment information for Sparc.

This matches the data in clang which was added by Jakob Stoklund Olesen in
r179596.

Thanks for erikjv on irc for pointing me to the relevant documents:
http://sparc.com/standards/64.psabi.1.35.ps.Z
page 25: Every stack frame must be 16-byte aligned.

http://sparc.com/standards/psABI3rd.pdf
page 3-10: Although the architecture requires only word alignment, software convention and the operating system require every stack frame to be doubleword aligned.

I tried to add a test, but it looks like sparc doesn't implement dynamic stack
realignment. This will be tested in clang shortly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197646 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoBegin adding docs and IR-level support for the inalloca attribute
Reid Kleckner [Thu, 19 Dec 2013 02:14:12 +0000 (02:14 +0000)]
Begin adding docs and IR-level support for the inalloca attribute

The inalloca attribute is designed to support passing C++ objects by
value in the Microsoft C++ ABI.  It behaves the same as byval, except
that it always implies that the argument is in memory and that the bytes
are never copied.  This attribute allows the caller to take the address
of an outgoing argument's memory and execute arbitrary code to store
into it.

This patch adds basic IR support, docs, and verification.  It does not
attempt to implement any lowering or fix any possibly broken transforms.

When this patch lands, a complete description of this feature should
appear at http://llvm.org/docs/InAlloca.html .

Differential Revision: http://llvm-reviews.chandlerc.com/D2173

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197645 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoadd source in comment
Adrian Prantl [Thu, 19 Dec 2013 01:41:16 +0000 (01:41 +0000)]
add source in comment

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197642 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoSynchronize the NaCl DataLayout strings with the ones in clang.
Rafael Espindola [Thu, 19 Dec 2013 00:44:37 +0000 (00:44 +0000)]
Synchronize the NaCl DataLayout strings with the ones in clang.

Patch by Derek Schuff.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197640 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoMake cosmetic changes as part of Mips internal post commit review of
Reed Kotler [Thu, 19 Dec 2013 00:43:08 +0000 (00:43 +0000)]
Make cosmetic changes as part of Mips internal post commit review of
patch r196331.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197638 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoArchiveFileDescriptorTests: Fix CMake build. Each unit test is expected to have suffi...
NAKAMURA Takumi [Thu, 19 Dec 2013 00:41:08 +0000 (00:41 +0000)]
ArchiveFileDescriptorTests: Fix CMake build. Each unit test is expected to have suffix "*Tests" for lit gtest runner to seek one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197636 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoArchiveFileDescriptorTests: Resurrect part of r197600, but make it invalidated, to...
NAKAMURA Takumi [Thu, 19 Dec 2013 00:41:03 +0000 (00:41 +0000)]
ArchiveFileDescriptorTests: Resurrect part of r197600, but make it invalidated, to appease buildbots.

Please revert this several hours later ;)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197635 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agollvm-cov: Added -f option for function summaries.
Yuchen Wu [Thu, 19 Dec 2013 00:29:25 +0000 (00:29 +0000)]
llvm-cov: Added -f option for function summaries.

Similar to the file summaries, the function summaries output line,
branching and call statistics. The file summaries have been moved
outside the initial loop so that all of the function summaries can be
outputted before file summaries.

Also updated test cases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197633 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix a problem with mips16 stubs when calls are transformed during
Reed Kotler [Wed, 18 Dec 2013 23:57:48 +0000 (23:57 +0000)]
Fix a problem with mips16 stubs when calls are transformed during
tail call optimization. Some more work may be needed for indirect
calls but this patch fixes the current regression in Prolangc++/trees.
S2 optimization as part of the general cleanup and optimization
of prolog and epilog was not saving S2 in this case and needed to.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197630 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRevert "Add -mcpu=z10 to SystemZ tests."
Andrew Trick [Wed, 18 Dec 2013 23:04:37 +0000 (23:04 +0000)]
Revert "Add -mcpu=z10 to SystemZ tests."

This reverts commit r197466.

The MachineCSE fix that required the -mcpu flag has been disabled
until more work can be done to fix downstream issues. Adding -mcpu
wasn't the right workaround anyway.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197624 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[aarch32] fix bug 18268: Incorrect condition of vsel
Weiming Zhao [Wed, 18 Dec 2013 22:25:17 +0000 (22:25 +0000)]
[aarch32] fix bug 18268:  Incorrect condition of vsel

Given vsel_cc, op1, op2, since vsel has no LE/LT, to generate vsel for
such selection, it needs to inverse cc and swap op1 and op2. To inverse
cc, both L/G and E bits should be flipped.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197615 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoDebug info: Implement (rvalue) reference qualifiers for C++11 non-static
Adrian Prantl [Wed, 18 Dec 2013 21:48:19 +0000 (21:48 +0000)]
Debug info: Implement (rvalue) reference qualifiers for C++11 non-static
member functions. Paired commit with CFE.

rdar://problem/15356637

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197613 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoPull in a couple of new constants from the upcoming DWARF 5 standard.
Adrian Prantl [Wed, 18 Dec 2013 21:48:14 +0000 (21:48 +0000)]
Pull in a couple of new constants from the upcoming DWARF 5 standard.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197611 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoformatting
Adrian Prantl [Wed, 18 Dec 2013 21:48:11 +0000 (21:48 +0000)]
formatting

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197610 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoCorrectly handle the degenerated triple "thumb".
Rafael Espindola [Wed, 18 Dec 2013 21:29:44 +0000 (21:29 +0000)]
Correctly handle the degenerated triple "thumb".

Fixes a crash in llc where some parts think the target is thumb and others think
it is ARM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197607 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agollvm-cov: Print coverage summary to STDOUT.
Yuchen Wu [Wed, 18 Dec 2013 21:12:51 +0000 (21:12 +0000)]
llvm-cov: Print coverage summary to STDOUT.

File summaries will now be optionally outputted which will give line,
branching and call coverage info. Unfortunately, clang's current
instrumentation does not give enough information to deduce function
calls, something that gcc is able to do. Thus, no calls are always
outputted to be consistent with gcov output.

Also updated tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197606 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRevert r197600 while I sort out why it's failing on Windows.
Owen Anderson [Wed, 18 Dec 2013 19:25:51 +0000 (19:25 +0000)]
Revert r197600 while I sort out why it's failing on Windows.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197602 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd a unit test for loading an object file via a file descriptor. Patch by Pete...
Owen Anderson [Wed, 18 Dec 2013 19:20:29 +0000 (19:20 +0000)]
Add a unit test for loading an object file via a file descriptor.  Patch by Pete Cooper.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197600 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agollvm-cov: s/(.*)Executed/\1Exec/
Yuchen Wu [Wed, 18 Dec 2013 18:46:25 +0000 (18:46 +0000)]
llvm-cov: s/(.*)Executed/\1Exec/

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197595 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agollvm-cov: Added -c option for branch counts.
Yuchen Wu [Wed, 18 Dec 2013 18:40:15 +0000 (18:40 +0000)]
llvm-cov: Added -c option for branch counts.

This will cause llvm-cov to output branch counts instead of branch
probabilities. -b must be enabled.

Also updated tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197594 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[CMake] Don't put every project's tblgen executable in the LLVM bin directory.
Jordan Rose [Wed, 18 Dec 2013 17:50:33 +0000 (17:50 +0000)]
[CMake] Don't put every project's tblgen executable in the LLVM bin directory.

This changes Clang standalone builds so that clang-tblgen lives in
clang/build/bin instead of llvm/build/bin, and so that with the Xcode
generator it's in clang/build/bin/Debug instead of llvm/build/bin/Debug/Debug/.
Yes, really.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197590 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips][msa] Update format of RUN lines for every MSA MC test.
Matheus Almeida [Wed, 18 Dec 2013 17:31:21 +0000 (17:31 +0000)]
[mips][msa] Update format of RUN lines for every MSA MC test.

1. The arch directive now appears before the cpu directive
2. Long run lines were split across multiple lines

No functional changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197588 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[arm] Rename Tag_VFP_arch to Tag_FP_arch.
Logan Chien [Wed, 18 Dec 2013 17:23:15 +0000 (17:23 +0000)]
[arm] Rename Tag_VFP_arch to Tag_FP_arch.

According to "Addenda to ABI for ARM architecture", Tag_FP_arch is the
new name for the equivalent Tag_VFP_arch.  This commit renames
Tag_VFP_arch to Tag_FP_arch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197587 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRevert r197380, "llvm-config: Print SYSTEM_LIBS with --libs, instead of --ldflags."
NAKAMURA Takumi [Wed, 18 Dec 2013 16:21:16 +0000 (16:21 +0000)]
Revert r197380, "llvm-config: Print SYSTEM_LIBS with --libs, instead of --ldflags."

I will introduce another flag, like --system-libs, later.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197583 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[CMake] Prune LLVM_TOOLS_BINARY_DIR in LLVMConfig.cmake, since it always points build...
NAKAMURA Takumi [Wed, 18 Dec 2013 15:57:58 +0000 (15:57 +0000)]
[CMake] Prune LLVM_TOOLS_BINARY_DIR in LLVMConfig.cmake, since it always points build directory.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197581 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix f64 and f128 for ppc-darwin.
Rafael Espindola [Wed, 18 Dec 2013 15:06:25 +0000 (15:06 +0000)]
Fix f64 and f128 for ppc-darwin.

This patch adds -f64:32:64 to 32 bit ppc darwin since a f64 inside a
structure are only 32 bit aligned.

The patch also drop -f128:64:128 from all ppc darwin, since f128 is
128 bit aligned.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197574 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoOne ppc32-darwin, a i64 inside a structure can have 32 bit alignment.
Rafael Espindola [Wed, 18 Dec 2013 14:35:37 +0000 (14:35 +0000)]
One ppc32-darwin, a i64 inside a structure can have 32 bit alignment.

Thanks for Iain Sandoe for testing this with the original gcc.

Clang was already getting this right.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197572 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoARM: update comment to match reality
Tim Northover [Wed, 18 Dec 2013 14:18:36 +0000 (14:18 +0000)]
ARM: update comment to match reality

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197570 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips][msa] Remove unneeded triple directive in MSA MC tests.
Matheus Almeida [Wed, 18 Dec 2013 11:06:13 +0000 (11:06 +0000)]
[mips][msa] Remove unneeded triple directive in MSA MC tests.

No functional changes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197559 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoDiagnosticInfo: Add missing namespace
Tobias Grosser [Wed, 18 Dec 2013 10:12:06 +0000 (10:12 +0000)]
DiagnosticInfo: Add missing namespace

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197556 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoARM: force soft-float ABI for tests depending on it.
Tim Northover [Wed, 18 Dec 2013 09:58:06 +0000 (09:58 +0000)]
ARM: force soft-float ABI for tests depending on it.

This should fix the ARM bots.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197555 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoARM: set default float ABI based on triple.
Tim Northover [Wed, 18 Dec 2013 09:27:33 +0000 (09:27 +0000)]
ARM: set default float ABI based on triple.

Clang sets the float-abi target option manually, but no longer
annotates each function with its ABI. This can lead to confusing
mistmatch between "clang -emit-llvm | llc" and normal clang
invocations.

Besides which, gnueabihf actually *is* hard-float. Defaulting to soft
was just perverse.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197554 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[AArch64 NEON]Implment loading vector constant form constant pool.
Kevin Qin [Wed, 18 Dec 2013 06:26:04 +0000 (06:26 +0000)]
[AArch64 NEON]Implment loading vector constant form constant pool.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197551 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAsmParser: add support for .end directive
Saleem Abdulrasool [Wed, 18 Dec 2013 02:53:03 +0000 (02:53 +0000)]
AsmParser: add support for .end directive

The .end directive indicates the end of the file.  No further instructions are
processed after a .end directive is encountered.

One potential (glaringly obvious) optimisation that could be pursued here is to
extend MCAsmParser with a DiscardRemainder method to avoid processing lexemes to
the end of the file.  It was unclear at this point if that would be worth
adding, and could easily be added in a follow on change.

Signed-off-by: Saleem Abdulrasool <compnerd@compnerd.org>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197547 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoDebugInfo: Introduce new DIValue, DIETypeSignature to encode references to type units...
David Blaikie [Tue, 17 Dec 2013 23:32:35 +0000 (23:32 +0000)]
DebugInfo: Introduce new DIValue, DIETypeSignature to encode references to type units via their signatures

This simplifies type unit and type unit reference creation as well as
setting the stage for inter-type hashing across type unit boundaries.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197539 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix N32 registers and stack alignment.
Rafael Espindola [Tue, 17 Dec 2013 23:15:58 +0000 (23:15 +0000)]
Fix N32 registers and stack alignment.

This patch fixes the "n" and "S" components of the data layout for mips. Clang
already gets this right.

This will be tested in clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197536 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoEliminate PPC instruction decoding ambiguities
Hal Finkel [Tue, 17 Dec 2013 23:05:18 +0000 (23:05 +0000)]
Eliminate PPC instruction decoding ambiguities

The instruction definitions in the PPC backend have a number of variants
defined for the same instruction to represent differences between 64-bit and
32-bit semantics. In order to generate a disassembler for the PPC backend, we
need to mark all but one of these as CodeGen only.

No functionality change intended; this is prep work for PPC disassembly
support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197535 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoSupport little-endian encodings in the FixedLenDecoderEmitter
Hal Finkel [Tue, 17 Dec 2013 22:37:50 +0000 (22:37 +0000)]
Support little-endian encodings in the FixedLenDecoderEmitter

The convention used to specify the PowerPC ISA is that bits are numbered in
reverse order (0 is the index of the high bit). To support this "little endian"
encoding convention, CodeEmitterGen will reverse the bit numberings prior to
generating the encoding tables. In order to generate a disassembler,
FixedLenDecoderEmitter needs to do the same.

This moves the bit reversal logic out of CodeEmitterGen and into CodeGenTarget
(where it can be used by both CodeEmitterGen and FixedLenDecoderEmitter). This
is prep work for disassembly support in the PPC backend (which is the only
in-tree user of this little-endian encoding support).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197532 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[DiagnosticPrinter] Use the appropriate method to print a Twine object in a
Quentin Colombet [Tue, 17 Dec 2013 22:35:07 +0000 (22:35 +0000)]
[DiagnosticPrinter] Use the appropriate method to print a Twine object in a
raw_ostream.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197531 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoMC COFF: Emit the 'b' section flag for .bss sections in GNU assembly
Reid Kleckner [Tue, 17 Dec 2013 22:12:40 +0000 (22:12 +0000)]
MC COFF: Emit the 'b' section flag for .bss sections in GNU assembly

Without this, assembling clang's disassembly would produce an object
file with the IMAGE_SCN_CNT_INITIALIZED_DATA section characteristic
rather than the uninitialized one.  link.exe would warn when merging
comdats with different flags.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197529 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoOn APCS, only try to align aggregates to 32 bits instead of 64.
Rafael Espindola [Tue, 17 Dec 2013 21:36:54 +0000 (21:36 +0000)]
On APCS, only try to align aggregates to 32 bits instead of 64.

This matches clang's behavior and since it is only a preference, it is not
an ABI issue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197526 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoHandle i64 first for clarity. No functionality change.
Rafael Espindola [Tue, 17 Dec 2013 21:28:36 +0000 (21:28 +0000)]
Handle i64 first for clarity. No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197524 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAssert that the last operand is actually EFLAGS
Duncan P. N. Exon Smith [Tue, 17 Dec 2013 20:28:21 +0000 (20:28 +0000)]
Assert that the last operand is actually EFLAGS

This is another follow-up to r197503, after a post-commit review by
Andy.

<rdar://problem/15627766>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197520 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoDisabled subregister copy coalescing during MachineCSE.
Andrew Trick [Tue, 17 Dec 2013 19:29:36 +0000 (19:29 +0000)]
Disabled subregister copy coalescing during MachineCSE.

This effectively backs out r197465 but leaves some of the general
fixes in place. Not all targets are ready to handle this feature. To
enable it, some infrastructure work is needed to better handle
register class constraints.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197514 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd warning capabilities in LLVM.
Quentin Colombet [Tue, 17 Dec 2013 17:47:22 +0000 (17:47 +0000)]
Add warning capabilities in LLVM.
This reapplies r197438 and fixes the link-time circular dependency between
IR and Support. The fix consists in moving the diagnostic support into IR.

The patch adds a new LLVMContext::diagnose that can be used to communicate to
the front-end, if any, that something of interest happened.
The diagnostics are supported by a new abstraction, the DiagnosticInfo class.
The base class contains the following information:
- The kind of the report: What this is about.
- The severity of the report: How bad this is.

This patch also adds 2 classes:
- DiagnosticInfoInlineAsm: For inline asm reporting. Basically, this diagnostic
will be used to switch to the new diagnostic API for LLVMContext::emitError.
- DiagnosticStackSize: For stack size reporting. Comes as a replacement of the
hard coded warning in PEI.

This patch also features dynamic diagnostic identifiers. In other words plugins
can use this infrastructure for their own diagnostics (for more details, see
getNextAvailablePluginDiagnosticKind).

This patch introduces a new DiagnosticHandlerTy and a new DiagnosticContext in
the LLVMContext that should be set by the front-end to be able to map these
diagnostics in its own system.

http://llvm-reviews.chandlerc.com/D2376
<rdar://problem/15515174>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197508 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[mips] Fix off by one issue when applying a fixup.
Matheus Almeida [Tue, 17 Dec 2013 17:10:00 +0000 (17:10 +0000)]
[mips] Fix off by one issue when applying a fixup.

The branch offset for a R_MIPS_PC16 relocation is indeed a 16-bit signed
immediate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197506 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoSetting the CPU in the new vaargs test
Duncan P. N. Exon Smith [Tue, 17 Dec 2013 16:20:37 +0000 (16:20 +0000)]
Setting the CPU in the new vaargs test

Trying to fix buildbots after r197503 (test passes locally).

<rdar://problem/15627766>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197505 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRevert "Revert "Mark vastart_save_xmm_regs as changing EFLAGS""
Duncan P. N. Exon Smith [Tue, 17 Dec 2013 15:54:45 +0000 (15:54 +0000)]
Revert "Revert "Mark vastart_save_xmm_regs as changing EFLAGS""

This reverts commit r197481, recommiting r197469 with an extra fix.

The vastart_save_xmm_regs pseudo-instruction expands to a test and a
branch, so it modifies EFLAGS.  Mark it so, or else the scheduler might
place it in the middle of another test+branch.

This fixes a bug exposed by r192750, which changed the initial scheduler
to source-order as part of enabling the MI Scheduler for X86.

This re-commit changes the VASTART_SAVE_XMM_REGS custom inserter not to
try to save %flags, and adds a test that catches the bad behavior of
r197469.

<rdar://problem/15627766>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197503 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix the pointer size for the PS3 datalayout.
Rafael Espindola [Tue, 17 Dec 2013 15:29:48 +0000 (15:29 +0000)]
Fix the pointer size for the PS3 datalayout.

This will be tested from clang.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197501 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd some simple COFF files with Z7 debug info
Timur Iskhodzhanov [Tue, 17 Dec 2013 14:33:31 +0000 (14:33 +0000)]
Add some simple COFF files with Z7 debug info

These will later be used as tests for the dumper part of http://llvm-reviews.chandlerc.com/D2232

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197499 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix code sample in NVPTX examples: now it compiles to PTX and runs as expected.
Eli Bendersky [Tue, 17 Dec 2013 14:14:15 +0000 (14:14 +0000)]
Fix code sample in NVPTX examples: now it compiles to PTX and runs as expected.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197498 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoFix for PR18045:
Stepan Dyatkovskiy [Tue, 17 Dec 2013 12:07:33 +0000 (12:07 +0000)]
Fix for PR18045:
http://llvm.org/bugs/show_bug.cgi?id=18045

Short issue description:
For X86 machines with sse < sse4.1 we got failures for some
particular load/store vector sequences:

$ clang-trunk -m32 -O2 test-case.c
fatal error: error in backend: Cannot select: 0x4200920: v4i32,ch = load 0x41d6ab0, 0x4205850,
      0x41dcb10<LD16[getelementptr inbounds ([4 x i32]* @e, i32 0, i32 0)](align=4)> [ORD=82]
      [ID=58]
  0x4205850: i32 = X86ISD::Wrapper 0x41d5490 [ORD=26] [ID=43]
    0x41d5490: i32 = TargetGlobalAddress<[4 x i32]* @e> 0 [ORD=26] [ID=23]
  0x41dcb10: i32 = undef [ID=2]

The reason is that EltsFromConsecutiveLoads could emit such load instruction
both before and after legalize stage. Though this instruction is not legal for
machines with SSSE3 and lower.

The fix: In EltsFromConsecutiveLoads, if we have passed legalize stage, we
check whether nodes it emits are legal.

P.S.: If you get failure in time from 12:00 and till 22:00 (UTC-8),
perhaps I'll slow with response, so you better reject this commit. Thanks!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197492 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoThere are no __register_frame and __deregister_frame functions
Yaron Keren [Tue, 17 Dec 2013 08:40:11 +0000 (08:40 +0000)]
There are no __register_frame and __deregister_frame functions
when using structured exception handling (SEH) on Windows 64.

http://llvm-reviews.chandlerc.com/D2378

Patch by Jonathan Liu!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197483 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAVX-512: Added implementation of CONCAT_VECTORS for v8i1 vectors (by Alexey Bader).
Elena Demikhovsky [Tue, 17 Dec 2013 08:33:15 +0000 (08:33 +0000)]
AVX-512: Added implementation of CONCAT_VECTORS for v8i1 vectors (by Alexey Bader).
Added implementation of "truncate" from integer type (i64/i32/i16/i8) to i1.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197482 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRevert "Mark vastart_save_xmm_regs as changing EFLAGS"
Duncan P. N. Exon Smith [Tue, 17 Dec 2013 07:13:58 +0000 (07:13 +0000)]
Revert "Mark vastart_save_xmm_regs as changing EFLAGS"

This reverts commit r197469.

The sanitizer and dragonegg buildbots are failing, I think because of
this change.  Reverting until I figure out why.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197481 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoMark vastart_save_xmm_regs as changing EFLAGS
Duncan P. N. Exon Smith [Tue, 17 Dec 2013 06:12:05 +0000 (06:12 +0000)]
Mark vastart_save_xmm_regs as changing EFLAGS

The vastart_save_xmm_regs pseudo-instruction expands to a test and a
branch, so it modifies EFLAGS.  Mark it so, or else the scheduler might
place it in the middle of another test+branch.

This fixes a bug exposed by r192750, which turned on the MI Scheduler
for X86.

<rdar://problem/15627766>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197469 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agollvm-config: Let directories aware of CMAKE_CFG_INTDIR.
NAKAMURA Takumi [Tue, 17 Dec 2013 05:48:37 +0000 (05:48 +0000)]
llvm-config: Let directories aware of CMAKE_CFG_INTDIR.

With llvm-config.exe --bindir --libdir --build-mode, on Visual Studio 2010,

In build tree:
  (OBJ_ROOT)/bin/MinSizeRel
  (OBJ_ROOT)/lib/MinSizeRel
  MinSizeRel

In installed tree:
  (INSTALL_PREFIX)/bin
  (INSTALL_PREFIX)/lib
  MinSizeRel

This is enhancements since r196283.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197467 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd -mcpu=z10 to SystemZ tests.
Andrew Trick [Tue, 17 Dec 2013 05:27:16 +0000 (05:27 +0000)]
Add -mcpu=z10 to SystemZ tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197466 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAllow MachineCSE to coalesce trivial subregister copies the same way that it coalesce...
Andrew Trick [Tue, 17 Dec 2013 04:50:45 +0000 (04:50 +0000)]
Allow MachineCSE to coalesce trivial subregister copies the same way that it coalesces normal copies.

Without this, MachineCSE is powerless to handle redundant operations with truncated source operands.

This required fixing the 2-addr pass to handle tied subregisters. It isn't clear what combinations of subregisters can legally be tied, but the simple case of truncated source operands is now safely handled:

     %vreg11<def> = COPY %vreg1:sub_32bit; GR32:%vreg11 GR64:%vreg1
     %vreg12<def> = COPY %vreg2:sub_32bit; GR32:%vreg12 GR64:%vreg2
     %vreg13<def,tied1> = ADD32rr %vreg11<tied0>, %vreg12<kill>, %EFLAGS<imp-def>

Test case: cse-add-with-overflow.ll.

This exposed an existing bug in
PPCInstrInfo::commuteInstruction. Thanks to Rafael for the test case:
PowerPC/crash.ll.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197465 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agowhitespace
Andrew Trick [Tue, 17 Dec 2013 04:50:40 +0000 (04:50 +0000)]
whitespace

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197464 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoTweak lit/TestingConfig.py Py3-compatible. has_key is dead.
NAKAMURA Takumi [Tue, 17 Dec 2013 04:14:50 +0000 (04:14 +0000)]
Tweak lit/TestingConfig.py Py3-compatible. has_key is dead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197462 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoMake comment more explicit.
Jim Grosbach [Tue, 17 Dec 2013 02:18:02 +0000 (02:18 +0000)]
Make comment more explicit.

Re-reading the comment I updated in previous commit, it's better to make
it more explicit and avoid ambiguity more effectively.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197458 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoTypo. s/reserved/preserved/
Jim Grosbach [Tue, 17 Dec 2013 02:01:13 +0000 (02:01 +0000)]
Typo. s/reserved/preserved/

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197457 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoAdd a machine code print in DEBUG() following instruction selection.
Jim Grosbach [Tue, 17 Dec 2013 02:01:10 +0000 (02:01 +0000)]
Add a machine code print in DEBUG() following instruction selection.

Make debugging ISel a bit easier by printing out a dump of the generated
code at the end.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197456 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoRevert r197438 and r197447 until we figure out how to avoid circular dependency at...
Quentin Colombet [Tue, 17 Dec 2013 01:19:59 +0000 (01:19 +0000)]
Revert r197438 and r197447 until we figure out how to avoid circular dependency at link time

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197451 91177308-0d34-0410-b5e6-96231b3b80d8

10 years agoLoopVectorizer: Don't if-convert constant expressions that can trap
Arnold Schwaighofer [Tue, 17 Dec 2013 01:11:01 +0000 (01:11 +0000)]
LoopVectorizer: Don't if-convert constant expressions that can trap

A phi node operand or an instruction operand could be a constant expression that
can trap (division). Check that we don't vectorize such cases.

PR16729
radar://15653590

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197449 91177308-0d34-0410-b5e6-96231b3b80d8

10 years ago[LLVM Diagnostic Capabilities] Remove useless includes from
Quentin Colombet [Tue, 17 Dec 2013 00:56:19 +0000 (00:56 +0000)]
[LLVM Diagnostic Capabilities] Remove useless includes from
DiagnosticPrinter.cpp.
These was creating a link time dependencies of IR on CodeGen and Analysis.

Part of <rdar://problem/15515174>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197447 91177308-0d34-0410-b5e6-96231b3b80d8