Add a license comment to the generated arm_neon.h header.
Remove the previous header.  I don't think we need to expose to end users
that we use TableGen to produce our version of arm_neon.h, and that header
was also using doubleslash comments which could be a problem when using it
in strict C89 compilations.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121390 91177308-0d34-0410-b5e6-96231b3b80d8

Added register reassignment prototype to RAGreedy. It's a simple
heuristic to reshuffle register assignments when we can't find an
available reg.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121388 91177308-0d34-0410-b5e6-96231b3b80d8

More code not compiled by CMake. :(.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121387 91177308-0d34-0410-b5e6-96231b3b80d8

CMake: Add FileUpdate to the build.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121386 91177308-0d34-0410-b5e6-96231b3b80d8

Missed FileUpdate because CMake doesn't build it yet :(.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121385 91177308-0d34-0410-b5e6-96231b3b80d8

Support/Windows/PathV2: Fix header comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121383 91177308-0d34-0410-b5e6-96231b3b80d8

Fix whitespace.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121382 91177308-0d34-0410-b5e6-96231b3b80d8

Support: Move c_str from SmallVector back to SmallString and add a free standing
templated c_str in Windows.h to replace it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121381 91177308-0d34-0410-b5e6-96231b3b80d8

Support/FileSystem: Change file_status predicate functions that cannot fail to
return their result instead of an error_code. Also add some missing predicate
functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121380 91177308-0d34-0410-b5e6-96231b3b80d8

Support/MemoryBuffer: Replace all uses of std::string *ErrMsg with error_code &ec. And fix clients.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121379 91177308-0d34-0410-b5e6-96231b3b80d8

Add ROTR and ROTRV mips32 instructions. Patch by Akira Hatanaka

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121377 91177308-0d34-0410-b5e6-96231b3b80d8

Fix delay slot filler for non mips1 targets. Patch by Akira Hatanaka

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121376 91177308-0d34-0410-b5e6-96231b3b80d8

Dont' feed ILA two inputs - it takes just one.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121372 91177308-0d34-0410-b5e6-96231b3b80d8

tidy up.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121371 91177308-0d34-0410-b5e6-96231b3b80d8

80 columns.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121370 91177308-0d34-0410-b5e6-96231b3b80d8

enhance memcpyopt to zap memcpy's that have the same src/dst.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121362 91177308-0d34-0410-b5e6-96231b3b80d8

fix PR8753, eliminating a case where we'd infinitely make a
substitution because it doesn't actually change the IR.  Patch by
Jakub Staszak!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121361 91177308-0d34-0410-b5e6-96231b3b80d8

Rewrite the darwin tlv support to use a chain and return to copying
the output to the correct register. Fixes a hidden problem uncovered
by the last patch where we'd try to DAG combine our MVT::Other node
oddly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121358 91177308-0d34-0410-b5e6-96231b3b80d8

Take the first step towards making LVI non-recursive: get rid of the LVIQuery abstraction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121357 91177308-0d34-0410-b5e6-96231b3b80d8

80-col fixups.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121356 91177308-0d34-0410-b5e6-96231b3b80d8

Reworking the stack layout generated by the MBlaze backend.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121355 91177308-0d34-0410-b5e6-96231b3b80d8

Fix encoding of the immediate operands on post-indexed LDR and friends.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121354 91177308-0d34-0410-b5e6-96231b3b80d8

Really check that the bits that will become zero are actually already zero
before eliminating the operation that zeros them. This fixes rdar://8739316.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121353 91177308-0d34-0410-b5e6-96231b3b80d8

Fix up some comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121351 91177308-0d34-0410-b5e6-96231b3b80d8

Fix Thumb2 fixups for ldr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121350 91177308-0d34-0410-b5e6-96231b3b80d8

Add a textual message to the assert.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121349 91177308-0d34-0410-b5e6-96231b3b80d8

Add a sanity check assert() for t2ADD/SUBrSPi instructions that they really are
referencing the stack pointer as they say they are.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121347 91177308-0d34-0410-b5e6-96231b3b80d8

When using multiple instructions to reference a frame index, make sure to
update the opcode when necessary as well as the source register.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121346 91177308-0d34-0410-b5e6-96231b3b80d8

The add/sub SP instructions are really pseudos. The assembler should ignore
them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121345 91177308-0d34-0410-b5e6-96231b3b80d8

IntervalMap iterators are heavyweight, so avoid copying them around and use
references instead.

Similarly, IntervalMap::begin() is almost as expensive as find(), so use find(x)
instead of begin().advanceTo(x);

This makes RegAllocBasic run another 5% faster.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121344 91177308-0d34-0410-b5e6-96231b3b80d8

Remove unused variables

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121343 91177308-0d34-0410-b5e6-96231b3b80d8

Fix typo in Thumb2 branch fixup.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121342 91177308-0d34-0410-b5e6-96231b3b80d8

Stop confusing people, it's not really a chain, or a tumor.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121340 91177308-0d34-0410-b5e6-96231b3b80d8

Remove extraneous semicolon.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121338 91177308-0d34-0410-b5e6-96231b3b80d8

Attempt to make the bit-twiddling readable resulted in the binary value being
overwritten.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121337 91177308-0d34-0410-b5e6-96231b3b80d8

The BLX instruction is encoded differently than the BL, because why not? In
particular, the immediate has 20-bits of value instead of 21. And bit 0 is '0'
always. Going through the BL fixup encoding was trashing the "bit 0 is '0'"
invariant.

Attempt to get the encoding at slightly more correct with this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121336 91177308-0d34-0410-b5e6-96231b3b80d8

Remove extraneous copy from DAG conversion for darwin tls. This was
popping up at O0 when it wasn't folded and the fast allocator would
complain.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121330 91177308-0d34-0410-b5e6-96231b3b80d8

Fix Thumb2 BCC encoding and fixups.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121329 91177308-0d34-0410-b5e6-96231b3b80d8

Add rsp to the uses for the same reason as 32-bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121328 91177308-0d34-0410-b5e6-96231b3b80d8

DW_FORM_data1 may not provide sufficient room for vtable index, use _udata instead.
This fixes radar 8730409.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121323 91177308-0d34-0410-b5e6-96231b3b80d8

Allow a slash, '/', as a prefix separator for X86.  rdar://8741045

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121320 91177308-0d34-0410-b5e6-96231b3b80d8

Properly deal with empty intervals when checking for interference.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121319 91177308-0d34-0410-b5e6-96231b3b80d8

Style nit and whitespace cleanup

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121317 91177308-0d34-0410-b5e6-96231b3b80d8

Move this test to tlv* to make it easier to notice versus linux tls
support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121316 91177308-0d34-0410-b5e6-96231b3b80d8

Clean up the add/sub w/ SP source reg instructions in Thumb2 a bit. Add a FIXME
for more thorough cleanup.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121315 91177308-0d34-0410-b5e6-96231b3b80d8

Fix T2TwoRegImm and use it for t2ADDrSPi12 and friends.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121314 91177308-0d34-0410-b5e6-96231b3b80d8

Removed dead comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121313 91177308-0d34-0410-b5e6-96231b3b80d8

ARM/MC/ELF TPsoft is now a proper pseudo inst.
Added test to check bl __aeabi_read_tp gets emitted properly for ELF/ASM
as well as ELF/OBJ (including fixup)

Also added support for ELF::R_ARM_TLS_IE32

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121312 91177308-0d34-0410-b5e6-96231b3b80d8

T2TwoRegImm isn't right for t2SUBrSPi12. Use T2I instead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121311 91177308-0d34-0410-b5e6-96231b3b80d8

Add operand encoding for Thumb2 subw SP + imm. rdar://8745434

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121310 91177308-0d34-0410-b5e6-96231b3b80d8

Add operand encoding for Thumb2 addw Rn + imm. rdar://8745434

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121309 91177308-0d34-0410-b5e6-96231b3b80d8

Support the "target" encodings for the CB[N]Z instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121308 91177308-0d34-0410-b5e6-96231b3b80d8

Fix an obvious cut-n-paste error.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121307 91177308-0d34-0410-b5e6-96231b3b80d8

Implement very primitive hinting support in RegAllocGreedy.

The hint is simply tried first and then forgotten if it couldn't be allocated
immediately.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121306 91177308-0d34-0410-b5e6-96231b3b80d8

Add operand encoding for Thumb2 addw SP + imm. rdar://8745434

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121305 91177308-0d34-0410-b5e6-96231b3b80d8

Parameterize opcode encoding bits for Thumb2 extended precision integer
multiply instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121301 91177308-0d34-0410-b5e6-96231b3b80d8

Add operators for "_lane" variants of some saturating Neon multiply intrinsics
so they can be implemented without separate clang builtins.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121299 91177308-0d34-0410-b5e6-96231b3b80d8

Fix operand encoding for Thumb2 extended precision multiplies. rdar://8745555

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121297 91177308-0d34-0410-b5e6-96231b3b80d8

Store (priority,regnum) pairs in the priority queue instead of providing an
abstract priority queue interface in subclasses that want to override the
priority calculations.

Subclasses must provide a getPriority() implementation instead.

This approach requires less code as long as priorities are expressable as simple
floats, and it avoids the dangers of defining potentially expensive priority
comparison functions.

It also should speed up priority_queue operations since they no longer have to
chase pointers when comparing registers. This is not measurable, though.

Preferably, we shouldn't use floats to guide code generation. The use of floats
here is derived from the use of floats for spill weights. Spill weights have a
dynamic range that doesn't lend itself easily to a fixpoint implementation.

When someone invents a stable spill weight representation, it can be reused for
allocation priorities.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121294 91177308-0d34-0410-b5e6-96231b3b80d8

Reword comment slightly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121293 91177308-0d34-0410-b5e6-96231b3b80d8

Fixed some dependencies in RegAllocPBQP.h . Thanks to Borja Ferrer for pointing out this issue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121292 91177308-0d34-0410-b5e6-96231b3b80d8

Simplify T2 operand assignment notation a bit. No need to specify a bit range
for the source field when it's the whole thing that's being referenced.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121291 91177308-0d34-0410-b5e6-96231b3b80d8

Use type's file info while describing inheritance relationship.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121289 91177308-0d34-0410-b5e6-96231b3b80d8

Add operators for vabdl and vabal so they can be implemented without builtins.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121287 91177308-0d34-0410-b5e6-96231b3b80d8

Remove unused function parameter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121286 91177308-0d34-0410-b5e6-96231b3b80d8

Fix comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121285 91177308-0d34-0410-b5e6-96231b3b80d8

Trim includes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121283 91177308-0d34-0410-b5e6-96231b3b80d8

Add support to create debug info for functions and methods.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121281 91177308-0d34-0410-b5e6-96231b3b80d8

Tweak ARM fixup value adjustments for Thumb to better handle the half-word
ordering of thumb mode.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121280 91177308-0d34-0410-b5e6-96231b3b80d8

Add support to create class type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121279 91177308-0d34-0410-b5e6-96231b3b80d8

Add an operator for vaba so it can be implemented using vabd.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121276 91177308-0d34-0410-b5e6-96231b3b80d8

Generalize PostRAHazardRecognizer so it can be used in any pass for
both forward and backward scheduling. Rename it to
ScoreboardHazardRecognizer (Scoreboard is one word). Remove integer
division from the scoreboard's critical path.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121274 91177308-0d34-0410-b5e6-96231b3b80d8

Use this new fangled StringSwitch technology.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121273 91177308-0d34-0410-b5e6-96231b3b80d8

Improve comment.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121272 91177308-0d34-0410-b5e6-96231b3b80d8

Add initializer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121262 91177308-0d34-0410-b5e6-96231b3b80d8

Cleanup table a bit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121250 91177308-0d34-0410-b5e6-96231b3b80d8

Add comments.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121238 91177308-0d34-0410-b5e6-96231b3b80d8

Stub out RegAllocGreedy.

This new register allocator is initially identical to RegAllocBasic, but it will
receive all of the tricks that RegAllocBasic won't get.

RegAllocGreedy will eventually replace linear scan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121234 91177308-0d34-0410-b5e6-96231b3b80d8

Fix newlines.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121233 91177308-0d34-0410-b5e6-96231b3b80d8

build: Shared libraries shouldn't used RPATH on Darwin, only main executables
should use that.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121231 91177308-0d34-0410-b5e6-96231b3b80d8

Regenerate this for Daniel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121227 91177308-0d34-0410-b5e6-96231b3b80d8

Add support for loading from a constant pool.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121226 91177308-0d34-0410-b5e6-96231b3b80d8

Add support to create vector, array, enums etc...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121224 91177308-0d34-0410-b5e6-96231b3b80d8

build: Don't force -flat_namespace or '-undefined suppress' on unsuspecting users of LLVM makefiles, these options really shouldn't be used on Darwin.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121223 91177308-0d34-0410-b5e6-96231b3b80d8

autoconf: Stop lying to me.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121222 91177308-0d34-0410-b5e6-96231b3b80d8

Let target asm backends see assembler flags as they go by. Use that to handle
thumb vs. arm mode differences in WriteNopData().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121219 91177308-0d34-0410-b5e6-96231b3b80d8

Move RABasic::addMBBLiveIns to the base class, it is generally useful.

Minor optimization to the use of IntervalMap iterators. They are fairly
heavyweight, so prefer SI.valid() over SI != end().

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121217 91177308-0d34-0410-b5e6-96231b3b80d8

Simplify the byte reordering logic slightly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121216 91177308-0d34-0410-b5e6-96231b3b80d8

VLDR fixups need special handling under Thumb.  While the encoding is the same,
the order of the bytes in the data stream is flipped around.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121215 91177308-0d34-0410-b5e6-96231b3b80d8

Add operators for vadd[lw] and vsub[lw]
so they can be implemented without clang builtins.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121213 91177308-0d34-0410-b5e6-96231b3b80d8

Global variable does not need linkage name.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121212 91177308-0d34-0410-b5e6-96231b3b80d8

Add support to create local variable's debug info.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121211 91177308-0d34-0410-b5e6-96231b3b80d8

Add operators for vmlal{_n,_lane} and vmlsl{_n,_lane}
so they can be implemented without clang builtins.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121209 91177308-0d34-0410-b5e6-96231b3b80d8

Emit vmovl intrinsics first in the arm_neon.h header
so they can be used in the implementations of other intrinsics.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121208 91177308-0d34-0410-b5e6-96231b3b80d8

Layout each section independently. With the testcase in PR8711:

before:
        4 assembler - Number of assembler layout and relaxation steps
    78563 assembler - Number of emitted assembler fragments
  8693904 assembler - Number of emitted object file bytes
   271223 assembler - Number of evaluated fixups
330771677 assembler - Number of fragment layouts
     5958 assembler - Number of relaxed instructions
  2508361 mcexpr    - Number of MCExpr evaluations

real 0m26.123s
user 0m25.694s
sys 0m0.388s

after:

      4 assembler - Number of assembler layout and relaxation steps
  78563 assembler - Number of emitted assembler fragments
8693904 assembler - Number of emitted object file bytes
 271223 assembler - Number of evaluated fixups
 231507 assembler - Number of fragment layouts
   5958 assembler - Number of relaxed instructions
2508361 mcexpr    - Number of MCExpr evaluations

real 0m2.500s
user 0m2.113s
sys 0m0.273s

And yes, the outputs are identical :-)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121207 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a warning about a variable which is only used in an assertion.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121206 91177308-0d34-0410-b5e6-96231b3b80d8

Add support to create variables, structs etc.. using DIBuilder.
This is still work in progress.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121205 91177308-0d34-0410-b5e6-96231b3b80d8

Switch LiveIntervalUnion from std::set to IntervalMap.

This speeds up RegAllocBasic by 20%, not counting releaseMemory which becomes
way faster.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121201 91177308-0d34-0410-b5e6-96231b3b80d8

Fix begin() and end() on const IntervalMap.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121200 91177308-0d34-0410-b5e6-96231b3b80d8

Cleanup in the Darwin end. No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121198 91177308-0d34-0410-b5e6-96231b3b80d8