Refactor some code into a function

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23603 91177308-0d34-0410-b5e6-96231b3b80d8

This break is bogus and I have no idea why it was there.  Basically it prevents
memoizing code when IV's are used by phinodes outside of loops.  In a simple
example, we were getting this code before (note that r6 and r7 are isomorphic
IV's):

        li r6, 0
        or r7, r6, r6
LBB_test_3:     ; no_exit
        lwz r2, 0(r3)
        cmpw cr0, r2, r5
        or r2, r7, r7
        beq cr0, LBB_test_5     ; loopexit
LBB_test_4:     ; endif
        addi r2, r7, 1
        addi r7, r7, 1
        addi r3, r3, 4
        addi r6, r6, 1
        cmpw cr0, r6, r4
        blt cr0, LBB_test_3     ; no_exit

Now we get:

        li r6, 0
LBB_test_3:     ; no_exit
        or r2, r6, r6
        lwz r6, 0(r3)
        cmpw cr0, r6, r5
        beq cr0, LBB_test_6     ; loopexit
LBB_test_4:     ; endif
        addi r3, r3, 4
        addi r6, r2, 1
        cmpw cr0, r6, r4
        blt cr0, LBB_test_3     ; no_exit

this was noticed in em3d.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23602 91177308-0d34-0410-b5e6-96231b3b80d8

when checking if we should move a split edge block outside of a loop,
check the presplit pred, not the post-split pred.  This was causing us
to make the wrong decision in some cases, leaving the critical edge block
in the loop.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23601 91177308-0d34-0410-b5e6-96231b3b80d8

This member can be const too

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23600 91177308-0d34-0410-b5e6-96231b3b80d8

put the right labels on the data

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23599 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a problem where the legalizer would run out of stack space on extremely
large basic blocks because it was purely recursive.  This switches it to an
iterative/recursive hybrid.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23596 91177308-0d34-0410-b5e6-96231b3b80d8

silence a bogus warning

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23595 91177308-0d34-0410-b5e6-96231b3b80d8

silence some warnings

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23594 91177308-0d34-0410-b5e6-96231b3b80d8

silence a warning

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23593 91177308-0d34-0410-b5e6-96231b3b80d8

add patterns for float binops and fma ops

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23592 91177308-0d34-0410-b5e6-96231b3b80d8

Sort the cpu and features table, so that the alpha backend doesn't fail EVERY
compile with an assertion that the tables are not sorted!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23591 91177308-0d34-0410-b5e6-96231b3b80d8

Add assertions to the trivial scheduler to check that the value types match
up between defs and uses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23590 91177308-0d34-0410-b5e6-96231b3b80d8

another solution to the fsel issue.  Instead of having 4 variants, just force
the comparison to be 64-bits.  This is fine because extensions from float
to double are free.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23589 91177308-0d34-0410-b5e6-96231b3b80d8

fsel can take a different FP type for the comparison and for the result.  As such
split the FSEL family into 4 things instead of just two.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23588 91177308-0d34-0410-b5e6-96231b3b80d8

fix an f32/f64 type mismatch

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23587 91177308-0d34-0410-b5e6-96231b3b80d8

Codegen CopyFromReg using the regclass that matches the valuetype of the
destination vreg.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23586 91177308-0d34-0410-b5e6-96231b3b80d8

Adjust to change in ctor

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23585 91177308-0d34-0410-b5e6-96231b3b80d8

Emit the value type for each register class.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23584 91177308-0d34-0410-b5e6-96231b3b80d8

Expose the actual valuetype of each register class

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23583 91177308-0d34-0410-b5e6-96231b3b80d8

Minor tweak to the branch selector.  When emitting a two-way branch, and if
we're in a single-mbb loop, make sure to emit the backwards branch as the
conditional branch instead of the uncond branch.  For example, emit this:

LBBl29_z__44:
        stw r9, 0(r15)
        stw r9, 4(r15)
        stw r9, 8(r15)
        stw r9, 12(r15)
        addi r15, r15, 16
        addi r8, r8, 1
        cmpw cr0, r8, r28
        ble cr0, LBBl29_z__44
        b LBBl29_z__48                   *** NOT PART OF LOOP

Instead of:

LBBl29_z__44:
        stw r9, 0(r15)
        stw r9, 4(r15)
        stw r9, 8(r15)
        stw r9, 12(r15)
        addi r15, r15, 16
        addi r8, r8, 1
        cmpw cr0, r8, r28
        bgt cr0, LBBl29_z__48            *** PART OF LOOP!
        b LBBl29_z__44

The former sequence has one fewer dispatch group for the loop body.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23582 91177308-0d34-0410-b5e6-96231b3b80d8

like the comment says, enable this

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23581 91177308-0d34-0410-b5e6-96231b3b80d8

Add some very paranoid checking for operand/result reg class matchup
For instructions that define multiple results, use the right regclass
to define the result, not always the rc of result #0

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23580 91177308-0d34-0410-b5e6-96231b3b80d8

Fix VC++ warnings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23579 91177308-0d34-0410-b5e6-96231b3b80d8

fix typo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23578 91177308-0d34-0410-b5e6-96231b3b80d8

Modify the ppc backend to use two register classes for FP: F8RC and F4RC.
These are used to represent float and double values, and the two regclasses
contain the same physical registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23577 91177308-0d34-0410-b5e6-96231b3b80d8

Annotate nodes with their addresses if a graph requests it.

This is Jim's feature implemented so that graphs could 'opt-in' and get
this behavior.  This is currently used by selection dags.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23576 91177308-0d34-0410-b5e6-96231b3b80d8

add a method

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23575 91177308-0d34-0410-b5e6-96231b3b80d8

typo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23574 91177308-0d34-0410-b5e6-96231b3b80d8

1. Simplify the gathering of node groups.

2. Printing node groups when displaying nodes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23573 91177308-0d34-0410-b5e6-96231b3b80d8

Should be using flag and not chain.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23572 91177308-0d34-0410-b5e6-96231b3b80d8

Remove some now-dead code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23571 91177308-0d34-0410-b5e6-96231b3b80d8

more specific tests of subtarget stuff

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23570 91177308-0d34-0410-b5e6-96231b3b80d8

subtarget support for CIX and FIX extentions (the only 2 I care about right now)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23569 91177308-0d34-0410-b5e6-96231b3b80d8

Reverting change moving to selection dag graph.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23568 91177308-0d34-0410-b5e6-96231b3b80d8

Added allnodes_size for scheduling support.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23567 91177308-0d34-0410-b5e6-96231b3b80d8

1. Made things node-centric (from operand).

2. Added node groups to handle flagged nodes.

3. Started weaning simple scheduling off existing emitter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23566 91177308-0d34-0410-b5e6-96231b3b80d8

Add the node name (thus the address) to node label.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23565 91177308-0d34-0410-b5e6-96231b3b80d8

Rename MRegisterDesc -> TargetRegisterDesc for consistency

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23564 91177308-0d34-0410-b5e6-96231b3b80d8

Update the discussion of TargetRegisterDesc

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23563 91177308-0d34-0410-b5e6-96231b3b80d8

remove some more initializers

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23562 91177308-0d34-0410-b5e6-96231b3b80d8

trim down the target info structs now that we have a preferred spill register class for each callee save register

Why is V9 maintaining these tables manually? ugh!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23561 91177308-0d34-0410-b5e6-96231b3b80d8

trim down the target info structs now that we have a preferred spill register class for each callee save register

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23560 91177308-0d34-0410-b5e6-96231b3b80d8

now that we have a reg class to spill with, get this info from the regclass

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23559 91177308-0d34-0410-b5e6-96231b3b80d8

constant fold these calls

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23558 91177308-0d34-0410-b5e6-96231b3b80d8

simplify this code using the new regclass info passed in

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23557 91177308-0d34-0410-b5e6-96231b3b80d8

Now that we have getCalleeSaveRegClasses() info, use it to pass the register
class into the spill/reload methods.  Targets can now rely on that argument.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23556 91177308-0d34-0410-b5e6-96231b3b80d8

expose a new virtual method

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23555 91177308-0d34-0410-b5e6-96231b3b80d8

stub out a virtual method

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23554 91177308-0d34-0410-b5e6-96231b3b80d8

Compute a preferred spill register class for each callee-save register

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23553 91177308-0d34-0410-b5e6-96231b3b80d8

CR registers are not used by this "target"

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23552 91177308-0d34-0410-b5e6-96231b3b80d8

these registers don't belong to any register classes, so don't mark them
as callee save.  They can never be generated by the compiler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23551 91177308-0d34-0410-b5e6-96231b3b80d8

Fix a warning

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23550 91177308-0d34-0410-b5e6-96231b3b80d8

Regenerate

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23549 91177308-0d34-0410-b5e6-96231b3b80d8

Refactor this a bit to move ParsingTemplateArgs to only apply to classes,
not defs.

Implement support for forward definitions of classes.  This implements
TableGen/ForwardRef.td.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23548 91177308-0d34-0410-b5e6-96231b3b80d8

Add a test that you can forward ref a class.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23547 91177308-0d34-0410-b5e6-96231b3b80d8

Regenerate

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23546 91177308-0d34-0410-b5e6-96231b3b80d8

Generate a parse error instead of a checked exception if template args are
used on a def.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23545 91177308-0d34-0410-b5e6-96231b3b80d8

Now that self referential classes are supported, get rid of a work-around.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23544 91177308-0d34-0410-b5e6-96231b3b80d8

regenerate

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23543 91177308-0d34-0410-b5e6-96231b3b80d8

Refactor the grammar a bit to implement TableGen/ForwardRef.td

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23542 91177308-0d34-0410-b5e6-96231b3b80d8

Check that we can refer to the same class we are defining.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23541 91177308-0d34-0410-b5e6-96231b3b80d8

allow regs to be in multiple reg classes

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23540 91177308-0d34-0410-b5e6-96231b3b80d8

pass extra args

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23539 91177308-0d34-0410-b5e6-96231b3b80d8

these methods get extra args

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23538 91177308-0d34-0410-b5e6-96231b3b80d8

Pass extra regclasses into spilling code

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23537 91177308-0d34-0410-b5e6-96231b3b80d8

Change this code ot pass register classes into the stack slot spiller/reloader
code.  PrologEpilogInserter hasn't been updated yet though, so targets cannot
use this info.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23536 91177308-0d34-0410-b5e6-96231b3b80d8

Change these methods to take RC's

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23535 91177308-0d34-0410-b5e6-96231b3b80d8

Use the 32-bit version for now

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23534 91177308-0d34-0410-b5e6-96231b3b80d8

Add a bunch of patterns for F64 FP ops, add some more integer ops

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23533 91177308-0d34-0410-b5e6-96231b3b80d8

Remove code for patterns that are autogenerated

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23532 91177308-0d34-0410-b5e6-96231b3b80d8

begining alpha subtarget support

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23531 91177308-0d34-0410-b5e6-96231b3b80d8

tblgen autogens this pattern now

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23530 91177308-0d34-0410-b5e6-96231b3b80d8

Teach tablegen to reassociate operators when possible.  This allows it to
find all of teh pattern matches for EQV from one definition

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23529 91177308-0d34-0410-b5e6-96231b3b80d8

copy and paste error

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23528 91177308-0d34-0410-b5e6-96231b3b80d8

now that tblgen is smarter, this pattern is not needed.  Also, tblgen
now inverts commuted versions of ANDC/ORC with the current .td file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23527 91177308-0d34-0410-b5e6-96231b3b80d8

Teach tblgen to build permutations of instructions, so that the target author
doesn't have to specify them manually.  It currently handles associativity,
e.g. knowing that (X*Y)+Z  also matches  X+(Y*Z)  and will be extended in
the future.

It is smart enough to not introduce duplicate patterns or patterns that can
never match.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23526 91177308-0d34-0410-b5e6-96231b3b80d8

Insert stores after phi nodes in the normal dest.  This fixes
LowerInvoke/2005-08-03-InvokeWithPHI.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23525 91177308-0d34-0410-b5e6-96231b3b80d8

consistency with other cases, no functionality change

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23524 91177308-0d34-0410-b5e6-96231b3b80d8

Make the JIT default to the DAG isel instead of the pattern isel, like LLC.
The Pattern isel has some strange memory corruption issues going on. :(

This should have been converted over anyway, but it got forgotten somehow
when switching to the dag isel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23523 91177308-0d34-0410-b5e6-96231b3b80d8

Fix two bugs in my patch earlier today that broke int->fp conversion on X86.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23522 91177308-0d34-0410-b5e6-96231b3b80d8

Fold isascii into a simple comparison.  This speeds up 197.parser by 7.4%,
bringing the LLC time down to the CBE time.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23521 91177308-0d34-0410-b5e6-96231b3b80d8

new testcase for isascii

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23520 91177308-0d34-0410-b5e6-96231b3b80d8

remove a bunch of unneeded stuff, or self evident comments

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23519 91177308-0d34-0410-b5e6-96231b3b80d8

add a new testcase

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23518 91177308-0d34-0410-b5e6-96231b3b80d8

Implement a couple of memcmp folds from the todo list

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23517 91177308-0d34-0410-b5e6-96231b3b80d8

Silence VC++ redeclaration warnings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23516 91177308-0d34-0410-b5e6-96231b3b80d8

Never rely on ReplaceAllUsesWith when selecting, use CodeGenMap instead.
ReplaceAllUsesWith does not replace scalars SDOperand floating around on
the stack, permitting things to be selected multiple times.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23515 91177308-0d34-0410-b5e6-96231b3b80d8

Codegen ADD X, IMM -> addis/addi if needed.
This implements PowerPC/fold-li.ll

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23514 91177308-0d34-0410-b5e6-96231b3b80d8

add a testcase for a feature we regressed on because noone wrote the test! :(

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23513 91177308-0d34-0410-b5e6-96231b3b80d8

Autogen MUL, move FP cases together

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23512 91177308-0d34-0410-b5e6-96231b3b80d8

disentangle FP from INT versions of div/mul

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23511 91177308-0d34-0410-b5e6-96231b3b80d8

Use the autogenerated matcher for ADD/SUB

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23510 91177308-0d34-0410-b5e6-96231b3b80d8

add a patter for SUBFIC

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23509 91177308-0d34-0410-b5e6-96231b3b80d8

Mark int binops as int-only, add FP binops.  Mark FADD/FMUL as commutative but
not associative.  Add [SU]REM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23508 91177308-0d34-0410-b5e6-96231b3b80d8

wrap a long line

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23507 91177308-0d34-0410-b5e6-96231b3b80d8

Add FP versions of the binary operators, keeping the int and fp worlds seperate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23506 91177308-0d34-0410-b5e6-96231b3b80d8

Add FP versions of the binary operators, keeping the int and fp worlds seperate.
Though I have done extensive testing, it is possible that this will break
things in configs I can't test.  Please let me know if this causes a problem
and I'll fix it ASAP.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23505 91177308-0d34-0410-b5e6-96231b3b80d8

Add FP versions of the binary operators, keeping the int and fp worlds seperate.

Though I have done extensive testing, it is possible that this will break
things in configs I can't test.  Please let me know if this causes a problem
and I'll fix it ASAP.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23504 91177308-0d34-0410-b5e6-96231b3b80d8

Mark associative nodes as associative

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23503 91177308-0d34-0410-b5e6-96231b3b80d8

add support for an associative marker

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23502 91177308-0d34-0410-b5e6-96231b3b80d8