From: Evan Cheng <evan.cheng@apple.com>
Date: Mon, 27 Jul 2009 18:38:54 +0000 (+0000)
Subject: Get rid of more dead code.
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=fc17fb0aeed584b8560461ab2843d0676a243f29;p=oota-llvm.git

Get rid of more dead code.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77227 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/ARM/ARMBaseInstrInfo.h b/lib/Target/ARM/ARMBaseInstrInfo.h
index e91d1ebf0e5..52f55a88b60 100644
--- a/lib/Target/ARM/ARMBaseInstrInfo.h
+++ b/lib/Target/ARM/ARMBaseInstrInfo.h
@@ -165,9 +165,7 @@ namespace ARMII {
     ADDri,
     ADDrs,
     ADDrr,
-    LDRri,
     MOVr,
-    STRri,
     SUBri,
     SUBrs,
     SUBrr
diff --git a/lib/Target/ARM/ARMBaseRegisterInfo.cpp b/lib/Target/ARM/ARMBaseRegisterInfo.cpp
index 6ef1fff8d81..dfad80b56ef 100644
--- a/lib/Target/ARM/ARMBaseRegisterInfo.cpp
+++ b/lib/Target/ARM/ARMBaseRegisterInfo.cpp
@@ -1368,7 +1368,7 @@ static bool isCSRestore(MachineInstr *MI,
 
 void ARMBaseRegisterInfo::
 emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const {
-  assert(!STI.isThumb1Only &&
+  assert(!STI.isThumb1Only() &&
          "This emitEpilogue should not be executed for Thumb1!");
 
   MachineBasicBlock::iterator MBBI = prior(MBB.end());
diff --git a/lib/Target/ARM/ARMInstrInfo.cpp b/lib/Target/ARM/ARMInstrInfo.cpp
index fda9fc23eb2..e5eb7bc8991 100644
--- a/lib/Target/ARM/ARMInstrInfo.cpp
+++ b/lib/Target/ARM/ARMInstrInfo.cpp
@@ -68,9 +68,7 @@ getOpcode(ARMII::Op Op) const {
   case ARMII::ADDri: return ARM::ADDri;
   case ARMII::ADDrs: return ARM::ADDrs;
   case ARMII::ADDrr: return ARM::ADDrr;
-  case ARMII::LDRri: return 0;
   case ARMII::MOVr: return ARM::MOVr;
-  case ARMII::STRri: return 0;
   case ARMII::SUBri: return ARM::SUBri;
   case ARMII::SUBrs: return ARM::SUBrs;
   case ARMII::SUBrr: return ARM::SUBrr;
diff --git a/lib/Target/ARM/Thumb1InstrInfo.cpp b/lib/Target/ARM/Thumb1InstrInfo.cpp
index a4e8e9ce705..43381a31525 100644
--- a/lib/Target/ARM/Thumb1InstrInfo.cpp
+++ b/lib/Target/ARM/Thumb1InstrInfo.cpp
@@ -35,9 +35,7 @@ unsigned Thumb1InstrInfo::getOpcode(ARMII::Op Op) const {
   case ARMII::ADDri: return ARM::tADDi8;
   case ARMII::ADDrs: return 0;
   case ARMII::ADDrr: return ARM::tADDrr;
-  case ARMII::LDRri: return 0;
   case ARMII::MOVr: return ARM::tMOVr;
-  case ARMII::STRri: return 0;
   case ARMII::SUBri: return ARM::tSUBi8;
   case ARMII::SUBrs: return 0;
   case ARMII::SUBrr: return ARM::tSUBrr;
diff --git a/lib/Target/ARM/Thumb2InstrInfo.cpp b/lib/Target/ARM/Thumb2InstrInfo.cpp
index 45eb29cbb3a..acb82320df0 100644
--- a/lib/Target/ARM/Thumb2InstrInfo.cpp
+++ b/lib/Target/ARM/Thumb2InstrInfo.cpp
@@ -36,9 +36,7 @@ unsigned Thumb2InstrInfo::getOpcode(ARMII::Op Op) const {
   case ARMII::ADDri: return ARM::t2ADDri;
   case ARMII::ADDrs: return ARM::t2ADDrs;
   case ARMII::ADDrr: return ARM::t2ADDrr;
-  case ARMII::LDRri: return ARM::t2LDRi12;
   case ARMII::MOVr: return ARM::t2MOVr;
-  case ARMII::STRri: return ARM::t2STRi12;
   case ARMII::SUBri: return ARM::t2SUBri;
   case ARMII::SUBrs: return ARM::t2SUBrs;
   case ARMII::SUBrr: return ARM::t2SUBrr;