From: Chris Lattner Date: Mon, 3 Mar 2003 17:25:18 +0000 (+0000) Subject: Change the mem2reg interface to accept a TargetData argument X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=fb743a937f6856e3ab1f8ed599677038750a550e;p=oota-llvm.git Change the mem2reg interface to accept a TargetData argument git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@5685 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/include/llvm/Transforms/Utils/PromoteMemToReg.h b/include/llvm/Transforms/Utils/PromoteMemToReg.h index ee8b7c0cb2e..436fa43a31d 100644 --- a/include/llvm/Transforms/Utils/PromoteMemToReg.h +++ b/include/llvm/Transforms/Utils/PromoteMemToReg.h @@ -10,12 +10,13 @@ class AllocaInst; class DominanceFrontier; +class TargetData; #include /// isAllocaPromotable - Return true if this alloca is legal for promotion. /// This is true if there are only loads and stores to the alloca... /// -bool isAllocaPromotable(const AllocaInst *AI); +bool isAllocaPromotable(const AllocaInst *AI, const TargetData &TD); /// PromoteMemToReg - Promote the specified list of alloca instructions into /// scalar registers, inserting PHI nodes as appropriate. This function makes @@ -23,7 +24,6 @@ bool isAllocaPromotable(const AllocaInst *AI); /// of the function at all. All allocas must be from the same function. /// void PromoteMemToReg(const std::vector &Allocas, - DominanceFrontier &DF); - + DominanceFrontier &DF, const TargetData &TD); #endif diff --git a/lib/Transforms/Scalar/LICM.cpp b/lib/Transforms/Scalar/LICM.cpp index 334ede39d98..128a0d82335 100644 --- a/lib/Transforms/Scalar/LICM.cpp +++ b/lib/Transforms/Scalar/LICM.cpp @@ -27,6 +27,7 @@ #include "llvm/Analysis/Dominators.h" #include "llvm/Instructions.h" #include "llvm/DerivedTypes.h" +#include "llvm/Target/TargetData.h" #include "llvm/Support/InstVisitor.h" #include "llvm/Support/CFG.h" #include "Support/Statistic.h" @@ -457,7 +458,8 @@ void LICM::PromoteValuesInLoop() { PromotedAllocas.reserve(PromotedValues.size()); for (unsigned i = 0, e = PromotedValues.size(); i != e; ++i) PromotedAllocas.push_back(PromotedValues[i].first); - PromoteMemToReg(PromotedAllocas, getAnalysis()); + PromoteMemToReg(PromotedAllocas, getAnalysis(), + AA->getTargetData()); } /// findPromotableValuesInLoop - Check the current loop for stores to definate diff --git a/lib/Transforms/Utils/Mem2Reg.cpp b/lib/Transforms/Utils/Mem2Reg.cpp index 6fbb43f6c3f..848c4d67066 100644 --- a/lib/Transforms/Utils/Mem2Reg.cpp +++ b/lib/Transforms/Utils/Mem2Reg.cpp @@ -10,6 +10,7 @@ #include "llvm/Analysis/Dominators.h" #include "llvm/iMemory.h" #include "llvm/Function.h" +#include "llvm/Target/TargetData.h" #include "Support/Statistic.h" namespace { @@ -25,6 +26,7 @@ namespace { // virtual void getAnalysisUsage(AnalysisUsage &AU) const { AU.addRequired(); + AU.addRequired(); AU.setPreservesCFG(); } }; @@ -34,6 +36,7 @@ namespace { bool PromotePass::runOnFunction(Function &F) { std::vector Allocas; + const TargetData &TD = getAnalysis(); BasicBlock &BB = F.getEntryNode(); // Get the entry node for the function @@ -41,11 +44,11 @@ bool PromotePass::runOnFunction(Function &F) { // the entry node for (BasicBlock::iterator I = BB.begin(), E = --BB.end(); I != E; ++I) if (AllocaInst *AI = dyn_cast(&*I)) // Is it an alloca? - if (isAllocaPromotable(AI)) + if (isAllocaPromotable(AI, TD)) Allocas.push_back(AI); if (!Allocas.empty()) { - PromoteMemToReg(Allocas, getAnalysis()); + PromoteMemToReg(Allocas, getAnalysis(), TD); NumPromoted += Allocas.size(); return true; } diff --git a/lib/Transforms/Utils/PromoteMemoryToRegister.cpp b/lib/Transforms/Utils/PromoteMemoryToRegister.cpp index 1efa8c2393f..6ea8947af9b 100644 --- a/lib/Transforms/Utils/PromoteMemoryToRegister.cpp +++ b/lib/Transforms/Utils/PromoteMemoryToRegister.cpp @@ -28,7 +28,10 @@ /// isAllocaPromotable - Return true if this alloca is legal for promotion. /// This is true if there are only loads and stores to the alloca... /// -bool isAllocaPromotable(const AllocaInst *AI) { +bool isAllocaPromotable(const AllocaInst *AI, const TargetData &TD) { + // FIXME: If the memory unit is of pointer or integer type, we can permit + // assignments to subsections of the memory unit. + // Only allow direct loads and stores... for (Value::use_const_iterator UI = AI->use_begin(), UE = AI->use_end(); UI != UE; ++UI) // Loop over all of the uses of the alloca @@ -48,6 +51,7 @@ namespace { struct PromoteMem2Reg { const std::vector &Allocas; // the alloca instructions.. DominanceFrontier &DF; + const TargetData &TD; std::map AllocaLookup; // reverse mapping of above @@ -60,8 +64,9 @@ namespace { std::vector > NewPhiNodes; // the PhiNodes we're adding public: - PromoteMem2Reg(const std::vector &A, DominanceFrontier &df) - :Allocas(A), DF(df) {} + PromoteMem2Reg(const std::vector &A, DominanceFrontier &df, + const TargetData &td) + : Allocas(A), DF(df), TD(td) {} void run(); @@ -81,7 +86,7 @@ void PromoteMem2Reg::run() { Function &F = *DF.getRoot()->getParent(); for (unsigned i = 0, e = Allocas.size(); i != e; ++i) { - assert(isAllocaPromotable(Allocas[i]) && + assert(isAllocaPromotable(Allocas[i], TD) && "Cannot promote non-promotable alloca!"); assert(Allocas[i]->getParent()->getParent() == &F && "All allocas should be in the same function, which is same as DF!"); @@ -240,6 +245,6 @@ void PromoteMem2Reg::RenamePass(BasicBlock *BB, BasicBlock *Pred, /// of the function at all. All allocas must be from the same function. /// void PromoteMemToReg(const std::vector &Allocas, - DominanceFrontier &DF) { - PromoteMem2Reg(Allocas, DF).run(); + DominanceFrontier &DF, const TargetData &TD) { + PromoteMem2Reg(Allocas, DF, TD).run(); }