From: Tom Stellard Date: Wed, 11 Dec 2013 17:51:47 +0000 (+0000) Subject: R600: Register AMDGPUCFGStructurizer pass X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=f8029c70e0a688ce17d473d006c5ca517528719f;p=oota-llvm.git R600: Register AMDGPUCFGStructurizer pass This enables -print-before-all to dump MachineInstrs after it is run. Reviewed-by: Vincent Lejeune git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@197057 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/R600/AMDGPU.h b/lib/Target/R600/AMDGPU.h index e73bde10d9e..8eb1b695d76 100644 --- a/lib/Target/R600/AMDGPU.h +++ b/lib/Target/R600/AMDGPU.h @@ -32,7 +32,7 @@ FunctionPass *createR600EmitClauseMarkers(); FunctionPass *createR600ClauseMergePass(TargetMachine &tm); FunctionPass *createR600Packetizer(TargetMachine &tm); FunctionPass *createR600ControlFlowFinalizer(TargetMachine &tm); -FunctionPass *createAMDGPUCFGStructurizerPass(TargetMachine &tm); +FunctionPass *createAMDGPUCFGStructurizerPass(); // SI Passes FunctionPass *createSITypeRewriter(); diff --git a/lib/Target/R600/AMDGPUTargetMachine.cpp b/lib/Target/R600/AMDGPUTargetMachine.cpp index 2334b061bfc..2d2bed062a5 100644 --- a/lib/Target/R600/AMDGPUTargetMachine.cpp +++ b/lib/Target/R600/AMDGPUTargetMachine.cpp @@ -179,7 +179,7 @@ bool AMDGPUPassConfig::addPreSched2() { bool AMDGPUPassConfig::addPreEmitPass() { const AMDGPUSubtarget &ST = TM->getSubtarget(); if (ST.getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) { - addPass(createAMDGPUCFGStructurizerPass(*TM)); + addPass(createAMDGPUCFGStructurizerPass()); addPass(createR600ExpandSpecialInstrsPass(*TM)); addPass(&FinalizeMachineBundlesID); addPass(createR600Packetizer(*TM)); diff --git a/lib/Target/R600/AMDILCFGStructurizer.cpp b/lib/Target/R600/AMDILCFGStructurizer.cpp index 507570fdcaa..92ce82fc227 100644 --- a/lib/Target/R600/AMDILCFGStructurizer.cpp +++ b/lib/Target/R600/AMDILCFGStructurizer.cpp @@ -54,6 +54,10 @@ STATISTIC(numLoopcontPatternMatch, "CFGStructurizer number of loop-continue " STATISTIC(numClonedBlock, "CFGStructurizer cloned blocks"); STATISTIC(numClonedInstr, "CFGStructurizer cloned instructions"); +namespace llvm { + void initializeAMDGPUCFGStructurizerPass(PassRegistry&); +} + //===----------------------------------------------------------------------===// // // Miscellaneous utility for CFGStructurizer. @@ -131,13 +135,13 @@ public: static char ID; - AMDGPUCFGStructurizer(TargetMachine &tm) : - MachineFunctionPass(ID), TM(tm), - TII(static_cast(tm.getInstrInfo())), - TRI(&TII->getRegisterInfo()) { } + AMDGPUCFGStructurizer() : + MachineFunctionPass(ID), TII(NULL), TRI(NULL) { + initializeAMDGPUCFGStructurizerPass(*PassRegistry::getPassRegistry()); + } const char *getPassName() const { - return "AMD IL Control Flow Graph structurizer Pass"; + return "AMDGPU Control Flow Graph structurizer Pass"; } void getAnalysisUsage(AnalysisUsage &AU) const { @@ -157,6 +161,8 @@ public: bool prepare(); bool runOnMachineFunction(MachineFunction &MF) { + TII = static_cast(MF.getTarget().getInstrInfo()); + TRI = &TII->getRegisterInfo(); DEBUG(MF.dump();); OrderedBlks.clear(); FuncRep = &MF; @@ -173,7 +179,6 @@ public: } protected: - TargetMachine &TM; MachineDominatorTree *MDT; MachinePostDominatorTree *PDT; MachineLoopInfo *MLI; @@ -1899,6 +1904,14 @@ char AMDGPUCFGStructurizer::ID = 0; } // end anonymous namespace -FunctionPass *llvm::createAMDGPUCFGStructurizerPass(TargetMachine &tm) { - return new AMDGPUCFGStructurizer(tm); +INITIALIZE_PASS_BEGIN(AMDGPUCFGStructurizer, "amdgpustructurizer", + "AMDGPU CFG Structurizer", false, false) +INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree) +INITIALIZE_PASS_DEPENDENCY(MachinePostDominatorTree) +INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo) +INITIALIZE_PASS_END(AMDGPUCFGStructurizer, "amdgpustructurizer", + "AMDGPU CFG Structurizer", false, false) + +FunctionPass *llvm::createAMDGPUCFGStructurizerPass() { + return new AMDGPUCFGStructurizer(); }