From: Evan Cheng Date: Fri, 24 Jun 2011 20:42:09 +0000 (+0000) Subject: - Add MCRegisterInfo registration machinery. Also added x86 registration routines. X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=f5fa52ed064098be7130aa4ec1236037907ce3fa;p=oota-llvm.git - Add MCRegisterInfo registration machinery. Also added x86 registration routines. - Rename TargetRegisterDesc to MCRegisterDesc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133820 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/include/llvm/MC/MCRegisterInfo.h b/include/llvm/MC/MCRegisterInfo.h index 30db84b7620..c2ec08e7b21 100644 --- a/include/llvm/MC/MCRegisterInfo.h +++ b/include/llvm/MC/MCRegisterInfo.h @@ -30,7 +30,7 @@ namespace llvm { /// super-registers of the specific register, e.g. RAX, EAX, are super-registers /// of AX. /// -struct TargetRegisterDesc { +struct MCRegisterDesc { const char *Name; // Printable name for the reg (for debugging) const unsigned *Overlaps; // Overlapping registers, described above const unsigned *SubRegs; // Sub-register set, described above @@ -43,20 +43,26 @@ struct TargetRegisterDesc { /// to this array so that we can turn register number into a register /// descriptor. /// +/// Note this class is designed to be a base class of TargetRegisterInfo, which +/// is the interface used by codegen. However, specific targets *should never* +/// specialize this class. MCRegisterInfo should only contain getters to access +/// TableGen generated physical register data. It must not be extended with +/// virtual methods. +/// class MCRegisterInfo { private: - const TargetRegisterDesc *Desc; // Pointer to the descriptor array + const MCRegisterDesc *Desc; // Pointer to the descriptor array unsigned NumRegs; // Number of entries in the array public: /// InitMCRegisterInfo - Initialize MCRegisterInfo, called by TableGen /// auto-generated routines. *DO NOT USE*. - void InitMCRegisterInfo(const TargetRegisterDesc *D, unsigned NR) { + void InitMCRegisterInfo(const MCRegisterDesc *D, unsigned NR) { Desc = D; NumRegs = NR; } - const TargetRegisterDesc &operator[](unsigned RegNo) const { + const MCRegisterDesc &operator[](unsigned RegNo) const { assert(RegNo < NumRegs && "Attempting to access record for invalid register number!"); return Desc[RegNo]; @@ -65,7 +71,7 @@ public: /// Provide a get method, equivalent to [], but more useful if we have a /// pointer to this object. /// - const TargetRegisterDesc &get(unsigned RegNo) const { + const MCRegisterDesc &get(unsigned RegNo) const { return operator[](RegNo); } diff --git a/include/llvm/Target/TargetRegisterInfo.h b/include/llvm/Target/TargetRegisterInfo.h index d50bfe7eecd..2b7e1f9bde6 100644 --- a/include/llvm/Target/TargetRegisterInfo.h +++ b/include/llvm/Target/TargetRegisterInfo.h @@ -256,6 +256,9 @@ public: bool isAllocatable() const { return Allocatable; } }; +/// TargetRegisterDesc - It's just an alias of MCRegisterDesc. +typedef MCRegisterDesc TargetRegisterDesc; + /// TargetRegisterInfoDesc - Extra information, not in MCRegisterDesc, about /// registers. These are used by codegen, not by MC. struct TargetRegisterInfoDesc { diff --git a/include/llvm/Target/TargetRegistry.h b/include/llvm/Target/TargetRegistry.h index 2e219011ab7..cf338992d14 100644 --- a/include/llvm/Target/TargetRegistry.h +++ b/include/llvm/Target/TargetRegistry.h @@ -66,8 +66,7 @@ namespace llvm { typedef MCAsmInfo *(*AsmInfoCtorFnTy)(const Target &T, StringRef TT); - typedef MCRegisterInfo *(*RegInfoCtorFnTy)(const Target &T, - StringRef TT); + typedef MCRegisterInfo *(*MCRegInfoCtorFnTy)(void); typedef TargetMachine *(*TargetMachineCtorTy)(const Target &T, const std::string &TT, const std::string &Features); @@ -127,9 +126,9 @@ namespace llvm { /// registered. AsmInfoCtorFnTy AsmInfoCtorFn; - /// RegInfoCtorFn - Constructor function for this target's MCRegisterInfo, + /// MCRegInfoCtorFn - Constructor function for this target's MCRegisterInfo, /// if registered. - RegInfoCtorFnTy RegInfoCtorFn; + MCRegInfoCtorFnTy MCRegInfoCtorFn; /// TargetMachineCtorFn - Construction function for this target's /// TargetMachine, if registered. @@ -240,17 +239,12 @@ namespace llvm { return AsmInfoCtorFn(*this, Triple); } - /// createRegInfo - Create a MCRegisterInfo implementation for the specified - /// target triple. + /// createMCRegInfo - Create a MCRegisterInfo implementation. /// - /// \arg Triple - This argument is used to determine the target machine - /// feature set; it should always be provided. Generally this should be - /// either the target triple from the module, or the target triple of the - /// host if that does not exist. - MCRegisterInfo *createRegInfo(StringRef Triple) const { - if (!RegInfoCtorFn) + MCRegisterInfo *createMCRegInfo() const { + if (!MCRegInfoCtorFn) return 0; - return RegInfoCtorFn(*this, Triple); + return MCRegInfoCtorFn(); } /// createTargetMachine - Create a target specific machine implementation @@ -466,7 +460,7 @@ namespace llvm { T.AsmInfoCtorFn = Fn; } - /// RegisterRegInfo - Register a MCRegisterInfo implementation for the + /// RegisterMCRegInfo - Register a MCRegisterInfo implementation for the /// given target. /// /// Clients are responsible for ensuring that registration doesn't occur @@ -475,10 +469,10 @@ namespace llvm { /// /// @param T - The target being registered. /// @param Fn - A function to construct a MCRegisterInfo for the target. - static void RegisterRegInfo(Target &T, Target::RegInfoCtorFnTy Fn) { + static void RegisterMCRegInfo(Target &T, Target::MCRegInfoCtorFnTy Fn) { // Ignore duplicate registration. - if (!T.RegInfoCtorFn) - T.RegInfoCtorFn = Fn; + if (!T.MCRegInfoCtorFn) + T.MCRegInfoCtorFn = Fn; } /// RegisterTargetMachine - Register a TargetMachine implementation for the @@ -691,6 +685,38 @@ namespace llvm { } }; + /// RegisterMCRegInfo - Helper template for registering a target register info + /// implementation. This invokes the static "Create" method on the class to + /// actually do the construction. Usage: + /// + /// extern "C" void LLVMInitializeFooTarget() { + /// extern Target TheFooTarget; + /// RegisterMCRegInfo X(TheFooTarget); + /// } + template + struct RegisterMCRegInfo { + RegisterMCRegInfo(Target &T) { + TargetRegistry::RegisterMCRegInfo(T, &Allocator); + } + private: + static MCRegisterInfo *Allocator() { + return new MCRegisterInfoImpl(); + } + }; + + /// RegisterMCRegInfoFn - Helper template for registering a target register + /// info implementation. This invokes the specified function to do the + /// construction. Usage: + /// + /// extern "C" void LLVMInitializeFooTarget() { + /// extern Target TheFooTarget; + /// RegisterMCRegInfoFn X(TheFooTarget, TheFunction); + /// } + struct RegisterMCRegInfoFn { + RegisterMCRegInfoFn(Target &T, Target::MCRegInfoCtorFnTy Fn) { + TargetRegistry::RegisterMCRegInfo(T, Fn); + } + }; /// RegisterTargetMachine - Helper template for registering a target machine /// implementation, for use in the target machine initialization diff --git a/lib/Target/X86/TargetDesc/X86TargetDesc.cpp b/lib/Target/X86/TargetDesc/X86TargetDesc.cpp index cf03d48f3c4..8d61745f10d 100644 --- a/lib/Target/X86/TargetDesc/X86TargetDesc.cpp +++ b/lib/Target/X86/TargetDesc/X86TargetDesc.cpp @@ -13,6 +13,7 @@ #include "X86TargetDesc.h" #include "llvm/MC/MCRegisterInfo.h" +#include "llvm/Target/TargetRegistry.h" #include "X86GenRegisterDesc.inc" using namespace llvm; @@ -21,3 +22,12 @@ MCRegisterInfo *createX86MCRegisterInfo() { InitX86MCRegisterInfo(X); return X; } + +// Force static initialization. +extern "C" void LLVMInitializeX86MCRegInfo() { + RegisterMCRegInfo X(TheX86_32Target); + RegisterMCRegInfo Y(TheX86_64Target); + + TargetRegistry::RegisterMCRegInfo(TheX86_32Target, createX86MCRegisterInfo); + TargetRegistry::RegisterMCRegInfo(TheX86_64Target, createX86MCRegisterInfo); +} diff --git a/lib/Target/X86/TargetDesc/X86TargetDesc.h b/lib/Target/X86/TargetDesc/X86TargetDesc.h index d08aec773ba..d31f301ba3d 100644 --- a/lib/Target/X86/TargetDesc/X86TargetDesc.h +++ b/lib/Target/X86/TargetDesc/X86TargetDesc.h @@ -11,6 +11,12 @@ // //===----------------------------------------------------------------------===// +namespace llvm { +class Target; + +extern Target TheX86_32Target, TheX86_64Target; +} // End llvm namespace + // Defines symbolic names for X86 registers. This defines a mapping from // register name to register number. // diff --git a/utils/TableGen/RegisterInfoEmitter.cpp b/utils/TableGen/RegisterInfoEmitter.cpp index 5b25f82a570..6fd8bb47723 100644 --- a/utils/TableGen/RegisterInfoEmitter.cpp +++ b/utils/TableGen/RegisterInfoEmitter.cpp @@ -631,7 +631,7 @@ void RegisterInfoEmitter::runDesc(raw_ostream &OS) { const std::string &TargetName = Target.getName(); std::string ClassName = TargetName + "GenMCRegisterInfo"; OS << "struct " << ClassName << " : public MCRegisterInfo {\n" - << " explicit " << ClassName << "(const TargetRegisterDesc *D);\n"; + << " explicit " << ClassName << "(const MCRegisterDesc *D);\n"; OS << "};\n"; OS << "\nnamespace {\n"; @@ -684,7 +684,7 @@ void RegisterInfoEmitter::runDesc(raw_ostream &OS) { OS << "0 };\n"; } - OS << "\n const TargetRegisterDesc " << TargetName + OS << "\n const MCRegisterDesc " << TargetName << "RegDesc[] = { // Descriptors\n"; OS << " { \"NOREG\",\t0,\t0,\t0 },\n";