From: Tim Northover <tnorthover@apple.com>
Date: Fri, 16 May 2014 09:40:52 +0000 (+0000)
Subject: ARM64: disable printing of "lslv" type aliases
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=ef5f53b78fcf20c8c5a36808be70da262cb47146;p=oota-llvm.git

ARM64: disable printing of "lslv" type aliases

You can write "lslv w0, w1, w2" (probably for legacy reasons), but it should be
printed as simply "lsl".

This will be tested when the TableGen "should I print this Alias" heuristic is
fixed (very soon).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208956 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/ARM64/ARM64InstrFormats.td b/lib/Target/ARM64/ARM64InstrFormats.td
index 875f0aebde3..8133a0084f7 100644
--- a/lib/Target/ARM64/ARM64InstrFormats.td
+++ b/lib/Target/ARM64/ARM64InstrFormats.td
@@ -1255,7 +1255,7 @@ multiclass Shift<bits<2> shift_type, string asm, SDNode OpNode> {
 
 class ShiftAlias<string asm, Instruction inst, RegisterClass regtype>
     : InstAlias<asm#" $dst, $src1, $src2",
-                (inst regtype:$dst, regtype:$src1, regtype:$src2)>;
+                (inst regtype:$dst, regtype:$src1, regtype:$src2), 0>;
 
 class BaseMulAccum<bit isSub, bits<3> opc, RegisterClass multype,
                        RegisterClass addtype, string asm,