From: Misha Brukman Date: Thu, 21 Apr 2005 22:36:52 +0000 (+0000) Subject: Remove trailing whitespace X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=edf128a7fa90f2b0b7ee24741a04a7ae1ecd6f7e;p=oota-llvm.git Remove trailing whitespace git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21420 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/CodeGen/AsmPrinter.cpp b/lib/CodeGen/AsmPrinter.cpp index 6b4afb7dd8f..7abb8d59543 100644 --- a/lib/CodeGen/AsmPrinter.cpp +++ b/lib/CodeGen/AsmPrinter.cpp @@ -148,7 +148,7 @@ static void printAsCString(std::ostream &O, const ConstantArray *CVA) { O << "\""; for (unsigned i = 0; i != CVA->getNumOperands(); ++i) { - unsigned char C = + unsigned char C = (unsigned char)cast(CVA->getOperand(i))->getRawValue(); if (C == '"') { @@ -178,7 +178,7 @@ static void printAsCString(std::ostream &O, const ConstantArray *CVA) { /// emitGlobalConstant - Print a general LLVM constant to the .s file. /// -void AsmPrinter::emitGlobalConstant(const Constant *CV) { +void AsmPrinter::emitGlobalConstant(const Constant *CV) { const TargetData &TD = TM.getTargetData(); if (CV->isNullValue() || isa(CV)) { @@ -253,7 +253,7 @@ void AsmPrinter::emitGlobalConstant(const Constant *CV) { int32_t UVal; } U; U.FVal = (float)Val; - + O << Data32bitsDirective << U.UVal << "\t" << CommentString << " float " << Val << "\n"; return; @@ -261,7 +261,7 @@ void AsmPrinter::emitGlobalConstant(const Constant *CV) { } else if (CV->getType() == Type::ULongTy || CV->getType() == Type::LongTy) { if (const ConstantInt *CI = dyn_cast(CV)) { uint64_t Val = CI->getRawValue(); - + if (Data64bitsDirective) O << Data64bitsDirective << Val << "\n"; else if (TD.isBigEndian()) { @@ -285,7 +285,7 @@ void AsmPrinter::emitGlobalConstant(const Constant *CV) { const Type *type = CV->getType(); switch (type->getTypeID()) { - case Type::BoolTyID: + case Type::BoolTyID: case Type::UByteTyID: case Type::SByteTyID: O << Data8bitsDirective; break; @@ -301,7 +301,7 @@ void AsmPrinter::emitGlobalConstant(const Constant *CV) { case Type::UIntTyID: case Type::IntTyID: O << Data32bitsDirective; break; - case Type::ULongTyID: case Type::LongTyID: + case Type::ULongTyID: case Type::LongTyID: assert (0 && "Should have already output double-word constant."); case Type::FloatTyID: case Type::DoubleTyID: assert (0 && "Should have already output floating point constant."); diff --git a/lib/CodeGen/BranchFolding.cpp b/lib/CodeGen/BranchFolding.cpp index cca9f93553c..a4b3b02ea49 100644 --- a/lib/CodeGen/BranchFolding.cpp +++ b/lib/CodeGen/BranchFolding.cpp @@ -1,10 +1,10 @@ //===-- BranchFolding.cpp - Fold machine code branch instructions ---------===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This pass forwards branches to unconditional branches to make them branch @@ -158,7 +158,7 @@ bool BranchFolder::OptimizeBlock(MachineFunction::iterator MBB, assert(Br->getNumOperands() == 1 && Br->getOperand(0).isMachineBasicBlock() && "Uncond branch should take one MBB argument!"); MachineBasicBlock *Dest = Br->getOperand(0).getMachineBasicBlock(); - + while (!MBB->pred_empty()) { MachineBasicBlock *Pred = *(MBB->pred_end()-1); ReplaceUsesOfBlockWith(Pred, MBB, Dest, TII); diff --git a/lib/CodeGen/IntrinsicLowering.cpp b/lib/CodeGen/IntrinsicLowering.cpp index b665557d2bb..db3c10e7ead 100644 --- a/lib/CodeGen/IntrinsicLowering.cpp +++ b/lib/CodeGen/IntrinsicLowering.cpp @@ -1,10 +1,10 @@ //===-- IntrinsicLowering.cpp - Intrinsic Lowering default implementation -===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file implements the default intrinsic lowering implementation. @@ -117,7 +117,7 @@ void DefaultIntrinsicLowering::AddPrototypes(Module &M) { void DefaultIntrinsicLowering::LowerIntrinsicCall(CallInst *CI) { Function *Callee = CI->getCalledFunction(); assert(Callee && "Cannot lower an indirect call!"); - + switch (Callee->getIntrinsicID()) { case Intrinsic::not_intrinsic: std::cerr << "Cannot lower a call to a non-intrinsic function '" @@ -140,7 +140,7 @@ void DefaultIntrinsicLowering::LowerIntrinsicCall(CallInst *CI) { CI->replaceAllUsesWith(V); break; } - case Intrinsic::sigsetjmp: + case Intrinsic::sigsetjmp: if (CI->getType() != Type::VoidTy) CI->replaceAllUsesWith(Constant::getNullValue(CI->getType())); break; @@ -163,7 +163,7 @@ void DefaultIntrinsicLowering::LowerIntrinsicCall(CallInst *CI) { case Intrinsic::returnaddress: case Intrinsic::frameaddress: std::cerr << "WARNING: this target does not support the llvm." - << (Callee->getIntrinsicID() == Intrinsic::returnaddress ? + << (Callee->getIntrinsicID() == Intrinsic::returnaddress ? "return" : "frame") << "address intrinsic.\n"; CI->replaceAllUsesWith(ConstantPointerNull::get( cast(CI->getType()))); @@ -220,7 +220,7 @@ void DefaultIntrinsicLowering::LowerIntrinsicCall(CallInst *CI) { break; } } - + assert(CI->use_empty() && "Lowering should have eliminated any uses of the intrinsic call!"); CI->getParent()->getInstList().erase(CI); diff --git a/lib/CodeGen/LiveInterval.cpp b/lib/CodeGen/LiveInterval.cpp index a8bc1615b41..ffa4caab06f 100644 --- a/lib/CodeGen/LiveInterval.cpp +++ b/lib/CodeGen/LiveInterval.cpp @@ -34,7 +34,7 @@ using namespace llvm; // bool LiveInterval::liveAt(unsigned I) const { Ranges::const_iterator r = std::upper_bound(ranges.begin(), ranges.end(), I); - + if (r == ranges.begin()) return false; @@ -174,7 +174,7 @@ void LiveInterval::extendIntervalEndTo(Ranges::iterator I, unsigned NewEnd) { /// extendIntervalStartTo - This method is used when we want to extend the range /// specified by I to start at the specified endpoint. To do this, we should /// merge and eliminate all ranges that this will overlap with. -LiveInterval::Ranges::iterator +LiveInterval::Ranges::iterator LiveInterval::extendIntervalStartTo(Ranges::iterator I, unsigned NewStart) { assert(I != ranges.end() && "Not a valid interval!"); unsigned ValId = I->ValId; diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp index c0d1b2a89f5..405d9ec6504 100644 --- a/lib/CodeGen/LiveIntervalAnalysis.cpp +++ b/lib/CodeGen/LiveIntervalAnalysis.cpp @@ -742,7 +742,7 @@ bool LiveIntervals::differingRegisterClasses(unsigned RegA, // Get the register classes for the first reg. if (MRegisterInfo::isPhysicalRegister(RegA)) { - assert(MRegisterInfo::isVirtualRegister(RegB) && + assert(MRegisterInfo::isVirtualRegister(RegB) && "Shouldn't consider two physregs!"); return !mf_->getSSARegMap()->getRegClass(RegB)->contains(RegA); } @@ -775,7 +775,7 @@ bool LiveIntervals::overlapsAliases(const LiveInterval *LHS, } LiveInterval LiveIntervals::createInterval(unsigned reg) { - float Weight = MRegisterInfo::isPhysicalRegister(reg) ? + float Weight = MRegisterInfo::isPhysicalRegister(reg) ? (float)HUGE_VAL :0.0F; return LiveInterval(reg, Weight); } diff --git a/lib/CodeGen/LiveVariables.cpp b/lib/CodeGen/LiveVariables.cpp index 175b5fd7c16..94380ff542d 100644 --- a/lib/CodeGen/LiveVariables.cpp +++ b/lib/CodeGen/LiveVariables.cpp @@ -1,12 +1,12 @@ //===-- LiveVariables.cpp - Live Variable Analysis for Machine Code -------===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// -// +// // This file implements the LiveVariable analysis pass. For each machine // instruction in the function, this pass calculates the set of registers that // are immediately dead after the instruction (i.e., the instruction calculates @@ -98,7 +98,7 @@ void LiveVariables::HandleVirtRegUse(VarInfo &VRInfo, MachineBasicBlock *MBB, assert(VRInfo.Kills[i]->getParent() != MBB && "entry should be at end!"); #endif - assert(MBB != VRInfo.DefInst->getParent() && + assert(MBB != VRInfo.DefInst->getParent() && "Should have kill for defblock!"); // Add a new kill entry for this basic block. @@ -156,7 +156,7 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &MF) { // physical register. This is a purely local property, because all physical // register references as presumed dead across basic blocks. // - PhysRegInfo = (MachineInstr**)alloca(sizeof(MachineInstr*) * + PhysRegInfo = (MachineInstr**)alloca(sizeof(MachineInstr*) * RegInfo->getNumRegs()); PhysRegUsed = (bool*)alloca(sizeof(bool)*RegInfo->getNumRegs()); std::fill(PhysRegInfo, PhysRegInfo+RegInfo->getNumRegs(), (MachineInstr*)0); @@ -171,7 +171,7 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &MF) { "Cannot have a live-in virtual register!"); HandlePhysRegDef(*I, 0); } - + // Calculate live variable information in depth first order on the CFG of the // function. This guarantees that we will see the definition of a virtual // register before its uses due to dominance properties of SSA (except for PHI @@ -195,7 +195,7 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &MF) { // Unless it is a PHI node. In this case, ONLY process the DEF, not any // of the uses. They will be handled in other basic blocks. - if (MI->getOpcode() == TargetInstrInfo::PHI) + if (MI->getOpcode() == TargetInstrInfo::PHI) NumOperandsToProcess = 1; // Loop over implicit uses, using them. @@ -247,7 +247,7 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &MF) { for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(), E = MBB->succ_end(); SI != E; ++SI) { MachineBasicBlock *Succ = *SI; - + // PHI nodes are guaranteed to be at the top of the block... for (MachineBasicBlock::iterator MI = Succ->begin(), ME = Succ->end(); MI != ME && MI->getOpcode() == TargetInstrInfo::PHI; ++MI) { @@ -267,7 +267,7 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &MF) { } } } - + // Finally, if the last block in the function is a return, make sure to mark // it as using all of the live-out values in the function. if (!MBB->empty() && TII.isReturn(MBB->back().getOpcode())) { @@ -305,7 +305,7 @@ bool LiveVariables::runOnMachineFunction(MachineFunction &MF) { // function. If so, it is due to a bug in the instruction selector or some // other part of the code generator if this happens. #ifndef NDEBUG - for(MachineFunction::iterator i = MF.begin(), e = MF.end(); i != e; ++i) + for(MachineFunction::iterator i = MF.begin(), e = MF.end(); i != e; ++i) assert(Visited.count(&*i) != 0 && "unreachable basic block found"); #endif diff --git a/lib/CodeGen/MachineBasicBlock.cpp b/lib/CodeGen/MachineBasicBlock.cpp index 695ba13a49d..ee8da6744e3 100644 --- a/lib/CodeGen/MachineBasicBlock.cpp +++ b/lib/CodeGen/MachineBasicBlock.cpp @@ -133,7 +133,7 @@ void MachineBasicBlock::addPredecessor(MachineBasicBlock *pred) { } void MachineBasicBlock::removePredecessor(MachineBasicBlock *pred) { - std::vector::iterator I = + std::vector::iterator I = std::find(Predecessors.begin(), Predecessors.end(), pred); assert(I != Predecessors.end() && "Pred is not a predecessor of this block!"); Predecessors.erase(I); diff --git a/lib/CodeGen/MachineCodeEmitter.cpp b/lib/CodeGen/MachineCodeEmitter.cpp index 248b06a999b..3037cba2973 100644 --- a/lib/CodeGen/MachineCodeEmitter.cpp +++ b/lib/CodeGen/MachineCodeEmitter.cpp @@ -1,10 +1,10 @@ //===-- MachineCodeEmitter.cpp - Implement the MachineCodeEmitter itf -----===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file implements the MachineCodeEmitter interface. @@ -35,7 +35,7 @@ namespace { std::cout << "\n--- End of stub for Function\n"; return 0; } - + void emitByte(unsigned char B) { std::cout << "0x" << std::hex << (unsigned int)B << std::dec << " "; } @@ -62,14 +62,14 @@ namespace { MachineCodeEmitter &MCE; unsigned counter; unsigned values[4]; - + public: FilePrinterEmitter(MachineCodeEmitter &M, std::ostream &os) : o(os), MCE(M), counter(0) { openActual(); } - - ~FilePrinterEmitter() { + + ~FilePrinterEmitter() { o << "\n"; actual.close(); } @@ -101,7 +101,7 @@ namespace { void *finishFunctionStub(const Function *F) { return MCE.finishFunctionStub(F); } - + void emitByte(unsigned char B) { MCE.emitByte(B); actual << B; actual.flush(); diff --git a/lib/CodeGen/MachineFunction.cpp b/lib/CodeGen/MachineFunction.cpp index d49a1ddb4b1..a93ebc88ec1 100644 --- a/lib/CodeGen/MachineFunction.cpp +++ b/lib/CodeGen/MachineFunction.cpp @@ -256,7 +256,7 @@ void MachineFunction::clearSSARegMap() { /// CreateStackObject - Create a stack object for a value of the specified type. /// int MachineFrameInfo::CreateStackObject(const Type *Ty, const TargetData &TD) { - return CreateStackObject((unsigned)TD.getTypeSize(Ty), + return CreateStackObject((unsigned)TD.getTypeSize(Ty), TD.getTypeAlignment(Ty)); } diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp index 3dce6fc85de..0351cc2783e 100644 --- a/lib/CodeGen/MachineInstr.cpp +++ b/lib/CodeGen/MachineInstr.cpp @@ -1,10 +1,10 @@ //===-- MachineInstr.cpp --------------------------------------------------===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // Methods common to all machine instructions. @@ -28,7 +28,7 @@ using namespace llvm; // Global variable holding an array of descriptors for machine instructions. // The actual object needs to be created separately for each target machine. // This variable is initialized and reset by class TargetInstrInfo. -// +// // FIXME: This should be a property of the target so that more than one target // at a time can be active... // @@ -112,7 +112,7 @@ bool MachineInstr::OperandsComplete() const { /// replace - Support for replacing opcode and operands of a MachineInstr in /// place. This only resets the size of the operand vector and initializes it. /// The new operands must be set explicitly later. -/// +/// void MachineInstr::replace(short opcode, unsigned numOperands) { assert(getNumImplicitRefs() == 0 && "This is probably broken because implicit refs are going to be lost."); @@ -178,7 +178,7 @@ MachineInstr::substituteValue(const Value* oldVal, Value* newVal, { assert((!defsOnly || !notDefsAndUses) && "notDefsAndUses is irrelevant if defsOnly == true."); - + unsigned numSubst = 0; // Substitute operands @@ -236,7 +236,7 @@ static inline void OutputReg(std::ostream &os, unsigned RegNo, static void print(const MachineOperand &MO, std::ostream &OS, const TargetMachine *TM) { const MRegisterInfo *MRI = 0; - + if (TM) MRI = TM->getRegisterInfo(); bool CloseParen = true; @@ -250,7 +250,7 @@ static void print(const MachineOperand &MO, std::ostream &OS, OS << "%hm("; else CloseParen = false; - + switch (MO.getType()) { case MachineOperand::MO_VirtualRegister: if (MO.getVRegValue()) { @@ -333,21 +333,21 @@ void MachineInstr::print(std::ostream &OS, const TargetMachine *TM) const { // be attached to a Machine function yet if (TM) OS << TM->getInstrInfo()->getName(getOpcode()); - + for (unsigned i = StartOp, e = getNumOperands(); i != e; ++i) { const MachineOperand& mop = getOperand(i); if (i != StartOp) OS << ","; OS << " "; ::print(mop, OS, TM); - + if (mop.isDef()) if (mop.isUse()) OS << ""; else OS << ""; } - + // code for printing implicit references if (getNumImplicitRefs()) { OS << "\tImplicitRefs: "; @@ -361,7 +361,7 @@ void MachineInstr::print(std::ostream &OS, const TargetMachine *TM) const { OS << ""; } } - + OS << "\n"; } @@ -381,7 +381,7 @@ std::ostream &operator<<(std::ostream &os, const MachineInstr &MI) { // Otherwise, print it out in the "raw" format without symbolic register names // and such. os << TargetInstrDescriptors[MI.getOpcode()].Name; - + for (unsigned i = 0, N = MI.getNumOperands(); i < N; i++) { os << "\t" << MI.getOperand(i); if (MI.getOperand(i).isDef()) @@ -390,13 +390,13 @@ std::ostream &operator<<(std::ostream &os, const MachineInstr &MI) { else os << ""; } - + // code for printing implicit references unsigned NumOfImpRefs = MI.getNumImplicitRefs(); if (NumOfImpRefs > 0) { os << "\tImplicit: "; for (unsigned z = 0; z < NumOfImpRefs; z++) { - OutputValue(os, MI.getImplicitRef(z)); + OutputValue(os, MI.getImplicitRef(z)); if (MI.getImplicitOp(z).isDef()) if (MI.getImplicitOp(z).isUse()) os << ""; @@ -405,7 +405,7 @@ std::ostream &operator<<(std::ostream &os, const MachineInstr &MI) { os << "\t"; } } - + return os << "\n"; } @@ -418,7 +418,7 @@ std::ostream &operator<<(std::ostream &OS, const MachineOperand &MO) { OS << "%hh("; else if (MO.isLoBits64()) OS << "%hm("; - + switch (MO.getType()) { case MachineOperand::MO_VirtualRegister: if (MO.hasAllocatedReg()) @@ -479,10 +479,10 @@ std::ostream &operator<<(std::ostream &OS, const MachineOperand &MO) { assert(0 && "Unrecognized operand type"); break; } - + if (MO.isHiBits32() || MO.isLoBits32() || MO.isHiBits64() || MO.isLoBits64()) OS << ")"; - + return OS; } diff --git a/lib/CodeGen/PHIElimination.cpp b/lib/CodeGen/PHIElimination.cpp index 0010ccd7e66..6790b3f7b03 100644 --- a/lib/CodeGen/PHIElimination.cpp +++ b/lib/CodeGen/PHIElimination.cpp @@ -1,10 +1,10 @@ //===-- PhiElimination.cpp - Eliminate PHI nodes by inserting copies ------===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This pass eliminates machine instruction PHI nodes by inserting copy @@ -97,12 +97,12 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) { while (MBB.front().getOpcode() == TargetInstrInfo::PHI) { // Unlink the PHI node from the basic block, but don't delete the PHI yet. MachineInstr *MPhi = MBB.remove(MBB.begin()); - + assert(MRegisterInfo::isVirtualRegister(MPhi->getOperand(0).getReg()) && "PHI node doesn't write virt reg?"); unsigned DestReg = MPhi->getOperand(0).getReg(); - + // Create a new register for the incoming PHI arguments const TargetRegisterClass *RC = MF.getSSARegMap()->getRegClass(DestReg); unsigned IncomingReg = MF.getSSARegMap()->createVirtualRegister(RC); @@ -112,7 +112,7 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) { // into the phi node destination. // RegInfo->copyRegToReg(MBB, AfterPHIsIt, DestReg, IncomingReg, RC); - + // Update live variable information if there is any... if (LV) { MachineInstr *PHICopy = prior(AfterPHIsIt); @@ -128,7 +128,7 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) { // of any registers, or if the value itself is dead, we need to move this // information over to the new copy we just inserted. // - std::pair + std::pair RKs = LV->killed_range(MPhi); std::vector > Range; if (RKs.first != RKs.second) // Delete the range. @@ -154,13 +154,13 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) { // for (int i = MPhi->getNumOperands() - 1; i >= 2; i-=2) { MachineOperand &opVal = MPhi->getOperand(i-1); - + // Get the MachineBasicBlock equivalent of the BasicBlock that is the // source path the PHI. MachineBasicBlock &opBlock = *MPhi->getOperand(i).getMachineBasicBlock(); MachineBasicBlock::iterator I = opBlock.getFirstTerminator(); - + // Check to make sure we haven't already emitted the copy for this block. // This can happen because PHI nodes may have multiple entries for the // same basic block. It doesn't matter which entry we use though, because @@ -171,7 +171,7 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) { // register we are interested in! // bool HaveNotEmitted = true; - + if (I != opBlock.begin()) { MachineBasicBlock::iterator PrevInst = prior(I); for (unsigned i = 0, e = PrevInst->getNumOperands(); i != e; ++i) { @@ -180,7 +180,7 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) { if (MO.isDef()) { HaveNotEmitted = false; break; - } + } } } @@ -215,7 +215,7 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) { for (MachineBasicBlock::succ_iterator SI = opBlock.succ_begin(), E = opBlock.succ_end(); SI != E && !ValueIsLive; ++SI) { MachineBasicBlock *SuccMBB = *SI; - + // Is it alive in this successor? unsigned SuccIdx = SuccMBB->getNumber(); if (SuccIdx < InRegVI.AliveBlocks.size() && @@ -223,7 +223,7 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) { ValueIsLive = true; break; } - + // Is it killed in this successor? for (unsigned i = 0, e = InRegVI.Kills.size(); i != e; ++i) if (InRegVI.Kills[i]->getParent() == SuccMBB) { @@ -235,7 +235,7 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) { if (!ValueIsLive) ValueIsLive = VRegPHIUseCount[SrcReg] != 0; } - + // Okay, if we now know that the value is not live out of the block, // we can add a kill marker to the copy we inserted saying that it // kills the incoming value! @@ -252,7 +252,7 @@ bool PNE::EliminatePHINodes(MachineFunction &MF, MachineBasicBlock &MBB) { } } } - + // Really delete the PHI instruction now! delete MPhi; } diff --git a/lib/CodeGen/Passes.cpp b/lib/CodeGen/Passes.cpp index 4d2f111b2ed..525bd3a9ec6 100644 --- a/lib/CodeGen/Passes.cpp +++ b/lib/CodeGen/Passes.cpp @@ -1,10 +1,10 @@ //===-- Passes.cpp - Target independent code generation passes ------------===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file defines interfaces to access the target independent code diff --git a/lib/CodeGen/PrologEpilogInserter.cpp b/lib/CodeGen/PrologEpilogInserter.cpp index 109724f9378..f54be3b97f4 100644 --- a/lib/CodeGen/PrologEpilogInserter.cpp +++ b/lib/CodeGen/PrologEpilogInserter.cpp @@ -1,10 +1,10 @@ //===-- PrologEpilogInserter.cpp - Insert Prolog/Epilog code in function --===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This pass is responsible for finalizing the functions frame layout, saving @@ -190,7 +190,7 @@ void PEI::calculateCallerSavedRegisters(MachineFunction &Fn) { void PEI::saveCallerSavedRegisters(MachineFunction &Fn) { // Early exit if no caller saved registers are modified! if (RegsToSave.empty()) - return; + return; const MRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo(); @@ -226,10 +226,10 @@ void PEI::saveCallerSavedRegisters(MachineFunction &Fn) { /// void PEI::calculateFrameObjectOffsets(MachineFunction &Fn) { const TargetFrameInfo &TFI = *Fn.getTarget().getFrameInfo(); - + bool StackGrowsDown = TFI.getStackGrowthDirection() == TargetFrameInfo::StackGrowsDown; - + // Loop over all of the stack objects, assigning sequential addresses... MachineFrameInfo *FFI = Fn.getFrameInfo(); @@ -241,12 +241,12 @@ void PEI::calculateFrameObjectOffsets(MachineFunction &Fn) { int Offset = TFI.getOffsetOfLocalArea(); if (StackGrowsDown) Offset = -Offset; - assert(Offset >= 0 + assert(Offset >= 0 && "Local area offset should be in direction of stack growth"); // If there are fixed sized objects that are preallocated in the local area, // non-fixed objects can't be allocated right at the start of local area. - // We currently don't support filling in holes in between fixed sized objects, + // We currently don't support filling in holes in between fixed sized objects, // so we adjust 'Offset' to point to the end of last fixed sized // preallocated object. for (int i = FFI->getObjectIndexBegin(); i != 0; ++i) { @@ -257,11 +257,11 @@ void PEI::calculateFrameObjectOffsets(MachineFunction &Fn) { // the offset is negative, so we negate the offset to get the distance. FixedOff = -FFI->getObjectOffset(i); } else { - // The maximum distance from the start pointer is at the upper + // The maximum distance from the start pointer is at the upper // address of the object. FixedOff = FFI->getObjectOffset(i) + FFI->getObjectSize(i); - } - if (FixedOff > Offset) Offset = FixedOff; + } + if (FixedOff > Offset) Offset = FixedOff; } for (unsigned i = 0, e = FFI->getObjectIndexEnd(); i != e; ++i) { @@ -274,11 +274,11 @@ void PEI::calculateFrameObjectOffsets(MachineFunction &Fn) { assert(Align <= StackAlignment && "Cannot align stack object to higher " "alignment boundary than the stack itself!"); Offset = (Offset+Align-1)/Align*Align; // Adjust to Alignment boundary... - + if (StackGrowsDown) { FFI->setObjectOffset(i, -Offset); // Set the computed offset } else { - FFI->setObjectOffset(i, Offset); + FFI->setObjectOffset(i, Offset); Offset += FFI->getObjectSize(i); } } diff --git a/lib/CodeGen/RegAllocLinearScan.cpp b/lib/CodeGen/RegAllocLinearScan.cpp index cf7a264e4e0..61cc11e413d 100644 --- a/lib/CodeGen/RegAllocLinearScan.cpp +++ b/lib/CodeGen/RegAllocLinearScan.cpp @@ -208,7 +208,7 @@ void RA::linearScan() assert(MRegisterInfo::isVirtualRegister(cur->reg) && "Can only allocate virtual registers!"); - + // Allocating a virtual register. try to find a free // physical register or spill an interval (possibly this one) in order to // assign it one. @@ -266,7 +266,7 @@ void RA::processActiveIntervals(unsigned CurPoint) active_[i] = active_.back(); active_.pop_back(); --i; --e; - + } else if (IntervalPos->start > CurPoint) { // Move inactive intervals to inactive list. DEBUG(std::cerr << "\t\tinterval " << *Interval << " inactive\n"); @@ -300,7 +300,7 @@ void RA::processInactiveIntervals(unsigned CurPoint) unsigned reg = Interval->reg; IntervalPos = Interval->advanceTo(IntervalPos, CurPoint); - + if (IntervalPos == Interval->end()) { // remove expired intervals. DEBUG(std::cerr << "\t\tinterval " << *Interval << " expired\n"); @@ -331,7 +331,7 @@ void RA::processInactiveIntervals(unsigned CurPoint) /// updateSpillWeights - updates the spill weights of the specifed physical /// register and its weight. -static void updateSpillWeights(std::vector &Weights, +static void updateSpillWeights(std::vector &Weights, unsigned reg, float weight, const MRegisterInfo *MRI) { Weights[reg] += weight; diff --git a/lib/CodeGen/RegAllocLocal.cpp b/lib/CodeGen/RegAllocLocal.cpp index d3c3277cbbf..5aa04c6cc78 100644 --- a/lib/CodeGen/RegAllocLocal.cpp +++ b/lib/CodeGen/RegAllocLocal.cpp @@ -210,7 +210,7 @@ namespace { /// MachineInstr *reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI, unsigned OpNum); - + void reloadPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I, unsigned PhysReg); diff --git a/lib/CodeGen/RegAllocSimple.cpp b/lib/CodeGen/RegAllocSimple.cpp index 00f3180a137..0ddf7c2798a 100644 --- a/lib/CodeGen/RegAllocSimple.cpp +++ b/lib/CodeGen/RegAllocSimple.cpp @@ -1,10 +1,10 @@ //===-- RegAllocSimple.cpp - A simple generic register allocator ----------===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file implements a simple register allocator. *Very* simple: It immediate @@ -36,7 +36,7 @@ namespace { const TargetMachine *TM; const MRegisterInfo *RegInfo; bool *PhysRegsEverUsed; - + // StackSlotForVirtReg - Maps SSA Regs => frame index on the stack where // these values are spilled std::map StackSlotForVirtReg; @@ -102,7 +102,7 @@ int RegAllocSimple::getStackSpaceFor(unsigned VirtReg, // Allocate a new stack object for this spill location... int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC->getSize(), RC->getAlignment()); - + // Assign the slot... StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx)); @@ -115,10 +115,10 @@ unsigned RegAllocSimple::getFreeReg(unsigned virtualReg) { TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF); while (1) { - unsigned regIdx = RegClassIdx[RC]++; + unsigned regIdx = RegClassIdx[RC]++; assert(RI+regIdx != RE && "Not enough registers!"); unsigned PhysReg = *(RI+regIdx); - + if (!RegsUsed[PhysReg]) { PhysRegsEverUsed[PhysReg] = true; return PhysReg; @@ -158,7 +158,7 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) { std::map Virt2PhysRegMap; RegsUsed.resize(RegInfo->getNumRegs()); - + // This is a preliminary pass that will invalidate any registers that are // used by the instruction (including implicit uses). unsigned Opcode = MI->getOpcode(); @@ -166,23 +166,23 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) { const unsigned *Regs; for (Regs = Desc.ImplicitUses; *Regs; ++Regs) RegsUsed[*Regs] = true; - + for (Regs = Desc.ImplicitDefs; *Regs; ++Regs) { RegsUsed[*Regs] = true; PhysRegsEverUsed[*Regs] = true; } - + // Loop over uses, move from memory into registers. for (int i = MI->getNumOperands() - 1; i >= 0; --i) { MachineOperand &op = MI->getOperand(i); - + if (op.isRegister() && op.getReg() && MRegisterInfo::isVirtualRegister(op.getReg())) { unsigned virtualReg = (unsigned) op.getReg(); DEBUG(std::cerr << "op: " << op << "\n"); DEBUG(std::cerr << "\t inst[" << i << "]: "; MI->print(std::cerr, TM)); - + // make sure the same virtual register maps to the same physical // register in any given instruction unsigned physReg = Virt2PhysRegMap[virtualReg]; @@ -211,7 +211,7 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) { } } MI->SetMachineOperandReg(i, physReg); - DEBUG(std::cerr << "virt: " << virtualReg << + DEBUG(std::cerr << "virt: " << virtualReg << ", phys: " << op.getReg() << "\n"); } } diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index 3df62447576..12938e6e57b 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -1,10 +1,10 @@ //===-- LegalizeDAG.cpp - Implement SelectionDAG::Legalize ----------------===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file implements the SelectionDAG::Legalize method. @@ -285,7 +285,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { VT = MVT::f32; Extend = true; } - + SDOperand CPIdx = DAG.getConstantPool(CP->getConstantPoolIndex(LLVMC), TLI.getPointerTy()); if (Extend) { @@ -433,7 +433,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { Result = DAG.getLoad(Node->getValueType(0), Tmp1, Tmp2); else Result = SDOperand(Node, 0); - + // Since loads produce two values, make sure to remember that we legalized // both of them. AddLegalizedOperand(SDOperand(Node, 0), Result); @@ -458,7 +458,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { AddLegalizedOperand(SDOperand(Node, 0), Result); AddLegalizedOperand(SDOperand(Node, 1), Result.getValue(1)); return Result.getValue(Op.ResNo); - + case TargetLowering::Legal: if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) @@ -504,7 +504,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { case ISD::CopyToReg: Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. - + switch (getTypeAction(Node->getOperand(1).getValueType())) { case Legal: // Legalize the incoming value (must be legal). @@ -518,7 +518,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { break; case Expand: SDOperand Lo, Hi; - ExpandOp(Node->getOperand(1), Lo, Hi); + ExpandOp(Node->getOperand(1), Lo, Hi); unsigned Reg = cast(Node)->getReg(); Lo = DAG.getCopyToReg(Tmp1, Lo, Reg); Hi = DAG.getCopyToReg(Tmp1, Hi, Reg+1); @@ -544,7 +544,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { SDOperand Lo, Hi; ExpandOp(Node->getOperand(1), Lo, Hi); Result = DAG.getNode(ISD::RET, MVT::Other, Tmp1, Lo, Hi); - break; + break; } case Promote: Tmp2 = PromoteOp(Node->getOperand(1)); @@ -569,7 +569,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { ExpandOp(Node->getOperand(i), Lo, Hi); NewValues.push_back(Lo); NewValues.push_back(Hi); - break; + break; } case Promote: assert(0 && "Can't promote multiple return value yet!"); @@ -753,7 +753,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { Result = DAG.getSetCC(cast(Node)->getCondition(), Node->getValueType(0), Tmp1, Tmp2); break; - case Expand: + case Expand: SDOperand LHSLo, LHSHi, RHSLo, RHSHi; ExpandOp(Node->getOperand(0), LHSLo, LHSHi); ExpandOp(Node->getOperand(1), RHSLo, RHSHi); @@ -765,15 +765,15 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { if (RHSCST->isAllOnesValue()) { // Comparison to -1. Tmp1 = DAG.getNode(ISD::AND, LHSLo.getValueType(), LHSLo, LHSHi); - Result = DAG.getSetCC(cast(Node)->getCondition(), + Result = DAG.getSetCC(cast(Node)->getCondition(), Node->getValueType(0), Tmp1, RHSLo); - break; + break; } Tmp1 = DAG.getNode(ISD::XOR, LHSLo.getValueType(), LHSLo, RHSLo); Tmp2 = DAG.getNode(ISD::XOR, LHSLo.getValueType(), LHSHi, RHSHi); Tmp1 = DAG.getNode(ISD::OR, Tmp1.getValueType(), Tmp1, Tmp2); - Result = DAG.getSetCC(cast(Node)->getCondition(), + Result = DAG.getSetCC(cast(Node)->getCondition(), Node->getValueType(0), Tmp1, DAG.getConstant(0, Tmp1.getValueType())); break; @@ -781,7 +781,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { // If this is a comparison of the sign bit, just look at the top part. // X > -1, x < 0 if (ConstantSDNode *CST = dyn_cast(Node->getOperand(1))) - if ((cast(Node)->getCondition() == ISD::SETLT && + if ((cast(Node)->getCondition() == ISD::SETLT && CST->getValue() == 0) || // X < 0 (cast(Node)->getCondition() == ISD::SETGT && (CST->isAllOnesValue()))) // X > -1 @@ -801,7 +801,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { case ISD::SETGE: case ISD::SETUGE: LowCC = ISD::SETUGE; break; } - + // Tmp1 = lo(op1) < lo(op2) // Always unsigned comparison // Tmp2 = hi(op1) < hi(op2) // Signedness depends on operands // dest = hi(op1) == hi(op2) ? Tmp1 : Tmp2; @@ -836,7 +836,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { break; } } else { - Tmp3 = LegalizeOp(Node->getOperand(2)); // memcpy/move = pointer, + Tmp3 = LegalizeOp(Node->getOperand(2)); // memcpy/move = pointer, } SDOperand Tmp4; @@ -956,7 +956,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { Tmp2 != Node->getOperand(1)) Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1,Tmp2); break; - + case ISD::UREM: case ISD::SREM: Tmp1 = LegalizeOp(Node->getOperand(0)); // LHS @@ -965,7 +965,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { case TargetLowering::Legal: if (Tmp1 != Node->getOperand(0) || Tmp2 != Node->getOperand(1)) - Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1, + Result = DAG.getNode(Node->getOpcode(), Node->getValueType(0), Tmp1, Tmp2); break; case TargetLowering::Promote: @@ -1042,7 +1042,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { // In the expand case, we must be dealing with a truncate, because // otherwise the result would be larger than the source. ExpandOp(Node->getOperand(0), Tmp1, Tmp2); - + // Since the result is legal, we should just be able to truncate the low // part of the source. Result = DAG.getNode(ISD::TRUNCATE, Node->getValueType(0), Tmp1); @@ -1134,7 +1134,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { unsigned TySize = (unsigned)TLI.getTargetData().getTypeSize(Ty); unsigned Align = TLI.getTargetData().getTypeAlignment(Ty); MachineFunction &MF = DAG.getMachineFunction(); - int SSFI = + int SSFI = MF.getFrameInfo()->CreateStackObject((unsigned)TySize, Align); SDOperand StackSlot = DAG.getFrameIndex(SSFI, TLI.getPointerTy()); Result = DAG.getNode(ISD::TRUNCSTORE, MVT::Other, DAG.getEntryNode(), @@ -1231,7 +1231,7 @@ SDOperand SelectionDAGLegalize::PromoteOp(SDOperand Op) { case Expand: ExpandOp(Node->getOperand(0), Tmp1, Tmp2); // Truncate the low part of the expanded value to the result type - Result = DAG.getNode(ISD::TRUNCATE, VT, Tmp1); + Result = DAG.getNode(ISD::TRUNCATE, VT, Tmp1); } break; case ISD::SIGN_EXTEND: @@ -1445,7 +1445,7 @@ SDOperand SelectionDAGLegalize::PromoteOp(SDOperand Op) { // Insert the new chain mapping. AddLegalizedOperand(Op.getValue(1), Result.getValue(1)); break; - } + } } assert(Result.Val && "Didn't set a result!"); @@ -1568,16 +1568,16 @@ bool SelectionDAGLegalize::ExpandShift(unsigned Opc, SDOperand Op,SDOperand Amt, return true; case ISD::SRA: if (Cst > VTBits) { - Hi = Lo = DAG.getNode(ISD::SRA, NVT, InH, + Hi = Lo = DAG.getNode(ISD::SRA, NVT, InH, DAG.getConstant(NVTBits-1, ShTy)); } else if (Cst > NVTBits) { - Lo = DAG.getNode(ISD::SRA, NVT, InH, + Lo = DAG.getNode(ISD::SRA, NVT, InH, DAG.getConstant(Cst-NVTBits, ShTy)); - Hi = DAG.getNode(ISD::SRA, NVT, InH, + Hi = DAG.getNode(ISD::SRA, NVT, InH, DAG.getConstant(NVTBits-1, ShTy)); } else if (Cst == NVTBits) { Lo = InH; - Hi = DAG.getNode(ISD::SRA, NVT, InH, + Hi = DAG.getNode(ISD::SRA, NVT, InH, DAG.getConstant(NVTBits-1, ShTy)); } else { Lo = DAG.getNode(ISD::OR, NVT, @@ -1620,7 +1620,7 @@ bool SelectionDAGLegalize::ExpandShift(unsigned Opc, SDOperand Op,SDOperand Amt, DAG.getNode(ISD::SHL, NVT, InH, ShAmt), DAG.getNode(ISD::SRL, NVT, InL, NAmt)); SDOperand T2 = DAG.getNode(ISD::SHL, NVT, InL, ShAmt); // T2 = Lo << Amt&31 - + Hi = DAG.getNode(ISD::SELECT, NVT, Cond, T2, T1); Lo = DAG.getNode(ISD::SELECT, NVT, Cond, DAG.getConstant(0, NVT), T2); } else { @@ -1705,14 +1705,14 @@ static SDNode *FindAdjCallStackUp(SDNode *Node) { if (Node->hasOneUse()) // Simple case, only has one user to check. return FindAdjCallStackUp(*Node->use_begin()); - + SDOperand TheChain(Node, Node->getNumValues()-1); assert(TheChain.getValueType() == MVT::Other && "Is not a token chain!"); - - for (SDNode::use_iterator UI = Node->use_begin(), + + for (SDNode::use_iterator UI = Node->use_begin(), E = Node->use_end(); ; ++UI) { assert(UI != E && "Didn't find a user of the tokchain, no ADJCALLSTACKUP!"); - + // Make sure to only follow users of our token chain. SDNode *User = *UI; for (unsigned i = 0, e = User->getNumOperands(); i != e; ++i) @@ -1732,7 +1732,7 @@ static SDOperand FindInputOutputChains(SDNode *OpNode, SDNode *&OutChain, SDNode *LatestAdjCallStackUp = 0; FindLatestAdjCallStackDown(OpNode, LatestAdjCallStackDown); //std::cerr << "Found node: "; LatestAdjCallStackDown->dump(); std::cerr <<"\n"; - + // It is possible that no ISD::ADJCALLSTACKDOWN was found because there is no // previous call in the function. LatestCallStackDown may in that case be // the entry node itself. Do not attempt to find a matching ADJCALLSTACKUP @@ -1742,12 +1742,12 @@ static SDOperand FindInputOutputChains(SDNode *OpNode, SDNode *&OutChain, else LatestAdjCallStackUp = Entry.Val; assert(LatestAdjCallStackUp && "NULL return from FindAdjCallStackUp"); - + SDNode *EarliestAdjCallStackUp = 0; FindEarliestAdjCallStackUp(OpNode, EarliestAdjCallStackUp); if (EarliestAdjCallStackUp) { - //std::cerr << "Found node: "; + //std::cerr << "Found node: "; //EarliestAdjCallStackUp->dump(); std::cerr <<"\n"; } @@ -1775,7 +1775,7 @@ SDOperand SelectionDAGLegalize::ExpandLibCall(const char *Name, SDNode *Node, Args.push_back(std::make_pair(Node->getOperand(i), ArgTy)); } SDOperand Callee = DAG.getExternalSymbol(Name, TLI.getPointerTy()); - + // We don't care about token chains for libcalls. We just use the entry // node as our input and ignore the output chain. This allows us to place // calls wherever we need them to satisfy data dependences. @@ -1866,7 +1866,7 @@ ExpandIntToFP(bool isSigned, MVT::ValueType DestTy, SDOperand Source) { const Type *RetTy = MVT::getTypeForValueType(DestTy); return TLI.LowerCallTo(InChain, RetTy, false, Callee, Args, DAG).first; } - + /// ExpandOp - Expand the specified SDOperand into its two component pieces @@ -1922,7 +1922,7 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){ // Aggregate register values are always in consequtive pairs. Lo = DAG.getCopyFromReg(Reg, NVT, Node->getOperand(0)); Hi = DAG.getCopyFromReg(Reg+1, NVT, Lo.getValue(1)); - + // Remember that we legalized the chain. AddLegalizedOperand(Op.getValue(1), Hi.getValue(1)); @@ -1953,7 +1953,7 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){ // other one. SDOperand TF = DAG.getNode(ISD::TokenFactor, MVT::Other, Lo.getValue(1), Hi.getValue(1)); - + // Remember that we legalized the chain. AddLegalizedOperand(Op.getValue(1), TF); if (!TLI.isLittleEndian()) @@ -2031,7 +2031,7 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){ // The low part is just a sign extension of the input (which degenerates to // a copy). Lo = DAG.getNode(ISD::SIGN_EXTEND, NVT, In); - + // The high part is obtained by SRA'ing all but one of the bits of the lo // part. unsigned LoSize = MVT::getSizeInBits(Lo.getValueType()); @@ -2054,7 +2054,7 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){ // The low part is just a zero extension of the input (which degenerates to // a copy). Lo = DAG.getNode(ISD::ZERO_EXTEND, NVT, In); - + // The high part is just a zero. Hi = DAG.getConstant(0, NVT); break; @@ -2121,7 +2121,7 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){ Lo = ExpandLibCall("__lshrdi3", Node, Hi); break; - case ISD::ADD: + case ISD::ADD: ExpandByParts(ISD::ADD_PARTS, Node->getOperand(0), Node->getOperand(1), Lo, Hi); break; diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 0bfd578f79b..5b0c710635c 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -1,10 +1,10 @@ //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This implements the SelectionDAG class. @@ -60,7 +60,7 @@ static bool isInvertibleForFree(SDOperand N) { if (isa(N.Val)) return true; if (isa(N.Val) && N.Val->hasOneUse()) return true; - return false; + return false; } @@ -118,9 +118,9 @@ ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2, if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) // Cannot fold a signed integer setcc with an unsigned integer setcc. return ISD::SETCC_INVALID; - + unsigned Op = Op1 | Op2; // Combine all of the condition bits. - + // If the N and U bits get set then the resultant comparison DOES suddenly // care about orderedness, and is true when ordered. if (Op > ISD::SETTRUE2) @@ -136,7 +136,7 @@ ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2, bool isInteger) { if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3) // Cannot fold a signed setcc with an unsigned setcc. - return ISD::SETCC_INVALID; + return ISD::SETCC_INVALID; // Combine all of the condition bits. return ISD::CondCode(Op1 & Op2); @@ -269,7 +269,7 @@ void SelectionDAG::DeleteNodeIfDead(SDNode *N, void *NodeSet) { // Now that we removed this operand, see if there are no uses of it left. DeleteNodeIfDead(O, NodeSet); } - + // Remove the node from the nodes set and delete it. std::set &AllNodeSet = *(std::set*)NodeSet; AllNodeSet.erase(N); @@ -297,7 +297,7 @@ SDOperand SelectionDAG::getConstant(uint64_t Val, MVT::ValueType VT) { // Mask out any bits that are not valid for this constant. if (VT != MVT::i64) Val &= ((uint64_t)1 << MVT::getSizeInBits(VT)) - 1; - + SDNode *&N = Constants[std::make_pair(Val, VT)]; if (N) return SDOperand(N, 0); N = new ConstantSDNode(Val, VT); @@ -317,7 +317,7 @@ SDOperand SelectionDAG::getConstantFP(double Val, MVT::ValueType VT) { double DV; uint64_t IV; }; - + DV = Val; SDNode *&N = ConstantFPs[std::make_pair(IV, VT)]; @@ -385,7 +385,7 @@ SDOperand SelectionDAG::getSetCC(ISD::CondCode Cond, MVT::ValueType VT, uint64_t C2 = N2C->getValue(); if (ConstantSDNode *N1C = dyn_cast(N1.Val)) { uint64_t C1 = N1C->getValue(); - + // Sign extend the operands if required if (ISD::isSignedIntSetCC(Cond)) { C1 = N1C->getSignExtended(); @@ -480,14 +480,14 @@ SDOperand SelectionDAG::getSetCC(ISD::CondCode Cond, MVT::ValueType VT, N2 = getConstant(C2, N2.getValueType()); N2C = cast(N2.Val); } - + if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal) return getConstant(0, VT); // X < MIN --> false - + // Canonicalize setgt X, Min --> setne X, Min if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C2 == MinVal) return getSetCC(ISD::SETNE, VT, N1, N2); - + // If we have setult X, 1, turn it into seteq X, 0 if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C2 == MinVal+1) return getSetCC(ISD::SETEQ, VT, N1, @@ -538,7 +538,7 @@ SDOperand SelectionDAG::getSetCC(ISD::CondCode Cond, MVT::ValueType VT, if (ConstantFPSDNode *N1C = dyn_cast(N1.Val)) if (ConstantFPSDNode *N2C = dyn_cast(N2.Val)) { double C1 = N1C->getValue(), C2 = N2C->getValue(); - + switch (Cond) { default: break; // FIXME: Implement the rest of these! case ISD::SETEQ: return getConstant(C1 == C2, VT); @@ -588,7 +588,7 @@ SDOperand SelectionDAG::getSetCC(ISD::CondCode Cond, MVT::ValueType VT, } // FIXME: move this stuff to the DAG Combiner when it exists! - + // Simplify (X+Z) == X --> Z == 0 if (N1.getOperand(0) == N2) return getSetCC(Cond, VT, N1.getOperand(1), @@ -601,7 +601,7 @@ SDOperand SelectionDAG::getSetCC(ISD::CondCode Cond, MVT::ValueType VT, assert(N1.getOpcode() == ISD::SUB && "Unexpected operation!"); // (Z-X) == X --> Z == X<<1 return getSetCC(Cond, VT, N1.getOperand(0), - getNode(ISD::SHL, N2.getValueType(), + getNode(ISD::SHL, N2.getValueType(), N2, getConstant(1, TLI.getShiftAmountTy()))); } } @@ -760,7 +760,7 @@ static bool MaskedValueIsZero(const SDOperand &Op, uint64_t Mask, const TargetLowering &TLI) { unsigned SrcBits; if (Mask == 0) return true; - + // If we know the result of a setcc has the top bits zero, use this info. switch (Op.getOpcode()) { case ISD::UNDEF: @@ -769,7 +769,7 @@ static bool MaskedValueIsZero(const SDOperand &Op, uint64_t Mask, return (cast(Op)->getValue() & Mask) == 0; case ISD::SETCC: - return ((Mask & 1) == 0) && + return ((Mask & 1) == 0) && TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult; case ISD::ZEXTLOAD: @@ -1066,7 +1066,7 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, Op2 == LHS->getCondition() && MVT::isInteger(LL.getValueType())) { if ((Op2 == ISD::SETEQ && Opcode == ISD::AND) || (Op2 == ISD::SETNE && Opcode == ISD::OR)) - return getSetCC(Op2, VT, + return getSetCC(Op2, VT, getNode(ISD::OR, LR.getValueType(), LL, RL), LR); } @@ -1075,7 +1075,7 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, Op2 = ISD::getSetCCSwappedOperands(Op2); goto MatchedBackwards; } - + if (LL == RL && LR == RR) { MatchedBackwards: ISD::CondCode Result; @@ -1179,7 +1179,7 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, if (N1C) if (N1C->getValue()) return N2; // select true, X, Y -> X - else + else return N3; // select false, X, Y -> Y if (N2 == N3) return N2; // select C, X, X -> X @@ -1275,7 +1275,7 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT, SDNode *N = new SDNode(Opcode, N1, N2, N3); switch (Opcode) { - default: + default: N->setValueTypes(VT); break; case ISD::DYNAMIC_STACKALLOC: // DYNAMIC_STACKALLOC produces pointer and chain @@ -1371,7 +1371,7 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,SDOperand N1, // If we are extending the result of a setcc, and we already know the // contents of the top bits, eliminate the extension. if (N1.getOpcode() == ISD::SETCC && - TLI.getSetCCResultContents() == + TLI.getSetCCResultContents() == TargetLowering::ZeroOrNegativeOneSetCCResult) return N1; @@ -1412,7 +1412,7 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,SDOperand N1, if (VT == EVT) return getNode(ISD::LOAD, VT, N1, N2); assert(EVT < VT && "Should only be an extending load, not truncating!"); - assert((Opcode == ISD::EXTLOAD || MVT::isInteger(VT)) && + assert((Opcode == ISD::EXTLOAD || MVT::isInteger(VT)) && "Cannot sign/zero extend a FP load!"); assert(MVT::isInteger(VT) == MVT::isInteger(EVT) && "Cannot convert from FP to Int or Int -> FP!"); @@ -1444,7 +1444,7 @@ SDOperand SelectionDAG::getNode(unsigned Opcode, MVT::ValueType VT,SDOperand N1, if (isa(N1)) { SDOperand Op = getNode(ISD::TRUNCATE, EVT, N1); if (isa(Op)) - N1 = Op; + N1 = Op; } // Also for ConstantFP? #endif @@ -1599,8 +1599,8 @@ const char *SDNode::getOperationName() const { case ISD::SETOLT: return "setcc:setolt"; case ISD::SETOLE: return "setcc:setole"; case ISD::SETONE: return "setcc:setone"; - - case ISD::SETO: return "setcc:seto"; + + case ISD::SETO: return "setcc:seto"; case ISD::SETUO: return "setcc:setuo"; case ISD::SETUEQ: return "setcc:setue"; case ISD::SETUGT: return "setcc:setugt"; @@ -1608,7 +1608,7 @@ const char *SDNode::getOperationName() const { case ISD::SETULT: return "setcc:setult"; case ISD::SETULE: return "setcc:setule"; case ISD::SETUNE: return "setcc:setune"; - + case ISD::SETEQ: return "setcc:seteq"; case ISD::SETGT: return "setcc:setgt"; case ISD::SETGE: return "setcc:setge"; @@ -1643,7 +1643,7 @@ void SDNode::dump() const { std::cerr << "<" << CSDN->getValue() << ">"; } else if (const ConstantFPSDNode *CSDN = dyn_cast(this)) { std::cerr << "<" << CSDN->getValue() << ">"; - } else if (const GlobalAddressSDNode *GADN = + } else if (const GlobalAddressSDNode *GADN = dyn_cast(this)) { std::cerr << "<"; WriteAsOperand(std::cerr, GADN->getGlobal()) << ">"; @@ -1652,7 +1652,7 @@ void SDNode::dump() const { std::cerr << "<" << FIDN->getIndex() << ">"; } else if (const ConstantPoolSDNode *CP = dyn_cast(this)){ std::cerr << "<" << CP->getIndex() << ">"; - } else if (const BasicBlockSDNode *BBDN = + } else if (const BasicBlockSDNode *BBDN = dyn_cast(this)) { std::cerr << "<"; const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); @@ -1676,7 +1676,7 @@ static void DumpNodes(SDNode *N, unsigned indent) { else std::cerr << "\n" << std::string(indent+2, ' ') << (void*)N->getOperand(i).Val << ": "; - + std::cerr << "\n" << std::string(indent, ' '); N->dump(); diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index f041905bb32..62376e54709 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -1,10 +1,10 @@ //===-- SelectionDAGISel.cpp - Implement the SelectionDAGISel class -------===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This implements the SelectionDAGISel class. @@ -79,7 +79,7 @@ namespace llvm { unsigned MakeReg(MVT::ValueType VT) { return RegMap->createVirtualRegister(TLI.getRegClassFor(VT)); } - + unsigned CreateRegForValue(const Value *V) { MVT::ValueType VT = TLI.getValueType(V->getType()); // The common case is that we will only create one register for this @@ -89,19 +89,19 @@ namespace llvm { // If we are promoting this value, pick the next largest supported type. return MakeReg(TLI.getTypeToTransformTo(VT)); } - + // If this value is represented with multiple target registers, make sure // to create enough consequtive registers of the right (smaller) type. unsigned NT = VT-1; // Find the type to use. while (TLI.getNumElements((MVT::ValueType)NT) != 1) --NT; - + unsigned R = MakeReg((MVT::ValueType)NT); for (unsigned i = 1; i != NV; ++i) MakeReg((MVT::ValueType)NT); return R; } - + unsigned InitializeRegForValue(const Value *V) { unsigned &R = ValueMap[V]; assert(R == 0 && "Already initialized this value register!"); @@ -122,7 +122,7 @@ static bool isUsedOutsideOfDefiningBlock(Instruction *I) { } FunctionLoweringInfo::FunctionLoweringInfo(TargetLowering &tli, - Function &fn, MachineFunction &mf) + Function &fn, MachineFunction &mf) : TLI(tli), Fn(fn), MF(mf), RegMap(MF.getSSARegMap()) { // Initialize the mapping of values to registers. This is only set up for @@ -206,7 +206,7 @@ public: FunctionLoweringInfo &FuncInfo; SelectionDAGLowering(SelectionDAG &dag, TargetLowering &tli, - FunctionLoweringInfo &funcinfo) + FunctionLoweringInfo &funcinfo) : TLI(tli), DAG(dag), TD(DAG.getTarget().getTargetData()), FuncInfo(funcinfo) { } @@ -216,7 +216,7 @@ public: SDOperand getRoot() { if (PendingLoads.empty()) return DAG.getRoot(); - + if (PendingLoads.size() == 1) { SDOperand Root = PendingLoads[0]; DAG.setRoot(Root); @@ -558,7 +558,7 @@ void SelectionDAGLowering::visitGetElementPtr(User &I) { IdxN = DAG.getNode(ISD::TRUNCATE, Scale.getValueType(), IdxN); IdxN = DAG.getNode(ISD::MUL, N.getValueType(), IdxN, Scale); - + N = DAG.getNode(ISD::ADD, N.getValueType(), N, IdxN); } } @@ -615,7 +615,7 @@ void SelectionDAGLowering::visitAlloca(AllocaInst &I) { void SelectionDAGLowering::visitLoad(LoadInst &I) { SDOperand Ptr = getValue(I.getOperand(0)); - + SDOperand Root; if (I.isVolatile()) Root = getRoot(); @@ -672,7 +672,7 @@ void SelectionDAGLowering::visitCall(CallInst &I) { case Intrinsic::memcpy: visitMemIntrinsic(I, ISD::MEMCPY); return; case Intrinsic::memset: visitMemIntrinsic(I, ISD::MEMSET); return; case Intrinsic::memmove: visitMemIntrinsic(I, ISD::MEMMOVE); return; - + case Intrinsic::isunordered: setValue(&I, DAG.getSetCC(ISD::SETUO, MVT::i1,getValue(I.getOperand(1)), getValue(I.getOperand(2)))); @@ -683,23 +683,23 @@ void SelectionDAGLowering::visitCall(CallInst &I) { return; } } - + SDOperand Callee; if (!RenameFn) Callee = getValue(I.getOperand(0)); else Callee = DAG.getExternalSymbol(RenameFn, TLI.getPointerTy()); std::vector > Args; - + for (unsigned i = 1, e = I.getNumOperands(); i != e; ++i) { Value *Arg = I.getOperand(i); SDOperand ArgNode = getValue(Arg); Args.push_back(std::make_pair(ArgNode, Arg->getType())); } - + const PointerType *PT = cast(I.getCalledValue()->getType()); const FunctionType *FTy = cast(PT->getElementType()); - + std::pair Result = TLI.LowerCallTo(getRoot(), I.getType(), FTy->isVarArg(), Callee, Args, DAG); if (I.getType() != Type::VoidTy) @@ -726,7 +726,7 @@ void SelectionDAGLowering::visitMalloc(MallocInst &I) { Args.push_back(std::make_pair(Src, TLI.getTargetData().getIntPtrType())); std::pair Result = - TLI.LowerCallTo(getRoot(), I.getType(), false, + TLI.LowerCallTo(getRoot(), I.getType(), false, DAG.getExternalSymbol("malloc", IntPtr), Args, DAG); setValue(&I, Result.first); // Pointers always fit in registers @@ -784,7 +784,7 @@ void SelectionDAGLowering::visitVAStart(CallInst &I) { void SelectionDAGLowering::visitVAArg(VAArgInst &I) { std::pair Result = - TLI.LowerVAArgNext(false, getRoot(), getValue(I.getOperand(0)), + TLI.LowerVAArgNext(false, getRoot(), getValue(I.getOperand(0)), I.getType(), DAG); setValue(&I, Result.first); DAG.setRoot(Result.second); @@ -792,7 +792,7 @@ void SelectionDAGLowering::visitVAArg(VAArgInst &I) { void SelectionDAGLowering::visitVANext(VANextInst &I) { std::pair Result = - TLI.LowerVAArgNext(true, getRoot(), getValue(I.getOperand(0)), + TLI.LowerVAArgNext(true, getRoot(), getValue(I.getOperand(0)), I.getArgType(), DAG); setValue(&I, Result.first); DAG.setRoot(Result.second); @@ -861,7 +861,7 @@ bool SelectionDAGISel::runOnFunction(Function &Fn) { for (Function::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) SelectBasicBlock(I, MF, FuncInfo); - + return true; } @@ -915,7 +915,7 @@ LowerArguments(BasicBlock *BB, SelectionDAGLowering &SDL, AI != E; ++AI,++a) if (!AI->use_empty()) { SDL.setValue(AI, Args[a]); - SDOperand Copy = + SDOperand Copy = CopyValueToVirtualRegister(SDL, AI, FuncInfo.ValueMap[AI]); UnorderedChains.push_back(Copy); } @@ -931,7 +931,7 @@ LowerArguments(BasicBlock *BB, SelectionDAGLowering &SDL, std::make_pair(AI, a))); } else { SDL.setValue(AI, Args[a]); - SDOperand Copy = + SDOperand Copy = CopyValueToVirtualRegister(SDL, AI, FuncInfo.ValueMap[AI]); UnorderedChains.push_back(Copy); } @@ -948,12 +948,12 @@ LowerArguments(BasicBlock *BB, SelectionDAGLowering &SDL, if (BLAI != FuncInfo.BlockLocalArguments.end() && BLAI->first == BB) { // Lower the arguments into this block. std::vector Args = TLI.LowerArguments(F, SDL.DAG); - + // Set up the value mapping for the local arguments. for (; BLAI != FuncInfo.BlockLocalArguments.end() && BLAI->first == BB; ++BLAI) SDL.setValue(BLAI->second.first, Args[BLAI->second.second]); - + // Any dead arguments will just be ignored here. } } @@ -966,7 +966,7 @@ void SelectionDAGISel::BuildSelectionDAG(SelectionDAG &DAG, BasicBlock *LLVMBB, SelectionDAGLowering SDL(DAG, TLI, FuncInfo); std::vector UnorderedChains; - + // Lower any arguments needed in this block. LowerArguments(LLVMBB, SDL, UnorderedChains); @@ -994,7 +994,7 @@ void SelectionDAGISel::BuildSelectionDAG(SelectionDAG &DAG, BasicBlock *LLVMBB, // directly add them, because expansion might result in multiple MBB's for one // BB. As such, the start of the BB might correspond to a different MBB than // the end. - // + // // Emit constants only once even if used by multiple PHI nodes. std::map ConstantsOut; @@ -1026,7 +1026,7 @@ void SelectionDAGISel::BuildSelectionDAG(SelectionDAG &DAG, BasicBlock *LLVMBB, } else { Reg = FuncInfo.ValueMap[PHIOp]; if (Reg == 0) { - assert(isa(PHIOp) && + assert(isa(PHIOp) && FuncInfo.StaticAllocaMap.count(cast(PHIOp)) && "Didn't codegen value into a register!??"); Reg = FuncInfo.CreateRegForValue(PHIOp); @@ -1034,7 +1034,7 @@ void SelectionDAGISel::BuildSelectionDAG(SelectionDAG &DAG, BasicBlock *LLVMBB, CopyValueToVirtualRegister(SDL, PHIOp, Reg)); } } - + // Remember that this register needs to added to the machine PHI node as // the input for this MBB. unsigned NumElements = diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp index b2e0cb761f7..e3304f44bee 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp @@ -1,10 +1,10 @@ //===-- SelectionDAGPrinter.cpp - Implement SelectionDAG::viewGraph() -----===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This implements the SelectionDAG::viewGraph method. @@ -70,7 +70,7 @@ std::string DOTGraphTraits::getNodeLabel(const SDNode *Node, Op += ": " + utostr(CSDN->getValue()); } else if (const ConstantFPSDNode *CSDN = dyn_cast(Node)) { Op += ": " + ftostr(CSDN->getValue()); - } else if (const GlobalAddressSDNode *GADN = + } else if (const GlobalAddressSDNode *GADN = dyn_cast(Node)) { Op += ": " + GADN->getGlobal()->getName(); } else if (const FrameIndexSDNode *FIDN = @@ -78,7 +78,7 @@ std::string DOTGraphTraits::getNodeLabel(const SDNode *Node, Op += " " + itostr(FIDN->getIndex()); } else if (const ConstantPoolSDNode *CP = dyn_cast(Node)){ Op += "<" + utostr(CP->getIndex()) + ">"; - } else if (const BasicBlockSDNode *BBDN = + } else if (const BasicBlockSDNode *BBDN = dyn_cast(Node)) { Op = "BB: "; const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock(); @@ -95,7 +95,7 @@ std::string DOTGraphTraits::getNodeLabel(const SDNode *Node, } return Op; } - + /// viewGraph - Pop up a ghostview window with the reachable parts of the DAG /// rendered using 'dot'. diff --git a/lib/CodeGen/TwoAddressInstructionPass.cpp b/lib/CodeGen/TwoAddressInstructionPass.cpp index df632100de6..2e6d8260e3f 100644 --- a/lib/CodeGen/TwoAddressInstructionPass.cpp +++ b/lib/CodeGen/TwoAddressInstructionPass.cpp @@ -57,7 +57,7 @@ namespace { bool runOnMachineFunction(MachineFunction&); }; - RegisterPass + RegisterPass X("twoaddressinstruction", "Two-Address instruction pass"); }; @@ -152,7 +152,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) { mbbi->insert(mi, NewMI); // Insert the new inst mbbi->erase(mi); // Nuke the old inst. mi = NewMI; - } + } ++NumCommuted; regB = regC; @@ -161,7 +161,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) { } } // If this instruction is potentially convertible to a true - // three-address instruction, + // three-address instruction, if (TID.Flags & M_CONVERTIBLE_TO_3_ADDR) if (MachineInstr *New = TII.convertToThreeAddress(mi)) { DEBUG(std::cerr << "2addr: CONVERTING 2-ADDR: " << *mi); @@ -197,7 +197,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) { // replace all occurences of regB with regA for (unsigned i = 1, e = mi->getNumOperands(); i != e; ++i) { - if (mi->getOperand(i).isRegister() && + if (mi->getOperand(i).isRegister() && mi->getOperand(i).getReg() == regB) mi->SetMachineOperandReg(i, regA); } diff --git a/lib/CodeGen/UnreachableBlockElim.cpp b/lib/CodeGen/UnreachableBlockElim.cpp index 5feab0f8177..1d4e5304f3b 100644 --- a/lib/CodeGen/UnreachableBlockElim.cpp +++ b/lib/CodeGen/UnreachableBlockElim.cpp @@ -1,12 +1,12 @@ //===-- UnreachableBlockElim.cpp - Remove unreachable blocks for codegen --===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// -// +// // This pass is an extremely simple version of the SimplifyCFG pass. Its sole // job is to delete LLVM basic blocks that are not reachable from the entry // node. To do this, it performs a simple depth first traversal of the CFG, diff --git a/lib/CodeGen/VirtRegMap.cpp b/lib/CodeGen/VirtRegMap.cpp index b9925e2b20d..ff23d54c276 100644 --- a/lib/CodeGen/VirtRegMap.cpp +++ b/lib/CodeGen/VirtRegMap.cpp @@ -82,7 +82,7 @@ void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *OldMI, unsigned OpNo, MachineInstr *NewMI) { // Move previous memory references folded to new instruction. MI2VirtMapTy::iterator IP = MI2VirtMap.lower_bound(NewMI); - for (MI2VirtMapTy::iterator I = MI2VirtMap.lower_bound(OldMI), + for (MI2VirtMapTy::iterator I = MI2VirtMap.lower_bound(OldMI), E = MI2VirtMap.end(); I != E && I->first == OldMI; ) { MI2VirtMap.insert(IP, std::make_pair(NewMI, I->second)); MI2VirtMap.erase(I++); @@ -108,7 +108,7 @@ void VirtRegMap::print(std::ostream &OS) const { e = MF.getSSARegMap()->getLastVirtReg(); i <= e; ++i) { if (Virt2PhysMap[i] != (unsigned)VirtRegMap::NO_PHYS_REG) OS << "[reg" << i << " -> " << MRI->getName(Virt2PhysMap[i]) << "]\n"; - + } for (unsigned i = MRegisterInfo::FirstVirtualRegister, @@ -163,7 +163,7 @@ bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF, unsigned PhysReg = VRM.getPhys(VirtReg); if (VRM.hasStackSlot(VirtReg)) { int StackSlot = VRM.getStackSlot(VirtReg); - + if (MO.isUse() && std::find(LoadedRegs.begin(), LoadedRegs.end(), VirtReg) == LoadedRegs.end()) { @@ -172,7 +172,7 @@ bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF, ++NumLoads; DEBUG(std::cerr << '\t' << *prior(MII)); } - + if (MO.isDef()) { MRI.storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot); ++NumStores; @@ -255,16 +255,16 @@ namespace { struct ReusedOp { // The MachineInstr operand that reused an available value. unsigned Operand; - + // StackSlot - The spill slot of the value being reused. unsigned StackSlot; - + // PhysRegReused - The physical register the value was available in. unsigned PhysRegReused; - + // AssignedPhysReg - The physreg that was assigned for use by the reload. unsigned AssignedPhysReg; - + ReusedOp(unsigned o, unsigned ss, unsigned prr, unsigned apr) : Operand(o), StackSlot(ss), PhysRegReused(prr), AssignedPhysReg(apr) {} }; @@ -384,7 +384,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM) { // Okay, we found out that an alias of a reused register // was used. This isn't good because it means we have // to undo a previous reuse. - MRI->loadRegFromStackSlot(MBB, &MI, Op.AssignedPhysReg, + MRI->loadRegFromStackSlot(MBB, &MI, Op.AssignedPhysReg, Op.StackSlot); ClobberPhysReg(Op.AssignedPhysReg, SpillSlotsAvailable, PhysRegsAvailable); @@ -510,12 +510,12 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, const VirtRegMap &VRM) { break; } } - + if (!OpTakenCareOf) { ClobberPhysReg(VirtReg, SpillSlotsAvailable, PhysRegsAvailable); TakenCareOf = true; } - } + } if (!TakenCareOf) { // The only vregs left are stack slot definitions. diff --git a/lib/CodeGen/VirtRegMap.h b/lib/CodeGen/VirtRegMap.h index abdf85db0eb..d8c371c6dd0 100644 --- a/lib/CodeGen/VirtRegMap.h +++ b/lib/CodeGen/VirtRegMap.h @@ -48,7 +48,7 @@ namespace llvm { /// instructions, we need to know which virtual register was /// read/written by this instruction. MI2VirtMapTy MI2VirtMap; - + VirtRegMap(const VirtRegMap&); // DO NOT IMPLEMENT void operator=(const VirtRegMap&); // DO NOT IMPLEMENT diff --git a/lib/Debugger/Debugger.cpp b/lib/Debugger/Debugger.cpp index 76cdfa20148..c056b771f7e 100644 --- a/lib/Debugger/Debugger.cpp +++ b/lib/Debugger/Debugger.cpp @@ -1,12 +1,12 @@ //===-- Debugger.cpp - LLVM debugger library implementation ---------------===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// -// +// // This file contains the main implementation of the LLVM debugger library. // //===----------------------------------------------------------------------===// @@ -32,7 +32,7 @@ Debugger::~Debugger() { } catch (const char *) { } catch (const std::string &) { } - + unloadProgram(); } @@ -47,7 +47,7 @@ getMaterializedModuleProvider(const std::string &Filename) { try { std::auto_ptr Result(getBytecodeModuleProvider(Filename)); if (!Result.get()) return 0; - + Result->materializeModule(); return Result.release()->releaseModule(); } catch (...) { @@ -163,7 +163,7 @@ void Debugger::nextProgram() { // Don't trust the current frame: get the caller frame. void *ParentFrame = Process->getPreviousFrame(CurrentFrame); - + // Ok, we have some information, run the program one step. Process->stepProgram(); diff --git a/lib/Debugger/FDHandle.cpp b/lib/Debugger/FDHandle.cpp index c24bcb87c07..4f952f2ef99 100644 --- a/lib/Debugger/FDHandle.cpp +++ b/lib/Debugger/FDHandle.cpp @@ -1,10 +1,10 @@ //===- lib/Debugger/FDHandle.cpp - File Descriptor Handle -----------------===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file implements a class for ensuring that Unix file handles get closed. @@ -21,12 +21,12 @@ using namespace llvm; // FDHandle::~FDHandle() throw() { - if (FD != -1) + if (FD != -1) ::close(FD); } FDHandle &FDHandle::operator=(int fd) throw() { - if (FD != -1) + if (FD != -1) ::close(FD); FD = fd; return *this; diff --git a/lib/Debugger/FDHandle.h b/lib/Debugger/FDHandle.h index cf958744107..56b5aa24fd1 100644 --- a/lib/Debugger/FDHandle.h +++ b/lib/Debugger/FDHandle.h @@ -1,10 +1,10 @@ //===- lib/Debugger/FDHandle.h - File Descriptor Handle ---------*- C++ -*-===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file defines a family of utility functions which are useful for doing diff --git a/lib/Debugger/ProgramInfo.cpp b/lib/Debugger/ProgramInfo.cpp index 17175c4e4cf..a702829c121 100644 --- a/lib/Debugger/ProgramInfo.cpp +++ b/lib/Debugger/ProgramInfo.cpp @@ -1,12 +1,12 @@ //===-- ProgramInfo.cpp - Compute and cache info about a program ----------===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// -// +// // This file implements the ProgramInfo and related classes, by sorting through // the loaded Module. // @@ -107,13 +107,13 @@ static const GlobalVariable *getNextStopPoint(const Value *V, unsigned &LineNo, if (const ConstantInt *C = dyn_cast(CI->getOperand(3))) CurColNo = C->getRawValue(); const Value *Op = CI->getOperand(4); - + if ((CurDesc = dyn_cast(Op)) && (LineNo < LastLineNo || (LineNo == LastLineNo && ColNo < LastColNo))) { LastDesc = CurDesc; LastLineNo = CurLineNo; - LastColNo = CurColNo; + LastColNo = CurColNo; } ShouldRecurse = false; } @@ -128,12 +128,12 @@ static const GlobalVariable *getNextStopPoint(const Value *V, unsigned &LineNo, if (LineNo < LastLineNo || (LineNo == LastLineNo && ColNo < LastColNo)){ LastDesc = GV; LastLineNo = CurLineNo; - LastColNo = CurColNo; + LastColNo = CurColNo; } } } } - + if (LastDesc) { LineNo = LastLineNo != ~0U ? LastLineNo : 0; ColNo = LastColNo != ~0U ? LastColNo : 0; @@ -157,7 +157,7 @@ SourceFileInfo::SourceFileInfo(const GlobalVariable *Desc, if (CS->getNumOperands() > 4) { if (ConstantUInt *CUI = dyn_cast(CS->getOperand(1))) Version = CUI->getValue(); - + BaseName = getStringValue(CS->getOperand(3)); Directory = getStringValue(CS->getOperand(4)); } @@ -194,7 +194,7 @@ SourceFunctionInfo::SourceFunctionInfo(ProgramInfo &PI, if (ConstantStruct *CS = dyn_cast(Desc->getInitializer())) if (CS->getNumOperands() > 2) { // Entry #1 is the file descriptor. - if (const GlobalVariable *GV = + if (const GlobalVariable *GV = dyn_cast(CS->getOperand(1))) SourceFile = &PI.getSourceFile(GV); @@ -338,7 +338,7 @@ const SourceFileInfo &ProgramInfo::getSourceFile(const std::string &Filename) { std::multimap::const_iterator Start, End; getSourceFiles(); tie(Start, End) = SourceFileIndex.equal_range(Filename); - + if (Start == End) throw "Could not find source file '" + Filename + "'!"; const SourceFileInfo &SFI = *Start->second; ++Start; diff --git a/lib/Debugger/RuntimeInfo.cpp b/lib/Debugger/RuntimeInfo.cpp index d1bc48b543a..5d45104b50a 100644 --- a/lib/Debugger/RuntimeInfo.cpp +++ b/lib/Debugger/RuntimeInfo.cpp @@ -1,12 +1,12 @@ //===-- RuntimeInfo.cpp - Compute and cache info about running program ----===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// -// +// // This file implements the RuntimeInfo and related classes, by querying and // cachine information from the running inferior process. // @@ -24,7 +24,7 @@ StackFrame::StackFrame(RuntimeInfo &ri, void *ParentFrameID) : RI(ri), SourceInfo(0) { FrameID = RI.getInferiorProcess().getPreviousFrame(ParentFrameID); if (FrameID == 0) throw "Stack frame does not exist!"; - + // Compute lazily as needed. FunctionDesc = 0; } diff --git a/lib/Debugger/SourceFile.cpp b/lib/Debugger/SourceFile.cpp index 23144d9ea5d..222cdfa26aa 100644 --- a/lib/Debugger/SourceFile.cpp +++ b/lib/Debugger/SourceFile.cpp @@ -1,12 +1,12 @@ //===-- SourceFile.cpp - SourceFile implementation for the debugger -------===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// -// +// // This file implements the SourceFile class for the LLVM debugger. // //===----------------------------------------------------------------------===// @@ -16,7 +16,7 @@ using namespace llvm; -/// readFile - Load Filename +/// readFile - Load Filename /// void SourceFile::readFile() { File.map(); diff --git a/lib/Debugger/SourceLanguage-CFamily.cpp b/lib/Debugger/SourceLanguage-CFamily.cpp index 392c07c818e..468fe0c61f0 100644 --- a/lib/Debugger/SourceLanguage-CFamily.cpp +++ b/lib/Debugger/SourceLanguage-CFamily.cpp @@ -1,12 +1,12 @@ //===-- SourceLanguage-CFamily.cpp - C family SourceLanguage impl ---------===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// -// +// // This file implements the SourceLanguage class for the C family of languages // (K&R C, C89, C99, etc). // diff --git a/lib/Debugger/SourceLanguage-CPlusPlus.cpp b/lib/Debugger/SourceLanguage-CPlusPlus.cpp index 31e4fd43244..b22163d768b 100644 --- a/lib/Debugger/SourceLanguage-CPlusPlus.cpp +++ b/lib/Debugger/SourceLanguage-CPlusPlus.cpp @@ -1,12 +1,12 @@ //===-- SourceLanguage-CPlusPlus.cpp - C++ SourceLanguage impl ------------===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// -// +// // This file implements the SourceLanguage class for the C++ language. // //===----------------------------------------------------------------------===// diff --git a/lib/Debugger/SourceLanguage-Unknown.cpp b/lib/Debugger/SourceLanguage-Unknown.cpp index 806eb71dd0d..22376f8e2d2 100644 --- a/lib/Debugger/SourceLanguage-Unknown.cpp +++ b/lib/Debugger/SourceLanguage-Unknown.cpp @@ -1,12 +1,12 @@ //===-- SourceLanguage-Unknown.cpp - Implement itf for unknown languages --===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// -// +// // If the LLVM debugger does not have a module for a particular language, it // falls back on using this one to perform the source-language interface. This // interface is not wonderful, but it gets the job done. diff --git a/lib/Debugger/SourceLanguage.cpp b/lib/Debugger/SourceLanguage.cpp index 70268445632..8e4b4e0caff 100644 --- a/lib/Debugger/SourceLanguage.cpp +++ b/lib/Debugger/SourceLanguage.cpp @@ -1,12 +1,12 @@ //===-- SourceLanguage.cpp - Implement the SourceLanguage class -----------===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// -// +// // This file implements the SourceLanguage class. // //===----------------------------------------------------------------------===// diff --git a/lib/Debugger/UnixLocalInferiorProcess.cpp b/lib/Debugger/UnixLocalInferiorProcess.cpp index c2ca1641136..1731beaa039 100644 --- a/lib/Debugger/UnixLocalInferiorProcess.cpp +++ b/lib/Debugger/UnixLocalInferiorProcess.cpp @@ -1,12 +1,12 @@ //===-- UnixLocalInferiorProcess.cpp - A Local process on a Unixy system --===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// -// +// // This file provides one implementation of the InferiorProcess class, which is // designed to be used on unixy systems (those that support pipe, fork, exec, // and signals). @@ -94,7 +94,7 @@ namespace { // FinishProgram: FrameDesc*->char - This command causes the program to // continue execution until the specified function frame returns. - FinishProgram, + FinishProgram, // ContProgram: void->char - This command causes the program to continue // execution, stopping at some point in the future. @@ -217,7 +217,7 @@ IP::IP(Module *M, const std::vector &Arguments, // Start the child running... startChild(M, Arguments, envp); - + // Okay, we created the program and it is off and running. Wait for it to // stop now. try { @@ -325,7 +325,7 @@ const GlobalVariable *IP::getSubprogramDesc(void *Frame) const { /// getFrameLocation - This method returns the source location where each stack /// frame is stopped. -void IP::getFrameLocation(void *Frame, unsigned &LineNo, unsigned &ColNo, +void IP::getFrameLocation(void *Frame, unsigned &LineNo, unsigned &ColNo, const GlobalVariable *&SourceDesc) const { sendCommand(GetFrameLocation, &Frame, sizeof(Frame)); LocationToken Loc; @@ -419,7 +419,7 @@ void IP::writeToChild(void *Buffer, unsigned Size) const { /// died, otherwise it just returns the exit code if it had to be killed. void IP::killChild() const { assert(ChildPID != 0 && "Child has already been reaped!"); - + // If the process terminated on its own accord, closing the pipe file // descriptors, we will get here. Check to see if the process has already // died in this manner, gracefully. @@ -456,7 +456,7 @@ void IP::killChild() const { throw InferiorProcessDead(WTERMSIG(Status)); throw InferiorProcessDead(-1); } - + // Otherwise, the child exists and has not yet been killed. if (kill(ChildPID, SIGKILL) < 0) throw "Error killing child process!"; @@ -905,7 +905,7 @@ static void runChild(Module *M, const std::vector &Arguments, ExecutionEngine::create(new ExistingModuleProvider(M), false, new DebuggerIntrinsicLowering()); assert(EE && "Couldn't create an ExecutionEngine, not even an interpreter?"); - + // Call the main function from M as if its signature were: // int main (int argc, char **argv, const char **envp) // using the contents of Args to determine argc & argv, and the contents of diff --git a/lib/ExecutionEngine/ExecutionEngine.cpp b/lib/ExecutionEngine/ExecutionEngine.cpp index 05134019aa4..22a28b51c85 100644 --- a/lib/ExecutionEngine/ExecutionEngine.cpp +++ b/lib/ExecutionEngine/ExecutionEngine.cpp @@ -1,12 +1,12 @@ //===-- ExecutionEngine.cpp - Common Implementation shared by EEs ---------===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// -// +// // This file defines the common interface used by the various execution engine // subclasses. // @@ -33,7 +33,7 @@ namespace { Statistic<> NumGlobals ("lli", "Number of global vars initialized"); } -ExecutionEngine::ExecutionEngine(ModuleProvider *P) : +ExecutionEngine::ExecutionEngine(ModuleProvider *P) : CurMod(*P->getModule()), MP(P) { assert(P && "ModuleProvider is null?"); } @@ -52,7 +52,7 @@ ExecutionEngine::~ExecutionEngine() { const GlobalValue *ExecutionEngine::getGlobalValueAtAddress(void *Addr) { // If we haven't computed the reverse mapping yet, do so first. if (GlobalAddressReverseMap.empty()) { - for (std::map::iterator I = + for (std::map::iterator I = GlobalAddressMap.begin(), E = GlobalAddressMap.end(); I != E; ++I) GlobalAddressReverseMap.insert(std::make_pair(I->second, I->first)); } @@ -77,10 +77,10 @@ static void *CreateArgv(ExecutionEngine *EE, unsigned Size = InputArgv[i].size()+1; char *Dest = new char[Size]; DEBUG(std::cerr << "ARGV[" << i << "] = " << (void*)Dest << "\n"); - + std::copy(InputArgv[i].begin(), InputArgv[i].end(), Dest); Dest[Size-1] = 0; - + // Endian safe: Result[i] = (PointerTy)Dest; EE->StoreValueToMemory(PTOGV(Dest), (GenericValue*)(Result+i*PtrSize), SBytePtr); @@ -124,9 +124,9 @@ int ExecutionEngine::runFunctionAsMain(Function *Fn, /// If possible, create a JIT, unless the caller specifically requests an /// Interpreter or there's an error. If even an Interpreter cannot be created, -/// NULL is returned. +/// NULL is returned. /// -ExecutionEngine *ExecutionEngine::create(ModuleProvider *MP, +ExecutionEngine *ExecutionEngine::create(ModuleProvider *MP, bool ForceInterpreter, IntrinsicLowering *IL) { ExecutionEngine *EE = 0; @@ -151,10 +151,10 @@ ExecutionEngine *ExecutionEngine::create(ModuleProvider *MP, } } - if (EE == 0) + if (EE == 0) delete IL; else - // Make sure we can resolve symbols in the program as well. The zero arg + // Make sure we can resolve symbols in the program as well. The zero arg // to the function tells DynamicLibrary to load the program, not a library. sys::DynamicLibrary::LoadLibraryPermanently(0); @@ -173,7 +173,7 @@ void *ExecutionEngine::getPointerToGlobal(const GlobalValue *GV) { } /// FIXME: document -/// +/// GenericValue ExecutionEngine::getConstantValue(const Constant *C) { GenericValue Result; if (isa(C)) return Result; @@ -185,7 +185,7 @@ GenericValue ExecutionEngine::getConstantValue(const Constant *C) { std::vector Indexes(CE->op_begin()+1, CE->op_end()); uint64_t Offset = TD->getIndexedOffset(CE->getOperand(0)->getType(), Indexes); - + Result.LongVal += Offset; return Result; } @@ -203,7 +203,7 @@ GenericValue ExecutionEngine::getConstantValue(const Constant *C) { // Handle a cast of pointer to any integral type... if (isa(Op->getType()) && C->getType()->isIntegral()) return GV; - + // Handle cast of integer to a pointer... if (isa(C->getType()) && Op->getType()->isIntegral()) switch (Op->getType()->getTypeID()) { @@ -260,7 +260,7 @@ GenericValue ExecutionEngine::getConstantValue(const Constant *C) { std::cerr << "ConstantExpr not handled as global var init: " << *CE << "\n"; abort(); } - + switch (C->getType()->getTypeID()) { #define GET_CONST_VAL(TY, CTY, CLASS) \ case Type::TY##TyID: Result.TY##Val = (CTY)cast(C)->getValue(); break @@ -353,7 +353,7 @@ void ExecutionEngine::StoreValueToMemory(GenericValue Val, GenericValue *Ptr, case Type::DoubleTyID: case Type::ULongTyID: case Type::LongTyID: - Ptr->Untyped[7] = (unsigned char)(Val.ULongVal ); + Ptr->Untyped[7] = (unsigned char)(Val.ULongVal ); Ptr->Untyped[6] = (unsigned char)(Val.ULongVal >> 8); Ptr->Untyped[5] = (unsigned char)(Val.ULongVal >> 16); Ptr->Untyped[4] = (unsigned char)(Val.ULongVal >> 24); @@ -382,7 +382,7 @@ GenericValue ExecutionEngine::LoadValueFromMemory(GenericValue *Ptr, case Type::ShortTyID: Result.UShortVal = (unsigned)Ptr->Untyped[0] | ((unsigned)Ptr->Untyped[1] << 8); break; - Load4BytesLittleEndian: + Load4BytesLittleEndian: case Type::FloatTyID: case Type::UIntTyID: case Type::IntTyID: Result.UIntVal = (unsigned)Ptr->Untyped[0] | @@ -463,7 +463,7 @@ void ExecutionEngine::InitializeMemory(const Constant *Init, void *Addr) { switch (Init->getType()->getTypeID()) { case Type::ArrayTyID: { const ConstantArray *CPA = cast(Init); - unsigned ElementSize = + unsigned ElementSize = getTargetData().getTypeSize(cast(CPA->getType())->getElementType()); for (unsigned i = 0, e = CPA->getNumOperands(); i != e; ++i) InitializeMemory(CPA->getOperand(i), (char*)Addr+i*ElementSize); @@ -491,7 +491,7 @@ void ExecutionEngine::InitializeMemory(const Constant *Init, void *Addr) { /// void ExecutionEngine::emitGlobals() { const TargetData &TD = getTargetData(); - + // Loop over all of the global variables in the program, allocating the memory // to hold them. for (Module::const_global_iterator I = getModule().global_begin(), E = getModule().global_end(); @@ -499,7 +499,7 @@ void ExecutionEngine::emitGlobals() { if (!I->isExternal()) { // Get the type of the global... const Type *Ty = I->getType()->getElementType(); - + // Allocate some memory for it! unsigned Size = TD.getTypeSize(Ty); addGlobalMapping(I, new char[Size]); @@ -515,7 +515,7 @@ void ExecutionEngine::emitGlobals() { abort(); } } - + // Now that all of the globals are set up in memory, loop through them all and // initialize their contents. for (Module::const_global_iterator I = getModule().global_begin(), E = getModule().global_end(); diff --git a/lib/VMCore/ValueTypes.cpp b/lib/VMCore/ValueTypes.cpp index a4584dfe7a7..e33d91b825b 100644 --- a/lib/VMCore/ValueTypes.cpp +++ b/lib/VMCore/ValueTypes.cpp @@ -1,10 +1,10 @@ //===-- ValueTypes.cpp - Implementation of MVT::ValueType methods ---------===// -// +// // The LLVM Compiler Infrastructure // // This file was developed by the LLVM research group and is distributed under // the University of Illinois Open Source License. See LICENSE.TXT for details. -// +// //===----------------------------------------------------------------------===// // // This file implements methods in the CodeGen/ValueTypes.h header.