From: Owen Anderson Date: Thu, 15 Sep 2011 18:36:29 +0000 (+0000) Subject: Add support for stored annotations to MCInst, and provide facilities for MC-based... X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=ede042dc8d59ff48a48ef8e2271f2a7ee8324ba5;p=oota-llvm.git Add support for stored annotations to MCInst, and provide facilities for MC-based InstPrinters to print them out. Enhance the ARM and X86 InstPrinter's to do so in verbose mode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139820 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/include/llvm/MC/MCInst.h b/include/llvm/MC/MCInst.h index d3847647749..d443536d40f 100644 --- a/include/llvm/MC/MCInst.h +++ b/include/llvm/MC/MCInst.h @@ -129,6 +129,7 @@ public: class MCInst { unsigned Opcode; SmallVector Operands; + SmallVector Annotations; public: MCInst() : Opcode(0) {} @@ -144,7 +145,15 @@ public: Operands.push_back(Op); } - void clear() { Operands.clear(); } + void addAnnotation(const std::string &Annot) { + Annotations.push_back(Annot); + } + + void clear() { + Operands.clear(); + Annotations.clear(); + } + size_t size() { return Operands.size(); } typedef SmallVector::iterator iterator; @@ -154,6 +163,9 @@ public: return Operands.insert(I, Op); } + size_t getNumAnnotations() const { return Annotations.size(); } + std::string getAnnotation(size_t i) const { return Annotations[i]; } + void print(raw_ostream &OS, const MCAsmInfo *MAI) const; void dump() const; diff --git a/include/llvm/MC/MCInstPrinter.h b/include/llvm/MC/MCInstPrinter.h index 39002dabca1..4c12d10d5be 100644 --- a/include/llvm/MC/MCInstPrinter.h +++ b/include/llvm/MC/MCInstPrinter.h @@ -41,6 +41,10 @@ public: /// virtual void printInst(const MCInst *MI, raw_ostream &OS) = 0; + /// printAnnotations - Print the annotation comments attached to specified + /// MCInst to the specified raw_ostream. + void printAnnotations(const MCInst *MI, raw_ostream &OS); + /// getOpcodeName - Return the name of the specified opcode enum (e.g. /// "MOV32ri") or empty if we can't resolve it. virtual StringRef getOpcodeName(unsigned Opcode) const; diff --git a/lib/MC/MCInst.cpp b/lib/MC/MCInst.cpp index 4cb628b395c..ec97acc554f 100644 --- a/lib/MC/MCInst.cpp +++ b/lib/MC/MCInst.cpp @@ -41,6 +41,16 @@ void MCInst::print(raw_ostream &OS, const MCAsmInfo *MAI) const { OS << " "; getOperand(i).print(OS, MAI); } + + if (getNumAnnotations()) { + OS << " # Annots: "; + for (unsigned i = 0, e = getNumAnnotations(); i != e; ++i) { + OS << " \""; + OS << getAnnotation(i); + OS << '"'; + } + } + OS << ">"; } @@ -57,6 +67,17 @@ void MCInst::dump_pretty(raw_ostream &OS, const MCAsmInfo *MAI, OS << Separator; getOperand(i).print(OS, MAI); } + + if (getNumAnnotations()) { + OS << " # Annots: "; + for (unsigned i = 0, e = getNumAnnotations(); i != e; ++i) { + OS << Separator; + OS << '"'; + OS << getAnnotation(i); + OS << '"'; + } + } + OS << ">"; } diff --git a/lib/MC/MCInstPrinter.cpp b/lib/MC/MCInstPrinter.cpp index 81a939ffaae..f0fa2cda4a8 100644 --- a/lib/MC/MCInstPrinter.cpp +++ b/lib/MC/MCInstPrinter.cpp @@ -8,7 +8,10 @@ //===----------------------------------------------------------------------===// #include "llvm/MC/MCInstPrinter.h" +#include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCInst.h" #include "llvm/ADT/StringRef.h" +#include "llvm/Support/raw_ostream.h" using namespace llvm; MCInstPrinter::~MCInstPrinter() { @@ -23,3 +26,9 @@ StringRef MCInstPrinter::getOpcodeName(unsigned Opcode) const { void MCInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const { assert(0 && "Target should implement this"); } + +void MCInstPrinter::printAnnotations(const MCInst *MI, raw_ostream &OS) { + for (unsigned i = 0, e = MI->getNumAnnotations(); i != e; ++i) { + OS << MI->getAnnotation(i) << "\n"; + } +} diff --git a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp index 7eec0dddf8a..289d1921d1c 100644 --- a/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp +++ b/lib/Target/ARM/InstPrinter/ARMInstPrinter.cpp @@ -71,6 +71,9 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) { O << ", " << getRegisterName(MO2.getReg()); assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0); + + if (CommentStream) printAnnotations(MI, *CommentStream); + return; } @@ -87,10 +90,14 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) { O << '\t' << getRegisterName(Dst.getReg()) << ", " << getRegisterName(MO1.getReg()); - if (ARM_AM::getSORegShOp(MO2.getImm()) == ARM_AM::rrx) + if (ARM_AM::getSORegShOp(MO2.getImm()) == ARM_AM::rrx) { + if (CommentStream) printAnnotations(MI, *CommentStream); return; + } O << ", #" << translateShiftImm(ARM_AM::getSORegOffset(MO2.getImm())); + + if (CommentStream) printAnnotations(MI, *CommentStream); return; } @@ -104,6 +111,7 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) { O << ".w"; O << '\t'; printRegisterList(MI, 4, O); + if (CommentStream) printAnnotations(MI, *CommentStream); return; } if (Opcode == ARM::STR_PRE_IMM && MI->getOperand(2).getReg() == ARM::SP && @@ -111,6 +119,7 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) { O << '\t' << "push"; printPredicateOperand(MI, 4, O); O << "\t{" << getRegisterName(MI->getOperand(1).getReg()) << "}"; + if (CommentStream) printAnnotations(MI, *CommentStream); return; } @@ -123,6 +132,7 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) { O << ".w"; O << '\t'; printRegisterList(MI, 4, O); + if (CommentStream) printAnnotations(MI, *CommentStream); return; } if (Opcode == ARM::LDR_POST_IMM && MI->getOperand(2).getReg() == ARM::SP && @@ -130,6 +140,7 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) { O << '\t' << "pop"; printPredicateOperand(MI, 5, O); O << "\t{" << getRegisterName(MI->getOperand(0).getReg()) << "}"; + if (CommentStream) printAnnotations(MI, *CommentStream); return; } @@ -141,6 +152,7 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) { printPredicateOperand(MI, 2, O); O << '\t'; printRegisterList(MI, 4, O); + if (CommentStream) printAnnotations(MI, *CommentStream); return; } @@ -151,6 +163,7 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) { printPredicateOperand(MI, 2, O); O << '\t'; printRegisterList(MI, 4, O); + if (CommentStream) printAnnotations(MI, *CommentStream); return; } @@ -169,6 +182,7 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) { if (Writeback) O << "!"; O << ", "; printRegisterList(MI, 3, O); + if (CommentStream) printAnnotations(MI, *CommentStream); return; } @@ -177,10 +191,12 @@ void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O) { MI->getOperand(1).getReg() == ARM::R8) { O << "\tnop"; printPredicateOperand(MI, 2, O); + if (CommentStream) printAnnotations(MI, *CommentStream); return; } printInstruction(MI, O); + if (CommentStream) printAnnotations(MI, *CommentStream); } void ARMInstPrinter::printOperand(const MCInst *MI, unsigned OpNo, diff --git a/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp b/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp index 591b5838310..76a1da49595 100644 --- a/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp +++ b/lib/Target/X86/InstPrinter/X86ATTInstPrinter.cpp @@ -45,8 +45,10 @@ void X86ATTInstPrinter::printInst(const MCInst *MI, raw_ostream &OS) { printInstruction(MI, OS); // If verbose assembly is enabled, we can print some informative comments. - if (CommentStream) + if (CommentStream) { + printAnnotations(MI, *CommentStream); EmitAnyX86InstComments(MI, *CommentStream, getRegisterName); + } } StringRef X86ATTInstPrinter::getOpcodeName(unsigned Opcode) const { diff --git a/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp b/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp index 506e26cbf7c..6cca1d19b38 100644 --- a/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp +++ b/lib/Target/X86/InstPrinter/X86IntelInstPrinter.cpp @@ -36,8 +36,10 @@ void X86IntelInstPrinter::printInst(const MCInst *MI, raw_ostream &OS) { printInstruction(MI, OS); // If verbose assembly is enabled, we can print some informative comments. - if (CommentStream) + if (CommentStream) { + printAnnotations(MI, *CommentStream); EmitAnyX86InstComments(MI, *CommentStream, getRegisterName); + } } StringRef X86IntelInstPrinter::getOpcodeName(unsigned Opcode) const { return getInstructionName(Opcode);