From: Akira Hatanaka Date: Tue, 29 Nov 2011 23:08:41 +0000 (+0000) Subject: Change names for MIPS "generic" processors defined in Mips.td to match what GNU X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=ed2a7d2780399cb2b4fce1e44994949895f6af49;p=oota-llvm.git Change names for MIPS "generic" processors defined in Mips.td to match what GNU tools use. Patch by Simon Atanasyan. "mips32r1" => "mips32" "4ke" => mips32r2" "mips64r1" => "mips64" git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145451 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/Mips/Mips.td b/lib/Target/Mips/Mips.td index 39c2c164f66..e9e0f60566e 100644 --- a/lib/Target/Mips/Mips.td +++ b/lib/Target/Mips/Mips.td @@ -79,9 +79,9 @@ def FeatureMips64r2 : SubtargetFeature<"mips64r2", "MipsArchVersion", class Proc Features> : Processor; -def : Proc<"mips32r1", [FeatureMips32]>; -def : Proc<"4ke", [FeatureMips32r2]>; -def : Proc<"mips64r1", [FeatureMips64]>; +def : Proc<"mips32", [FeatureMips32]>; +def : Proc<"mips32r2", [FeatureMips32r2]>; +def : Proc<"mips64", [FeatureMips64]>; def : Proc<"mips64r2", [FeatureMips64r2]>; def MipsAsmWriter : AsmWriter { diff --git a/lib/Target/Mips/MipsSubtarget.cpp b/lib/Target/Mips/MipsSubtarget.cpp index 016d449a106..dc299f27830 100644 --- a/lib/Target/Mips/MipsSubtarget.cpp +++ b/lib/Target/Mips/MipsSubtarget.cpp @@ -31,7 +31,7 @@ MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU, { std::string CPUName = CPU; if (CPUName.empty()) - CPUName = "mips32r1"; + CPUName = "mips32"; // Parse features string. ParseSubtargetFeatures(CPUName, FS); diff --git a/test/CodeGen/Mips/extins.ll b/test/CodeGen/Mips/extins.ll index 69f53e503f6..a164f7047b5 100644 --- a/test/CodeGen/Mips/extins.ll +++ b/test/CodeGen/Mips/extins.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=mips -mcpu=4ke < %s | FileCheck %s +; RUN: llc -march=mips -mcpu=mips32r2 < %s | FileCheck %s define i32 @ext0_5_9(i32 %s, i32 %pos, i32 %sz) nounwind readnone { entry: diff --git a/test/CodeGen/Mips/largeimmprinting.ll b/test/CodeGen/Mips/largeimmprinting.ll index fcc20f79944..2333f0789ed 100644 --- a/test/CodeGen/Mips/largeimmprinting.ll +++ b/test/CodeGen/Mips/largeimmprinting.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=mipsel -mcpu=4ke < %s | FileCheck %s +; RUN: llc -march=mipsel -mcpu=mips32r2 < %s | FileCheck %s %struct.S1 = type { [65536 x i8] } diff --git a/test/CodeGen/Mips/mips64fpldst.ll b/test/CodeGen/Mips/mips64fpldst.ll index b8f3ca9d798..abeff095c41 100644 --- a/test/CodeGen/Mips/mips64fpldst.ll +++ b/test/CodeGen/Mips/mips64fpldst.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=mips64el -mcpu=mips64r1 -mattr=n64 | FileCheck %s -check-prefix=CHECK-N64 -; RUN: llc < %s -march=mips64el -mcpu=mips64r1 -mattr=n32 | FileCheck %s -check-prefix=CHECK-N32 +; RUN: llc < %s -march=mips64el -mcpu=mips64 -mattr=n64 | FileCheck %s -check-prefix=CHECK-N64 +; RUN: llc < %s -march=mips64el -mcpu=mips64 -mattr=n32 | FileCheck %s -check-prefix=CHECK-N32 @f0 = common global float 0.000000e+00, align 4 @d0 = common global double 0.000000e+00, align 8 diff --git a/test/CodeGen/Mips/mips64instrs.ll b/test/CodeGen/Mips/mips64instrs.ll index c9812a27699..9bc178c63d4 100644 --- a/test/CodeGen/Mips/mips64instrs.ll +++ b/test/CodeGen/Mips/mips64instrs.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=mips64el -mcpu=mips64r1 < %s | FileCheck %s +; RUN: llc -march=mips64el -mcpu=mips64 < %s | FileCheck %s define i64 @f0(i64 %a0, i64 %a1) nounwind readnone { entry: diff --git a/test/CodeGen/Mips/mips64intldst.ll b/test/CodeGen/Mips/mips64intldst.ll index fdf496b1918..af3a2f80de9 100644 --- a/test/CodeGen/Mips/mips64intldst.ll +++ b/test/CodeGen/Mips/mips64intldst.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=mips64el -mcpu=mips64r1 -mattr=n64 | FileCheck %s -check-prefix=CHECK-N64 -; RUN: llc < %s -march=mips64el -mcpu=mips64r1 -mattr=n32 | FileCheck %s -check-prefix=CHECK-N32 +; RUN: llc < %s -march=mips64el -mcpu=mips64 -mattr=n64 | FileCheck %s -check-prefix=CHECK-N64 +; RUN: llc < %s -march=mips64el -mcpu=mips64 -mattr=n32 | FileCheck %s -check-prefix=CHECK-N32 @c = common global i8 0, align 4 @s = common global i16 0, align 4 diff --git a/test/CodeGen/Mips/rotate.ll b/test/CodeGen/Mips/rotate.ll index 8e27f4aad6e..4f3cfb7df41 100644 --- a/test/CodeGen/Mips/rotate.ll +++ b/test/CodeGen/Mips/rotate.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=mips -mcpu=4ke < %s | FileCheck %s +; RUN: llc -march=mips -mcpu=mips32r2 < %s | FileCheck %s ; CHECK: rotrv $2, $4 define i32 @rot0(i32 %a, i32 %b) nounwind readnone {