From: Tim Northover Date: Wed, 29 Jul 2015 16:39:56 +0000 (+0000) Subject: AArch64: use AddressingModes.h accessors for compare shifts X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=eb745dc50b9f97c546f120eb7a510ce9cb264f33;p=oota-llvm.git AArch64: use AddressingModes.h accessors for compare shifts No functional change because "lsl #12" is actually encoded as 12, but one less bug if someone ever decides to change that for the giggles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@243536 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/AArch64/AArch64ConditionOptimizer.cpp b/lib/Target/AArch64/AArch64ConditionOptimizer.cpp index 99a5eaa7aef..fc27bfee73d 100644 --- a/lib/Target/AArch64/AArch64ConditionOptimizer.cpp +++ b/lib/Target/AArch64/AArch64ConditionOptimizer.cpp @@ -59,6 +59,7 @@ //===----------------------------------------------------------------------===// #include "AArch64.h" +#include "MCTargetDesc/AArch64AddressingModes.h" #include "llvm/ADT/DepthFirstIterator.h" #include "llvm/ADT/SmallVector.h" #include "llvm/ADT/Statistic.h" @@ -153,12 +154,12 @@ MachineInstr *AArch64ConditionOptimizer::findSuitableCompare( case AArch64::SUBSXri: // cmn is an alias for adds with a dead destination register. case AArch64::ADDSWri: - case AArch64::ADDSXri: + case AArch64::ADDSXri: { + unsigned ShiftAmt = AArch64_AM::getShiftValue(I->getOperand(3).getImm()); if (!I->getOperand(2).isImm()) { DEBUG(dbgs() << "Immediate of cmp is symbolic, " << *I << '\n'); return nullptr; - } else if (I->getOperand(2).getImm() << I->getOperand(3).getImm() >= - 0xfff) { + } else if (I->getOperand(2).getImm() << ShiftAmt >= 0xfff) { DEBUG(dbgs() << "Immediate of cmp may be out of range, " << *I << '\n'); return nullptr; } else if (!MRI->use_empty(I->getOperand(0).getReg())) { @@ -166,7 +167,7 @@ MachineInstr *AArch64ConditionOptimizer::findSuitableCompare( return nullptr; } return I; - + } // Prevent false positive case like: // cmp w19, #0 // cinc w0, w19, gt