From: Jim Laskey <jlaskey@mac.com>
Date: Wed, 2 Aug 2006 12:30:23 +0000 (+0000)
Subject: Final polish on machine pass registries.
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=eb577ba3b815a1fa4627b060dd2345d17abf672d;p=oota-llvm.git

Final polish on machine pass registries.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29471 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/include/llvm/CodeGen/MachinePassRegistry.h b/include/llvm/CodeGen/MachinePassRegistry.h
index 97ecaae1842..64d364e224c 100644
--- a/include/llvm/CodeGen/MachinePassRegistry.h
+++ b/include/llvm/CodeGen/MachinePassRegistry.h
@@ -24,6 +24,8 @@
 
 namespace llvm {
 
+typedef void *(*MachinePassCtor)();
+
 
 //===----------------------------------------------------------------------===// 
 ///
@@ -35,8 +37,8 @@ class MachinePassRegistryListener {
 public:
   MachinePassRegistryListener() {}
   virtual ~MachinePassRegistryListener() {}
-  virtual void NotifyAdd(const char *N, const char *D) = 0;
-  virtual void NotifyRemove(const char *N, const char *D) = 0;
+  virtual void NotifyAdd(const char *N, MachinePassCtor C, const char *D) = 0;
+  virtual void NotifyRemove(const char *N) = 0;
 };
 
 
@@ -45,19 +47,18 @@ public:
 /// MachinePassRegistryNode - Machine pass node stored in registration list.
 ///
 //===----------------------------------------------------------------------===//
-template<typename FunctionPassCtor>
 class MachinePassRegistryNode {
 
 private:
 
-  MachinePassRegistryNode<FunctionPassCtor> *Next;// Next function pass in list.
+  MachinePassRegistryNode *Next;        // Next function pass in list.
   const char *Name;                     // Name of function pass.
   const char *Description;              // Description string.
-  FunctionPassCtor Ctor;                // Function pass creator.
+  MachinePassCtor Ctor;                 // Function pass creator.
   
 public:
 
-  MachinePassRegistryNode(const char *N, const char *D, FunctionPassCtor C)
+  MachinePassRegistryNode(const char *N, const char *D, MachinePassCtor C)
   : Next(NULL)
   , Name(N)
   , Description(D)
@@ -65,14 +66,12 @@ public:
   {}
 
   // Accessors
-  MachinePassRegistryNode<FunctionPassCtor> *getNext()
-                                          const { return Next; }
-  MachinePassRegistryNode<FunctionPassCtor> **getNextAddress()
-                                                { return &Next; }
+  MachinePassRegistryNode *getNext()      const { return Next; }
+  MachinePassRegistryNode **getNextAddress()    { return &Next; }
   const char *getName()                   const { return Name; }
   const char *getDescription()            const { return Description; }
-  FunctionPassCtor getCtor()              const { return Ctor; }
-  void setNext(MachinePassRegistryNode<FunctionPassCtor> *N) { Next = N; }
+  MachinePassCtor getCtor()               const { return Ctor; }
+  void setNext(MachinePassRegistryNode *N)      { Next = N; }
   
 };
 
@@ -82,14 +81,12 @@ public:
 /// MachinePassRegistry - Track the registration of machine passes.
 ///
 //===----------------------------------------------------------------------===//
-template<typename FunctionPassCtor>
 class MachinePassRegistry {
 
 private:
 
-  MachinePassRegistryNode<FunctionPassCtor> *List;
-                                        // List of registry nodes.
-  FunctionPassCtor Default;             // Default function pass creator.
+  MachinePassRegistryNode *List;        // List of registry nodes.
+  MachinePassCtor Default;              // Default function pass creator.
   MachinePassRegistryListener* Listener;// Listener for list adds are removes.
   
 public:
@@ -99,171 +96,22 @@ public:
 
   // Accessors.
   //
-  MachinePassRegistryNode<FunctionPassCtor> *getList()  { return List; }
-  FunctionPassCtor getDefault()                         { return Default; }
-  void setDefault(FunctionPassCtor C)                   { Default = C; }
+  MachinePassRegistryNode *getList()                    { return List; }
+  MachinePassCtor getDefault()                          { return Default; }
+  void setDefault(MachinePassCtor C)                    { Default = C; }
   void setListener(MachinePassRegistryListener *L)      { Listener = L; }
 
   /// Add - Adds a function pass to the registration list.
   ///
- void Add(MachinePassRegistryNode<FunctionPassCtor> *Node) {
-    Node->setNext(List);
-    List = Node;
-    if (Listener) Listener->NotifyAdd(Node->getName(), Node->getDescription());
-  }
-
+  void Add(MachinePassRegistryNode *Node);
 
   /// Remove - Removes a function pass from the registration list.
   ///
-  void Remove(MachinePassRegistryNode<FunctionPassCtor> *Node) {
-    for (MachinePassRegistryNode<FunctionPassCtor> **I = &List;
-         *I; I = (*I)->getNextAddress()) {
-      if (*I == Node) {
-        if (Listener) Listener->NotifyRemove(Node->getName(),
-                                             Node->getDescription());
-        *I = (*I)->getNext();
-        break;
-      }
-    }
-  }
-
-
-  /// FInd - Finds and returns a function pass in registration list, otherwise
-  /// returns NULL.
-  MachinePassRegistryNode<FunctionPassCtor> *Find(const char *Name) {
-    for (MachinePassRegistryNode<FunctionPassCtor> *I = List;
-         I; I = I->getNext()) {
-      if (std::string(Name) == std::string(I->getName())) return I;
-    }
-    return NULL;
-  }
-
+  void Remove(MachinePassRegistryNode *Node);
 
 };
 
 
-//===----------------------------------------------------------------------===//
-///
-/// RegisterRegAlloc class - Track the registration of register allocators.
-///
-//===----------------------------------------------------------------------===//
-class RegisterRegAlloc : public MachinePassRegistryNode<FunctionPass *(*)()> {
-
-public:
-
-  typedef FunctionPass *(*FunctionPassCtor)();
-
-  static MachinePassRegistry<FunctionPassCtor> Registry;
-
-  RegisterRegAlloc(const char *N, const char *D, FunctionPassCtor C)
-  : MachinePassRegistryNode<FunctionPassCtor>(N, D, C)
-  { Registry.Add(this); }
-  ~RegisterRegAlloc() { Registry.Remove(this); }
-  
-
-  // Accessors.
-  //
-  RegisterRegAlloc *getNext() const {
-    return (RegisterRegAlloc *)
-           MachinePassRegistryNode<FunctionPassCtor>::getNext();
-  }
-  static RegisterRegAlloc *getList() {
-    return (RegisterRegAlloc *)Registry.getList();
-  }
-  static FunctionPassCtor getDefault() {
-    return Registry.getDefault();
-  }
-  static void setDefault(FunctionPassCtor C) {
-    Registry.setDefault(C);
-  }
-  static void setListener(MachinePassRegistryListener *L) {
-    Registry.setListener(L);
-  }
-
-
-  /// FirstCtor - Finds the first register allocator in registration
-  /// list and returns its creator function, otherwise return NULL.
-  static FunctionPassCtor FirstCtor() {
-    MachinePassRegistryNode<FunctionPassCtor> *Node = Registry.getList();
-    return Node ? Node->getCtor() : NULL;
-  }
-  
-  /// FindCtor - Finds a register allocator in registration list and returns
-  /// its creator function, otherwise return NULL.
-  static FunctionPassCtor FindCtor(const char *N) {
-    MachinePassRegistryNode<FunctionPassCtor> *Node = Registry.Find(N);
-    return Node ? Node->getCtor() : NULL;
-  }
-  
-};
-
-
-//===----------------------------------------------------------------------===//
-///
-/// RegisterScheduler class - Track the registration of instruction schedulers.
-///
-//===----------------------------------------------------------------------===//
-
-class SelectionDAGISel;
-class ScheduleDAG;
-class SelectionDAG;
-class MachineBasicBlock;
-
-class RegisterScheduler : public
-  MachinePassRegistryNode<
-       ScheduleDAG *(*)(SelectionDAGISel*, SelectionDAG*, MachineBasicBlock*)> {
-
-public:
-
-  typedef ScheduleDAG *(*FunctionPassCtor)(SelectionDAGISel*, SelectionDAG*,
-                                           MachineBasicBlock*);
-
-  static MachinePassRegistry<FunctionPassCtor> Registry;
-
-  RegisterScheduler(const char *N, const char *D, FunctionPassCtor C)
-  : MachinePassRegistryNode<FunctionPassCtor>(N, D, C)
-  { Registry.Add(this); }
-  ~RegisterScheduler() { Registry.Remove(this); }
-
-
-  // Accessors.
-  //
-  RegisterScheduler *getNext() const {
-    return (RegisterScheduler *)
-           MachinePassRegistryNode<FunctionPassCtor>::getNext();
-  }
-  static RegisterScheduler *getList() {
-    return (RegisterScheduler *)Registry.getList();
-  }
-  static FunctionPassCtor getDefault() {
-    return Registry.getDefault();
-  }
-  static void setDefault(FunctionPassCtor C) {
-    Registry.setDefault(C);
-  }
-  static void setListener(MachinePassRegistryListener *L) {
-    Registry.setListener(L);
-  }
-
-
-  /// FirstCtor - Finds the first instruction scheduler in registration
-  /// list and returns its creator function, otherwise return NULL.
-  static FunctionPassCtor FirstCtor() {
-    MachinePassRegistryNode<FunctionPassCtor> *Node = Registry.getList();
-    return Node ? Node->getCtor() : NULL;
-  }
-  
-  
-  /// FindCtor - Finds a instruction scheduler in registration list and returns
-  /// its creator function, otherwise return NULL.
-  static FunctionPassCtor FindCtor(const char *N) {
-    MachinePassRegistryNode<FunctionPassCtor> *Node = Registry.Find(N);
-    return Node ? Node->getCtor() : NULL;
-  }
-  
-};
-
-
 //===----------------------------------------------------------------------===//
 ///
 /// RegisterPassParser class - Handle the addition of new machine passes.
@@ -271,19 +119,20 @@ public:
 //===----------------------------------------------------------------------===//
 template<class RegistryClass>
 class RegisterPassParser : public MachinePassRegistryListener,
-                           public cl::parser<const char *> {
+                   public cl::parser<typename RegistryClass::FunctionPassCtor> {
 public:
   RegisterPassParser() {}
   ~RegisterPassParser() { RegistryClass::setListener(NULL); }
 
   void initialize(cl::Option &O) {
-    cl::parser<const char *>::initialize(O);
+    cl::parser<typename RegistryClass::FunctionPassCtor>::initialize(O);
     
     // Add existing passes to option.
     for (RegistryClass *Node = RegistryClass::getList();
          Node; Node = Node->getNext()) {
-      addLiteralOption(Node->getName(), Node->getName(),
-                       Node->getDescription());
+      addLiteralOption(Node->getName(),
+                      (typename RegistryClass::FunctionPassCtor)Node->getCtor(),
+                      Node->getDescription());
     }
     
     // Make sure we listen for list changes.
@@ -292,25 +141,13 @@ public:
 
   // Implement the MachinePassRegistryListener callbacks.
   //
-  virtual void NotifyAdd(const char *N, const char *D) {
-    addLiteralOption(N, N, D);
+  virtual void NotifyAdd(const char *N,
+                         MachinePassCtor C,
+                         const char *D) {
+    this->addLiteralOption(N, (typename RegistryClass::FunctionPassCtor)C, D);
   }
-  virtual void NotifyRemove(const char *N, const char *D) {
-    removeLiteralOption(N);
-  }
-
-  // ValLessThan - Provide a sorting comparator for Values elements...
-  typedef std::pair<const char*, std::pair<const char*, const char*> > ValType;
-  static bool ValLessThan(const ValType &VT1, const ValType &VT2) {
-    return std::string(VT1.first) < std::string(VT2.first);
-  }
-
-  // printOptionInfo - Print out information about this option.  Override the
-  // default implementation to sort the table before we print...
-  virtual void printOptionInfo(const cl::Option &O, unsigned GlobalWidth) const{
-    RegisterPassParser *PNP = const_cast<RegisterPassParser*>(this);
-    std::sort(PNP->Values.begin(), PNP->Values.end(), ValLessThan);
-    cl::parser<const char *>::printOptionInfo(O, GlobalWidth);
+  virtual void NotifyRemove(const char *N) {
+    this->removeLiteralOption(N);
   }
 };
 
diff --git a/lib/CodeGen/MachinePassRegistry.cpp b/lib/CodeGen/MachinePassRegistry.cpp
index c4409924760..a7ba5bb3ca3 100644
--- a/lib/CodeGen/MachinePassRegistry.cpp
+++ b/lib/CodeGen/MachinePassRegistry.cpp
@@ -16,20 +16,26 @@
 
 using namespace llvm;
 
-  
-//===---------------------------------------------------------------------===//
-///
-/// RegisterRegAlloc class - Track the registration of register allocators.
+
+/// Add - Adds a function pass to the registration list.
 ///
-//===---------------------------------------------------------------------===//
-MachinePassRegistry<RegisterRegAlloc::FunctionPassCtor>
-RegisterRegAlloc::Registry;
+void MachinePassRegistry::Add(MachinePassRegistryNode *Node) {
+  Node->setNext(List);
+  List = Node;
+  if (Listener) Listener->NotifyAdd(Node->getName(),
+                                    Node->getCtor(),
+                                    Node->getDescription());
+}
 
 
-//===---------------------------------------------------------------------===//
-///
-/// RegisterScheduler class - Track the registration of instruction schedulers.
+/// Remove - Removes a function pass from the registration list.
 ///
-//===---------------------------------------------------------------------===//
-MachinePassRegistry<RegisterScheduler::FunctionPassCtor>
-RegisterScheduler::Registry;
+void MachinePassRegistry::Remove(MachinePassRegistryNode *Node) {
+  for (MachinePassRegistryNode **I = &List; *I; I = (*I)->getNextAddress()) {
+    if (*I == Node) {
+      if (Listener) Listener->NotifyRemove(Node->getName());
+      *I = (*I)->getNext();
+      break;
+    }
+  }
+}
diff --git a/lib/CodeGen/Passes.cpp b/lib/CodeGen/Passes.cpp
index a896f83526e..4344612f3a6 100644
--- a/lib/CodeGen/Passes.cpp
+++ b/lib/CodeGen/Passes.cpp
@@ -12,31 +12,46 @@
 //
 //===---------------------------------------------------------------------===//
 
-#include "llvm/CodeGen/MachinePassRegistry.h"
+#include "llvm/CodeGen/RegAllocRegistry.h"
 #include "llvm/CodeGen/Passes.h"
-#include "llvm/Support/CommandLine.h"
 #include <iostream>
 
 using namespace llvm;
 
+//===---------------------------------------------------------------------===//
+///
+/// RegisterRegAlloc class - Track the registration of register allocators.
+///
+//===---------------------------------------------------------------------===//
+MachinePassRegistry RegisterRegAlloc::Registry;
+
+
+//===---------------------------------------------------------------------===//
+///
+/// RegAlloc command line options.
+///
+//===---------------------------------------------------------------------===//
 namespace {
-  cl::opt<const char *, false, RegisterPassParser<RegisterRegAlloc> >
+  cl::opt<RegisterRegAlloc::FunctionPassCtor, false,
+          RegisterPassParser<RegisterRegAlloc> >
   RegAlloc("regalloc",
-           cl::init("linearscan"),
+           cl::init(createLinearScanRegisterAllocator),
            cl::desc("Register allocator to use: (default = linearscan)")); 
 }
 
+
+//===---------------------------------------------------------------------===//
+///
+/// createRegisterAllocator - choose the appropriate register allocator.
+///
+//===---------------------------------------------------------------------===//
 FunctionPass *llvm::createRegisterAllocator() {
   RegisterRegAlloc::FunctionPassCtor Ctor = RegisterRegAlloc::getDefault();
   
   if (!Ctor) {
-    Ctor = RegisterRegAlloc::FindCtor(RegAlloc);
-    assert(Ctor && "No register allocator found");
-    if (!Ctor) Ctor = RegisterRegAlloc::FirstCtor();
-    RegisterRegAlloc::setDefault(Ctor);
+    Ctor = RegAlloc;
+    RegisterRegAlloc::setDefault(RegAlloc);
   }
   
-  assert(Ctor && "No register allocator found");
-  
   return Ctor();
 }
diff --git a/lib/CodeGen/RegAllocLinearScan.cpp b/lib/CodeGen/RegAllocLinearScan.cpp
index 5463e4e4b69..b9ae8ac5a73 100644
--- a/lib/CodeGen/RegAllocLinearScan.cpp
+++ b/lib/CodeGen/RegAllocLinearScan.cpp
@@ -18,8 +18,8 @@
 #include "llvm/Function.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineInstr.h"
-#include "llvm/CodeGen/MachinePassRegistry.h"
 #include "llvm/CodeGen/Passes.h"
+#include "llvm/CodeGen/RegAllocRegistry.h"
 #include "llvm/CodeGen/SSARegMap.h"
 #include "llvm/Target/MRegisterInfo.h"
 #include "llvm/Target/TargetMachine.h"
diff --git a/lib/CodeGen/RegAllocLocal.cpp b/lib/CodeGen/RegAllocLocal.cpp
index 69b944c7094..9148d002474 100644
--- a/lib/CodeGen/RegAllocLocal.cpp
+++ b/lib/CodeGen/RegAllocLocal.cpp
@@ -18,8 +18,8 @@
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/SSARegMap.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
-#include "llvm/CodeGen/MachinePassRegistry.h"
 #include "llvm/CodeGen/LiveVariables.h"
+#include "llvm/CodeGen/RegAllocRegistry.h"
 #include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Support/CommandLine.h"
diff --git a/lib/CodeGen/RegAllocSimple.cpp b/lib/CodeGen/RegAllocSimple.cpp
index bd20cd04c58..e807992201d 100644
--- a/lib/CodeGen/RegAllocSimple.cpp
+++ b/lib/CodeGen/RegAllocSimple.cpp
@@ -20,7 +20,7 @@
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/SSARegMap.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
-#include "llvm/CodeGen/MachinePassRegistry.h"
+#include "llvm/CodeGen/RegAllocRegistry.h"
 #include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Support/Debug.h"
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
index 8b82197b75f..aa62bd49fce 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
@@ -19,8 +19,8 @@
 //===----------------------------------------------------------------------===//
 
 #define DEBUG_TYPE "sched"
-#include "llvm/CodeGen/MachinePassRegistry.h"
 #include "llvm/CodeGen/ScheduleDAG.h"
+#include "llvm/CodeGen/SchedulerRegistry.h"
 #include "llvm/CodeGen/SelectionDAGISel.h"
 #include "llvm/CodeGen/SSARegMap.h"
 #include "llvm/Target/MRegisterInfo.h"
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
index 6e7ef2e2511..5d7fa5fad16 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
@@ -16,8 +16,8 @@
 //===----------------------------------------------------------------------===//
 
 #define DEBUG_TYPE "sched"
-#include "llvm/CodeGen/MachinePassRegistry.h"
 #include "llvm/CodeGen/ScheduleDAG.h"
+#include "llvm/CodeGen/SchedulerRegistry.h"
 #include "llvm/CodeGen/SSARegMap.h"
 #include "llvm/Target/MRegisterInfo.h"
 #include "llvm/Target/TargetData.h"
diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp
index 2b8a754a061..b4c4c3245dd 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp
@@ -14,8 +14,8 @@
 //===----------------------------------------------------------------------===//
 
 #define DEBUG_TYPE "sched"
-#include "llvm/CodeGen/MachinePassRegistry.h"
 #include "llvm/CodeGen/ScheduleDAG.h"
+#include "llvm/CodeGen/SchedulerRegistry.h"
 #include "llvm/CodeGen/SelectionDAG.h"
 #include "llvm/Target/TargetData.h"
 #include "llvm/Target/TargetMachine.h"
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
index 3a1af95e81c..c68251c230a 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
@@ -29,7 +29,7 @@
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/MachineJumpTableInfo.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
-#include "llvm/CodeGen/MachinePassRegistry.h"
+#include "llvm/CodeGen/SchedulerRegistry.h"
 #include "llvm/CodeGen/SelectionDAG.h"
 #include "llvm/CodeGen/SSARegMap.h"
 #include "llvm/Target/MRegisterInfo.h"
@@ -40,7 +40,6 @@
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/Target/TargetOptions.h"
 #include "llvm/Transforms/Utils/BasicBlockUtils.h"
-#include "llvm/Support/CommandLine.h"
 #include "llvm/Support/MathExtras.h"
 #include "llvm/Support/Debug.h"
 #include "llvm/Support/Visibility.h"
@@ -61,10 +60,24 @@ ViewSchedDAGs("view-sched-dags", cl::Hidden,
 static const bool ViewISelDAGs = 0, ViewSchedDAGs = 0;
 #endif
 
+
+//===---------------------------------------------------------------------===//
+///
+/// RegisterScheduler class - Track the registration of instruction schedulers.
+///
+//===---------------------------------------------------------------------===//
+MachinePassRegistry RegisterScheduler::Registry;
+
+//===---------------------------------------------------------------------===//
+///
+/// ISHeuristic command line option for instruction schedulers.
+///
+//===---------------------------------------------------------------------===//
 namespace {
-  cl::opt<const char *, false, RegisterPassParser<RegisterScheduler> >
+  cl::opt<RegisterScheduler::FunctionPassCtor, false,
+          RegisterPassParser<RegisterScheduler> >
   ISHeuristic("sched",
-              cl::init("default"),
+              cl::init(createDefaultScheduler),
               cl::desc("Instruction schedulers available:"));
 
   static RegisterScheduler
@@ -3629,15 +3642,13 @@ void SelectionDAGISel::SelectBasicBlock(BasicBlock *LLVMBB, MachineFunction &MF,
 void SelectionDAGISel::ScheduleAndEmitDAG(SelectionDAG &DAG) {
   if (ViewSchedDAGs) DAG.viewGraph();
 
-  static RegisterScheduler::FunctionPassCtor Ctor =
-                                                RegisterScheduler::getDefault();
+  RegisterScheduler::FunctionPassCtor Ctor = RegisterScheduler::getDefault();
   
   if (!Ctor) {
-    Ctor = RegisterScheduler::FindCtor(ISHeuristic);
+    Ctor = ISHeuristic;
     RegisterScheduler::setDefault(Ctor);
   }
   
-  assert(Ctor && "No instruction scheduler found");
   ScheduleDAG *SL = Ctor(this, &DAG, BB);
   BB = SL->Run();
   delete SL;