From: Chris Lattner <sabre@nondot.org>
Date: Tue, 10 Apr 2007 03:48:29 +0000 (+0000)
Subject: restore support for negative strides
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=eb13d1b710c385437f30f944de44a5b7053069f3;p=oota-llvm.git

restore support for negative strides


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35859 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index a4e6d64b7c7..6cefec9de31 100644
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -1372,6 +1372,7 @@ bool ARMTargetLowering::isLegalAddressingMode(const AddrMode &AM,
       return false;
 
   default:
+    int Scale = AM.Scale;
     switch (getValueType(Ty)) {
     default: return false;
     case MVT::i1:
@@ -1381,14 +1382,15 @@ bool ARMTargetLowering::isLegalAddressingMode(const AddrMode &AM,
       // This assumes i64 is legalized to a pair of i32. If not (i.e.
       // ldrd / strd are used, then its address mode is same as i16.
       // r + r
-      if (AM.Scale == 1)
+      if (Scale < 0) Scale = -Scale;
+      if (Scale == 1)
         return true;
       // r + r << imm
-      if (!isPowerOf2_32(AM.Scale & ~1))
+      if (!isPowerOf2_32(Scale & ~1))
         return false;
     case MVT::i16:
       // r + r
-      if (((unsigned)AM.HasBaseReg + AM.Scale) <= 2)
+      if (((unsigned)AM.HasBaseReg + Scale) <= 2)
         return true;
 
     case MVT::isVoid: