From: Evan Cheng Date: Tue, 5 Aug 2008 22:19:15 +0000 (+0000) Subject: Fix PR2620: Fix X86cmppd selection code so it expects operands to be v2f64. X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=e9d503583804b63bdd815e8fdbc2f6cf627e973f;p=oota-llvm.git Fix PR2620: Fix X86cmppd selection code so it expects operands to be v2f64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54376 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index da1bd93295e..57ed8b3122d 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -4770,8 +4770,9 @@ SDValue X86TargetLowering::LowerVSETCC(SDValue Op, SelectionDAG &DAG) { if (isFP) { unsigned SSECC = 8; - unsigned Opc = Op0.getValueType() == MVT::v4f32 ? X86ISD::CMPPS : - X86ISD::CMPPD; + MVT VT0 = Op0.getValueType(); + assert(VT0 == MVT::v4f32 || VT0 == MVT::v2f64); + unsigned Opc = VT0 == MVT::v4f32 ? X86ISD::CMPPS : X86ISD::CMPPD; bool Swap = false; switch (SetCCOpcode) { diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index 7b5974ff149..856525e462a 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -1721,9 +1721,9 @@ let Constraints = "$src1 = $dst" in { [(set VR128:$dst, (int_x86_sse2_cmp_pd VR128:$src1, (memop addr:$src), imm:$cc))]>; } -def : Pat<(v2i64 (X86cmppd VR128:$src1, VR128:$src2, imm:$cc)), +def : Pat<(v2i64 (X86cmppd (v2f64 VR128:$src1), VR128:$src2, imm:$cc)), (CMPPDrri VR128:$src1, VR128:$src2, imm:$cc)>; -def : Pat<(v2i64 (X86cmppd VR128:$src1, (memop addr:$src2), imm:$cc)), +def : Pat<(v2i64 (X86cmppd (v2f64 VR128:$src1), (memop addr:$src2), imm:$cc)), (CMPPDrmi VR128:$src1, addr:$src2, imm:$cc)>; // Shuffle and unpack instructions diff --git a/test/CodeGen/X86/vfcmp.ll b/test/CodeGen/X86/vfcmp.ll new file mode 100644 index 00000000000..85b82a0ac8e --- /dev/null +++ b/test/CodeGen/X86/vfcmp.ll @@ -0,0 +1,13 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 +; PR2620 + +define void @t(i32 %m_task_id, i32 %start_x, i32 %end_x) nounwind { + vfcmp olt <2 x double> zeroinitializer, zeroinitializer ; <<2 x i64>>:1 [#uses=1] + extractelement <2 x i64> %1, i32 1 ; :2 [#uses=1] + lshr i64 %2, 63 ; :3 [#uses=1] + trunc i64 %3 to i1 ; :4 [#uses=1] + zext i1 %4 to i8 ; :5 [#uses=1] + insertelement <2 x i8> zeroinitializer, i8 %5, i32 1 ; <<2 x i8>>:6 [#uses=1] + store <2 x i8> %6, <2 x i8>* null + ret void +}