From: ywj Date: Sat, 20 Jul 2013 07:40:09 +0000 (+0800) Subject: factoryToolV4.0 support on rk3168,lcd,bL,codec,tp,usbwifi,battery control by parameter X-Git-Tag: firefly_0821_release~6859 X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=e5e0500fb3125d729ec629d4b70901c7ab0e2a8e;p=firefly-linux-kernel-4.4.55.git factoryToolV4.0 support on rk3168,lcd,bL,codec,tp,usbwifi,battery control by parameter --- diff --git a/arch/arm/configs/rk3168_rk616_86v_fac_defconfig b/arch/arm/configs/rk3168_rk616_86v_fac_defconfig new file mode 100644 index 000000000000..c95b29f3b1dd --- /dev/null +++ b/arch/arm/configs/rk3168_rk616_86v_fac_defconfig @@ -0,0 +1,444 @@ +CONFIG_EXPERIMENTAL=y +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_KERNEL_LZO=y +CONFIG_LOG_BUF_SHIFT=19 +CONFIG_CGROUPS=y +CONFIG_CGROUP_DEBUG=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_RESOURCE_COUNTERS=y +CONFIG_CGROUP_SCHED=y +CONFIG_RT_GROUP_SCHED=y +CONFIG_BLK_DEV_INITRD=y +CONFIG_PANIC_TIMEOUT=1 +# CONFIG_SYSCTL_SYSCALL is not set +# CONFIG_ELF_CORE is not set +CONFIG_ASHMEM=y +# CONFIG_AIO is not set +CONFIG_EMBEDDED=y +# CONFIG_SLUB_DEBUG is not set +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_ARCH_RK30=y +CONFIG_DDR_INIT_CHANGE_FREQ=y +CONFIG_DDR_SDRAM_FREQ=300 +# CONFIG_DDR_TEST is not set +CONFIG_CLK_SWITCH_TO_32K=y +CONFIG_SOC_RK3168=y +CONFIG_MACH_RK_FAC=y +CONFIG_FIQ_DEBUGGER=y +CONFIG_FIQ_DEBUGGER_NO_SLEEP=y +CONFIG_FIQ_DEBUGGER_CONSOLE=y +CONFIG_FIQ_DEBUGGER_CONSOLE_DEFAULT_ENABLE=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_SMP=y +# CONFIG_SMP_ON_UP is not set +CONFIG_NR_CPUS=2 +CONFIG_PREEMPT=y +CONFIG_AEABI=y +# CONFIG_OABI_COMPAT is not set +CONFIG_HIGHMEM=y +CONFIG_COMPACTION=y +CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 +CONFIG_ZBOOT_ROM_TEXT=0x0 +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_CMDLINE="console=ttyFIQ0 androidboot.console=ttyFIQ0 init=/init" +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_IDLE=y +CONFIG_VFP=y +CONFIG_NEON=y +CONFIG_WAKELOCK=y +CONFIG_PM_RUNTIME=y +CONFIG_PM_DEBUG=y +CONFIG_SUSPEND_TIME=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_XFRM_USER=y +CONFIG_NET_KEY=y +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_IP_MULTIPLE_TABLES=y +CONFIG_INET_ESP=y +# CONFIG_INET_XFRM_MODE_BEET is not set +# CONFIG_INET_LRO is not set +CONFIG_IPV6=y +CONFIG_IPV6_PRIVACY=y +CONFIG_IPV6_ROUTER_PREF=y +CONFIG_IPV6_OPTIMISTIC_DAD=y +CONFIG_INET6_AH=y +CONFIG_INET6_ESP=y +CONFIG_INET6_IPCOMP=y +CONFIG_IPV6_MIP6=y +CONFIG_IPV6_TUNNEL=y +CONFIG_IPV6_MULTIPLE_TABLES=y +CONFIG_NETFILTER=y +# CONFIG_BRIDGE_NETFILTER is not set +CONFIG_NF_CONNTRACK=y +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_CT_PROTO_DCCP=y +CONFIG_NF_CT_PROTO_SCTP=y +CONFIG_NF_CT_PROTO_UDPLITE=y +CONFIG_NF_CONNTRACK_AMANDA=y +CONFIG_NF_CONNTRACK_FTP=y +CONFIG_NF_CONNTRACK_H323=y +CONFIG_NF_CONNTRACK_IRC=y +CONFIG_NF_CONNTRACK_NETBIOS_NS=y +CONFIG_NF_CONNTRACK_PPTP=y +CONFIG_NF_CONNTRACK_SANE=y +CONFIG_NF_CONNTRACK_SIP=y +CONFIG_NF_CONNTRACK_TFTP=y +CONFIG_NF_CT_NETLINK=y +CONFIG_NETFILTER_TPROXY=y +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=y +CONFIG_NETFILTER_XT_TARGET_CONNMARK=y +CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y +CONFIG_NETFILTER_XT_TARGET_MARK=y +CONFIG_NETFILTER_XT_TARGET_NFLOG=y +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=y +CONFIG_NETFILTER_XT_TARGET_TPROXY=y +CONFIG_NETFILTER_XT_TARGET_TRACE=y +CONFIG_NETFILTER_XT_MATCH_COMMENT=y +CONFIG_NETFILTER_XT_MATCH_CONNBYTES=y +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=y +CONFIG_NETFILTER_XT_MATCH_CONNMARK=y +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=y +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y +CONFIG_NETFILTER_XT_MATCH_HELPER=y +CONFIG_NETFILTER_XT_MATCH_IPRANGE=y +CONFIG_NETFILTER_XT_MATCH_LENGTH=y +CONFIG_NETFILTER_XT_MATCH_LIMIT=y +CONFIG_NETFILTER_XT_MATCH_MAC=y +CONFIG_NETFILTER_XT_MATCH_MARK=y +CONFIG_NETFILTER_XT_MATCH_POLICY=y +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y +CONFIG_NETFILTER_XT_MATCH_QTAGUID=y +CONFIG_NETFILTER_XT_MATCH_QUOTA=y +CONFIG_NETFILTER_XT_MATCH_QUOTA2=y +CONFIG_NETFILTER_XT_MATCH_QUOTA2_LOG=y +CONFIG_NETFILTER_XT_MATCH_SOCKET=y +CONFIG_NETFILTER_XT_MATCH_STATE=y +CONFIG_NETFILTER_XT_MATCH_STATISTIC=y +CONFIG_NETFILTER_XT_MATCH_STRING=y +CONFIG_NETFILTER_XT_MATCH_TIME=y +CONFIG_NETFILTER_XT_MATCH_U32=y +CONFIG_NF_CONNTRACK_IPV4=y +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_MATCH_AH=y +CONFIG_IP_NF_MATCH_ECN=y +CONFIG_IP_NF_MATCH_TTL=y +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_TARGET_REJECT=y +CONFIG_IP_NF_TARGET_REJECT_SKERR=y +CONFIG_IP_NF_TARGET_LOG=y +CONFIG_NF_NAT=y +CONFIG_IP_NF_TARGET_MASQUERADE=y +CONFIG_IP_NF_TARGET_NETMAP=y +CONFIG_IP_NF_TARGET_REDIRECT=y +CONFIG_IP_NF_MANGLE=y +CONFIG_IP_NF_RAW=y +CONFIG_IP_NF_ARPTABLES=y +CONFIG_IP_NF_ARPFILTER=y +CONFIG_IP_NF_ARP_MANGLE=y +CONFIG_NF_CONNTRACK_IPV6=y +CONFIG_IP6_NF_IPTABLES=y +CONFIG_IP6_NF_TARGET_LOG=y +CONFIG_IP6_NF_FILTER=y +CONFIG_IP6_NF_TARGET_REJECT=y +CONFIG_IP6_NF_TARGET_REJECT_SKERR=y +CONFIG_IP6_NF_MANGLE=y +CONFIG_IP6_NF_RAW=y +CONFIG_BRIDGE=y +# CONFIG_BRIDGE_IGMP_SNOOPING is not set +CONFIG_PHONET=y +CONFIG_NET_SCHED=y +CONFIG_NET_SCH_HTB=y +CONFIG_NET_SCH_INGRESS=y +CONFIG_NET_CLS_U32=y +CONFIG_NET_EMATCH=y +CONFIG_NET_EMATCH_U32=y +CONFIG_NET_CLS_ACT=y +CONFIG_NET_ACT_POLICE=y +CONFIG_NET_ACT_GACT=y +CONFIG_NET_ACT_MIRRED=y +CONFIG_BT=y +CONFIG_BT_L2CAP=y +CONFIG_BT_SCO=y +CONFIG_BT_RFCOMM=y +CONFIG_BT_RFCOMM_TTY=y +CONFIG_BT_BNEP=y +CONFIG_BT_HIDP=y +CONFIG_BT_HCIUART=y +CONFIG_BT_HCIUART_H4=y +CONFIG_BT_HCIUART_LL=y +CONFIG_BT_HCIBCM4325=y +CONFIG_BT_AUTOSLEEP=y +CONFIG_CFG80211=y +CONFIG_MAC80211=y +CONFIG_RFKILL=y +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +# CONFIG_FIRMWARE_IN_KERNEL is not set +CONFIG_MTD=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_CHAR=y +CONFIG_MTD_BLOCK=y +CONFIG_MTD_NAND_IDS=y +CONFIG_MTD_RKNAND=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_MISC_DEVICES=y +CONFIG_UID_STAT=y +CONFIG_APANIC=y +CONFIG_SCSI=y +CONFIG_BLK_DEV_SD=y +CONFIG_SCSI_MULTI_LUN=y +CONFIG_MD=y +CONFIG_BLK_DEV_DM=y +CONFIG_DM_CRYPT=y +CONFIG_DM_UEVENT=y +CONFIG_NETDEVICES=y +CONFIG_PHYLIB=y +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETDEV_10000 is not set +CONFIG_WLAN_80211=y +CONFIG_RTL8188EU=y +CONFIG_USB_USBNET=y +CONFIG_PPP=y +CONFIG_PPP_MULTILINK=y +CONFIG_PPP_FILTER=y +CONFIG_PPP_ASYNC=y +CONFIG_PPP_SYNC_TTY=y +CONFIG_PPP_DEFLATE=y +CONFIG_PPP_BSDCOMP=y +CONFIG_PPP_MPPE=y +CONFIG_PPPOLAC=y +CONFIG_PPPOPNS=y +# CONFIG_INPUT_MOUSEDEV is not set +CONFIG_INPUT_EVDEV=y +CONFIG_INPUT_KEYRESET=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_INPUT_MOUSE is not set +CONFIG_INPUT_JOYSTICK=y +CONFIG_JOYSTICK_XPAD=y +CONFIG_JOYSTICK_XPAD_FF=y +CONFIG_JOYSTICK_XPAD_LEDS=y +CONFIG_INPUT_TABLET=y +CONFIG_TABLET_USB_ACECAD=y +CONFIG_TABLET_USB_AIPTEK=y +CONFIG_TABLET_USB_GTCO=y +CONFIG_TABLET_USB_HANWANG=y +CONFIG_TABLET_USB_KBTAB=y +CONFIG_TABLET_USB_WACOM=y +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_GSLX680_RK3168=y +CONFIG_TOUCHSCREEN_GT811_IIC=y +CONFIG_INPUT_MISC=y +CONFIG_INPUT_KEYCHORD=y +CONFIG_INPUT_UINPUT=y +CONFIG_GS_MMA7660=y +CONFIG_GS_LIS3DH=y +CONFIG_SENSOR_DEVICE=y +CONFIG_GSENSOR_DEVICE=y +CONFIG_GS_MXC6225=y +CONFIG_GS_DMT10=y +# CONFIG_SERIO is not set +# CONFIG_CONSOLE_TRANSLATIONS is not set +# CONFIG_LEGACY_PTYS is not set +CONFIG_SERIAL_RK29=y +CONFIG_UART0_RK29=y +CONFIG_UART0_DMA_RK29=2 +CONFIG_UART3_RK29=y +CONFIG_UART3_CTS_RTS_RK29=y +# CONFIG_HW_RANDOM is not set +CONFIG_I2C=y +# CONFIG_I2C_COMPAT is not set +CONFIG_I2C_CHARDEV=y +CONFIG_I2C0_CONTROLLER_RK30=y +CONFIG_I2C1_CONTROLLER_RK30=y +CONFIG_I2C2_CONTROLLER_RK30=y +CONFIG_I2C3_CONTROLLER_RK30=y +CONFIG_I2C4_CONTROLLER_RK30=y +CONFIG_GPIO_SYSFS=y +CONFIG_EXPANDED_GPIO_NUM=0 +CONFIG_EXPANDED_GPIO_IRQ_NUM=0 +CONFIG_SPI_FPGA_GPIO_NUM=0 +CONFIG_SPI_FPGA_GPIO_IRQ_NUM=0 +CONFIG_POWER_SUPPLY=y +CONFIG_BATTERY_RK30_ADC_FAC=y +CONFIG_BATTERY_RK30_AC_CHARGE=y +CONFIG_BATTERY_RK30_VOL3V8=y +CONFIG_POWER_ON_CHARGER_DISPLAY=y +# CONFIG_HWMON is not set +CONFIG_WATCHDOG=y +CONFIG_MFD_TPS65910=y +CONFIG_MFD_WM831X_I2C=y +CONFIG_MFD_RK616=y +CONFIG_RK616_USE_MCLK_12M=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_TPS65910=y +CONFIG_REGULATOR_WM831X=y +CONFIG_REGULATOR_ACT8846=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_VIDEO_DEV=y +CONFIG_SOC_CAMERA=y +CONFIG_SOC_CAMERA_GC0308=y +CONFIG_SOC_CAMERA_GC2035=y +CONFIG_VIDEO_RK29=y +CONFIG_VIDEO_RK29_CAMMEM_ION=y +CONFIG_ION=y +CONFIG_ION_ROCKCHIP=y +CONFIG_FB=y +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_LCD_CLASS_DEVICE is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +# CONFIG_BACKLIGHT_GENERIC is not set +CONFIG_DISPLAY_SUPPORT=y +CONFIG_FB_ROCKCHIP=y +CONFIG_ONE_LCDC_DUAL_OUTPUT_INF=y +CONFIG_LCDC_RK3066B=y +# CONFIG_LCDC0_RK3066B is not set +CONFIG_LCDC1_RK3066B=y +CONFIG_LCD_RK3168_FAC=y +CONFIG_RK_TRSM=y +CONFIG_RK616_LVDS=y +CONFIG_RK_HDMI=y +CONFIG_HDMI_RK616=y +CONFIG_HDMI_SOURCE_LCDC1=y +CONFIG_RGA_RK30=y +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +CONFIG_LOGO_LOWERPOWER_WARNING=y +CONFIG_SOUND=y +CONFIG_SND=y +# CONFIG_SND_SUPPORT_OLD_API is not set +# CONFIG_SND_VERBOSE_PROCFS is not set +# CONFIG_SND_DRIVERS is not set +# CONFIG_SND_ARM is not set +CONFIG_SND_SOC=y +CONFIG_SND_RK29_SOC=y +CONFIG_SND_I2S_DMA_EVENT_DYNAMIC=y +CONFIG_SND_RK_SOC_HDMI_SPDIF=y +CONFIG_SND_RK29_SOC_ES8323=y +CONFIG_SND_RK29_SOC_RT5631=y +CONFIG_SND_RK_SOC_RK616=y +CONFIG_SND_RK29_CODEC_SOC_SLAVE=y +CONFIG_UHID=y +CONFIG_HID_A4TECH=y +CONFIG_HID_ACRUX=y +CONFIG_HID_ACRUX_FF=y +CONFIG_HID_APPLE=y +CONFIG_HID_BELKIN=y +CONFIG_HID_CHERRY=y +CONFIG_HID_CHICONY=y +CONFIG_HID_CYPRESS=y +CONFIG_HID_DRAGONRISE=y +CONFIG_DRAGONRISE_FF=y +CONFIG_HID_EMS_FF=y +CONFIG_HID_EZKEY=y +CONFIG_HID_KEYTOUCH=y +CONFIG_HID_KYE=y +CONFIG_HID_UCLOGIC=y +CONFIG_HID_WALTOP=y +CONFIG_HID_GYRATION=y +CONFIG_HID_TWINHAN=y +CONFIG_HID_KENSINGTON=y +CONFIG_HID_LCPOWER=y +CONFIG_HID_LOGITECH=y +CONFIG_LOGITECH_FF=y +CONFIG_LOGIRUMBLEPAD2_FF=y +CONFIG_LOGIG940_FF=y +CONFIG_LOGIWII_FF=y +CONFIG_HID_MICROSOFT=y +CONFIG_HID_MONTEREY=y +CONFIG_HID_MULTITOUCH=y +CONFIG_HID_NTRIG=y +CONFIG_HID_ORTEK=y +CONFIG_HID_PANTHERLORD=y +CONFIG_PANTHERLORD_FF=y +CONFIG_HID_PETALYNX=y +CONFIG_HID_PICOLCD=y +CONFIG_HID_QUANTA=y +CONFIG_HID_ROCCAT_ARVO=y +CONFIG_HID_ROCCAT_KONE=y +CONFIG_HID_ROCCAT_KONEPLUS=y +CONFIG_HID_ROCCAT_KOVAPLUS=y +CONFIG_HID_ROCCAT_PYRA=y +CONFIG_HID_SAMSUNG=y +CONFIG_HID_SONY=y +CONFIG_HID_SUNPLUS=y +CONFIG_HID_GREENASIA=y +CONFIG_GREENASIA_FF=y +CONFIG_HID_SMARTJOYPLUS=y +CONFIG_SMARTJOYPLUS_FF=y +CONFIG_HID_TOPSEED=y +CONFIG_HID_THRUSTMASTER=y +CONFIG_THRUSTMASTER_FF=y +CONFIG_HID_ZEROPLUS=y +CONFIG_ZEROPLUS_FF=y +CONFIG_HID_ZYDACRON=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y +CONFIG_USB_DEVICEFS=y +CONFIG_USB_STORAGE=y +CONFIG_USB_SERIAL=y +CONFIG_USB_SERIAL_GENERIC=y +CONFIG_USB_SERIAL_OPTION=y +CONFIG_USB_GADGET=y +CONFIG_USB20_HOST=y +CONFIG_USB20_OTG=y +CONFIG_DWC_OTG_BOTH_HOST_SLAVE=y +CONFIG_MMC=y +CONFIG_MMC_UNSAFE_RESUME=y +CONFIG_MMC_EMBEDDED_SDIO=y +CONFIG_MMC_PARANOID_SD_INIT=y +CONFIG_SDMMC_RK29=y +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +CONFIG_LEDS_GPIO=y +CONFIG_SWITCH=y +CONFIG_SWITCH_GPIO=y +CONFIG_RTC_CLASS=y +CONFIG_AUTO_WAKE_UP=y +CONFIG_RTC_DRV_WM831X=y +CONFIG_TPS65910_RTC=y +CONFIG_STAGING=y +CONFIG_ANDROID=y +CONFIG_ANDROID_BINDER_IPC=y +CONFIG_ANDROID_LOGGER=y +CONFIG_ANDROID_TIMED_GPIO=y +CONFIG_ANDROID_LOW_MEMORY_KILLER=y +# CONFIG_CMMB is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_XATTR is not set +CONFIG_EXT4_FS=y +# CONFIG_EXT4_FS_XATTR is not set +# CONFIG_DNOTIFY is not set +CONFIG_FUSE_FS=y +CONFIG_VFAT_FS=y +CONFIG_TMPFS=y +# CONFIG_MISC_FILESYSTEMS is not set +# CONFIG_NETWORK_FILESYSTEMS is not set +CONFIG_PARTITION_ADVANCED=y +CONFIG_EFI_PARTITION=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_PRINTK_TIME=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_DEBUG_KERNEL=y +CONFIG_SCHEDSTATS=y +# CONFIG_DEBUG_PREEMPT is not set +# CONFIG_EVENT_POWER_TRACING_DEPRECATED is not set +CONFIG_ENABLE_DEFAULT_TRACERS=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_TWOFISH=y +# CONFIG_CRYPTO_ANSI_CPRNG is not set diff --git a/arch/arm/include/asm/setup.h b/arch/arm/include/asm/setup.h index 3f7ff7972e3c..7f440953bae7 100644 --- a/arch/arm/include/asm/setup.h +++ b/arch/arm/include/asm/setup.h @@ -16,7 +16,7 @@ #include -#ifdef CONFIG_RK_CONFIG +#if defined(CONFIG_RK_CONFIG)||defined(CONFIG_MACH_RK_FAC) #define COMMAND_LINE_SIZE 65536 #else #define COMMAND_LINE_SIZE 1024 diff --git a/arch/arm/mach-rk30/Kconfig b/arch/arm/mach-rk30/Kconfig index 68d97f73ebc3..cb7f6b34a116 100755 --- a/arch/arm/mach-rk30/Kconfig +++ b/arch/arm/mach-rk30/Kconfig @@ -152,6 +152,8 @@ config MACH_RK3168_86V config MACH_RK3168_86V_OLD bool "RK3168 86V Old Board" + config MACH_RK_FAC + bool "RK3168 Board for factory" endchoice choice diff --git a/arch/arm/mach-rk30/Makefile b/arch/arm/mach-rk30/Makefile index 4892ebb9db7c..a652e2c312e9 100755 --- a/arch/arm/mach-rk30/Makefile +++ b/arch/arm/mach-rk30/Makefile @@ -61,6 +61,7 @@ board-$(CONFIG_MACH_RK3168_LR097) += board-rk3168-LR097.o board-$(CONFIG_MACH_RK3168_DS1006H) += board-rk3168-ds1006h.o board-$(CONFIG_MACH_RK3168_86V) += board-rk3168-86v.o board-$(CONFIG_MACH_RK3168_86V_OLD) += board-rk3168-86v-old.o +board-$(CONFIG_MACH_RK_FAC) += board-rk3168-fac.o obj-$(CONFIG_SOC_RK3168M) += board.o board-$(CONFIG_MACH_RK3168M_TB) += board-rk3168m-tb.o diff --git a/arch/arm/mach-rk30/board-pmu-tps65910.c b/arch/arm/mach-rk30/board-pmu-tps65910.c index 480a769d69b7..0c72936aed12 100755 --- a/arch/arm/mach-rk30/board-pmu-tps65910.c +++ b/arch/arm/mach-rk30/board-pmu-tps65910.c @@ -321,7 +321,7 @@ static struct regulator_consumer_supply tps65910_smps2_supply[] = { { .supply = "vdd2", }, - #if defined(CONFIG_MACH_RK3168_86V) || defined(CONFIG_SOC_RK3028) + #if defined(CONFIG_MACH_RK3168_86V) || defined(CONFIG_SOC_RK3028)||defined(CONFIG_MACH_RK_FAC) { .supply = "vdd_cpu", }, diff --git a/arch/arm/mach-rk30/board-rk-fac-config.c b/arch/arm/mach-rk30/board-rk-fac-config.c new file mode 100644 index 000000000000..2f85784fe41e --- /dev/null +++ b/arch/arm/mach-rk30/board-rk-fac-config.c @@ -0,0 +1,239 @@ +#if 1 +#define CONFIG_ERR(v, name) do { printk("%s: Invalid parameter: %s(%d)\n", __func__, (name), (v)); } while(0) +#else +#define CONFIG_ERR(v, name) +#endif +#include + + +/* keyboard */ +uint key_adc = DEF_KEY_ADC; +module_param(key_adc, uint, 0644); +uint key_val_size = 6; +uint key_val[] = {DEF_PLAY_KEY, DEF_VOLDN_KEY, DEF_VOLUP_KEY, DEF_MENU_KEY, DEF_ESC_KEY, DEF_HOME_KEY}; +module_param_array(key_val, uint, &key_val_size, 0644); +static inline int check_key_param(void) +{ + return 0; +} + +/* backlight */ +static int bl_en = DEF_BL_EN; +module_param(bl_en, int, 0644); +static uint bl_pwmid = DEF_BL_PWMID; +module_param(bl_pwmid, uint, 0644); + +static uint bl_pwm_mode =DEF_BL_PWM_MOD; + +static uint bl_mode = DEF_BL_MOD; +module_param(bl_mode, uint, 0644); +static uint bl_div = DEF_BL_DIV; +module_param(bl_div, uint, 0644); +static uint bl_ref = DEF_BL_REF; +module_param(bl_ref, uint, 0644); +static uint bl_min = DEF_BL_MIN; +module_param(bl_min, uint, 0644); +static uint bl_max = DEF_BL_MAX; +module_param(bl_max, uint, 0644); + +static inline int check_bl_param(void){ + if(bl_pwmid < 0 || bl_pwmid > 3){ + CONFIG_ERR(bl_pwmid, "bl_pwm"); + return -EINVAL; + } + if(bl_ref != 0 && bl_ref != 1){ + CONFIG_ERR(bl_ref, "bl_ref"); + return -EINVAL; + } + if(bl_min < 0||bl_min > 255){ + CONFIG_ERR(bl_min, "bl_min"); + return -EINVAL; + } + if(bl_max < 0||bl_max > 255){ + CONFIG_ERR(bl_max, "bl_max"); + return -EINVAL; + } + + return 0; +} + +/* lcd */ +static int lcd_cs = DEF_LCD_CS; +module_param(lcd_cs, int, 0644); +static int lcd_en = DEF_LCD_EN; +module_param(lcd_en, int, 0644); +static int lcd_std = DEF_LCD_STD; +module_param(lcd_std, int, 0644); + +static inline int check_lcd_param(void) +{ + return 0; +} +uint lcd_param[LCD_PARAM_MAX] = DEF_LCD_PARAM; +module_param_array(lcd_param, uint, NULL, 0644); + + +/*codec*/ +int codec_type = DEF_CODEC_TYPE; +module_param(codec_type, int, 0644); +int codec_power = DEF_CODEC_POWER; +module_param(codec_power, int, 0644); +int codec_rst = DEF_CODEC_RST; +module_param(codec_rst, int, 0644); +int codec_hdmi_irq = DEF_CODEC_HDMI_IRQ; +module_param(codec_hdmi_irq, int, 0644); +static int spk_ctl = DEF_SPK_CTL; +module_param(spk_ctl, int, 0644); +static int hp_det = DEF_HP_DET; +module_param(hp_det, int, 0644); +static int codec_i2c = DEF_CODEC_I2C; // i2c channel +module_param(codec_i2c, int, 0644); +static int codec_addr = DEF_CODEC_ADDR; // i2c addr +module_param(codec_addr, int, 0644); +static inline int check_codec_param(void) +{ + return 0; +} + +/*tp*/ +static int tp_type = DEF_TP_TYPE; +module_param(tp_type, int, 0644); +static int tp_irq = DEF_TP_IRQ; +module_param(tp_irq, int, 0644); +static int tp_rst =DEF_TP_RST; +module_param(tp_rst, int, 0644); +static int tp_i2c = DEF_TP_I2C; // i2c channel +module_param(tp_i2c, int, 0644); +static int tp_addr = DEF_TP_ADDR; // i2c addr +module_param(tp_addr, int, 0644); +static int tp_xmax = DEF_X_MAX; +module_param(tp_xmax, int, 0644); +static int tp_ymax = DEF_Y_MAX; +module_param(tp_ymax, int, 0644); +static int tp_firmVer= DEF_FIRMVER; +module_param(tp_firmVer, int, 0644); +static inline int check_tp_param(void) +{ + int i; + + if(tp_type == TP_TYPE_NONE) + return 0; + if(tp_type < TP_TYPE_NONE || tp_type > TP_TYPE_MAX){ + CONFIG_ERR(tp_type, "tp_type"); + return -EINVAL; + } + if(tp_i2c < 0 || tp_i2c > 3){ + CONFIG_ERR(tp_i2c, "tp_i2c"); + return -EINVAL; + } + if(tp_addr < 0 || tp_addr > 0x7f){ + CONFIG_ERR(tp_addr, "tp_addr"); + return -EINVAL; + } + + if(tp_xmax < 0 || tp_xmax >1920){ + CONFIG_ERR(tp_xmax, "tp_xmax"); + return -EINVAL; + } + + if(tp_ymax < 0 || tp_ymax >1920){ + CONFIG_ERR(tp_ymax, "tp_ymax"); + return -EINVAL; + } + + return 0; +} + +/* gsensor */ +static int gs_type = DEF_GS_TYPE; +module_param(gs_type, int, 0644); +static int gs_irq = DEF_GS_IRQ; +module_param(gs_irq, int, 0644); +static int gs_i2c = DEF_GS_I2C; +module_param(gs_i2c, int, 0644); +static int gs_addr = DEF_GS_ADDR; +module_param(gs_addr, int, 0644); +static int gs_orig[9] = DEF_GS_ORIG; +module_param_array(gs_orig, int, NULL, 0644); +static inline int check_gs_param(void) +{ + int i; + if(gs_type == GS_TYPE_NONE) + return 0; + if(gs_type < GS_TYPE_NONE || gs_type > GS_TYPE_MAX){ + CONFIG_ERR(gs_type, "gs_type"); + return -EINVAL; + } + if(gs_i2c < 0 || gs_i2c > 3){ + CONFIG_ERR(gs_i2c, "gs_i2c"); + return -EINVAL; + } + if(gs_addr < 0 || gs_addr > 0x7f){ + CONFIG_ERR(gs_i2c, "gs_addr"); + return -EINVAL; + } + for(i = 0; i < 9; i++){ + if(gs_orig[i] != 1 && gs_orig[i] != 0 && gs_orig[i] != -1) + { + CONFIG_ERR(gs_orig[i], "gs_orig[x]"); + return -EINVAL; + } + } + return 0; +} + +/* charge */ +static int dc_det = DEF_DC_DET; +module_param(dc_det, int, 0644); +static int bat_low = DEF_BAT_LOW; +module_param(bat_low, int, 0644); +static int chg_ok = DEF_CHG_OK; +module_param(chg_ok, int, 0644); +static int chg_set = DEF_CHG_SET; +module_param(chg_set, int, 0644); +static int usb_det = DEF_USB_DET; +module_param(usb_det, int, 0644); +static int ref_vol = DEF_REF_VOL; +module_param(ref_vol, int, 0644); +static int up_res = DEF_UP_RES; +module_param(up_res, int, 0644); +static int down_res = DEF_DOWN_RES; +module_param(down_res, int, 0644); +static int root_chg = DEF_ROOT_CHG; +module_param(root_chg, int, 0644); +static int save_cap = DEF_SAVE_CAP; +module_param(save_cap, int, 0644); +static int low_vol = DEF_LOW_VOL; +module_param(low_vol, int, 0644); +int bat_charge[11] = DEF_BAT_CHARGE; +module_param_array(bat_charge, int, NULL, 0644); +int bat_discharge[11] = DEF_BAT_DISCHARGE; +module_param_array(bat_discharge, int, NULL, 0644); +static inline int check_chg_param(void) +{ + return 0; +} + +/*wifi*/ +int wifi_type = DEF_WIFI_TYPE; +module_param(wifi_type, int, 0644); +int wifi_pwr = DEF_WIFI_POWER; +module_param(wifi_pwr, int, 0644); +static inline int check_wifi_param(void) +{ + return 0; +} + +/* global */ +static int pwr_on = DEF_PWR_ON; +module_param(pwr_on, int, 0644); +static inline int rk_power_on(void) +{ + int ret; + ret=port_output_init(pwr_on, 1, "pwr_on"); + if(ret<0) + CONFIG_ERR(pwr_on, "pwr_on"); + + port_output_on(pwr_on); +} + diff --git a/arch/arm/mach-rk30/board-rk3168-fac.c b/arch/arm/mach-rk30/board-rk3168-fac.c new file mode 100644 index 000000000000..056ca618d44e --- /dev/null +++ b/arch/arm/mach-rk30/board-rk3168-fac.c @@ -0,0 +1,2744 @@ +/* + * + * Copyright (C) 2012 ROCKCHIP, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#if defined(CONFIG_CT36X_TS) +#include +#endif +#include +#include + + + +#if defined(CONFIG_MFD_RK610) +#include +#endif +#if defined(CONFIG_MFD_RK616) +#include +#endif + +#ifdef CONFIG_TOUCHSCREEN_GT82X_IIC +#include +#endif + +#if defined(CONFIG_RK_HDMI) + #include "../../../drivers/video/rockchip/hdmi/rk_hdmi.h" +#endif + +#if defined(CONFIG_SPIM_RK29) +#include "../../../drivers/spi/rk29_spim.h" +#endif +#if defined(CONFIG_GPS_RK) +#include "../../../drivers/misc/gps/rk_gps/rk_gps.h" +#endif + +#if defined(CONFIG_MT6620) +#include +#endif + +#if 1 +#define INIT_ERR(name) do { printk("%s: %s init Failed: \n", __func__, (name)); } while(0) +#else +#define INIT_ERR(name) +#endif + +#include "board-rk3168-86v-camera.c" +#include "board-rk-fac-config.c" +#include + +/* +static struct rk29_keys_button key_button[] = { + { + .desc = "play", + .code = KEY_POWER, + .gpio = RK30_PIN0_PA4, + .active_low = PRESS_LEV_LOW, + .wakeup = 1, + }, + { + .desc = "vol-", + .code = KEY_VOLUMEDOWN, + .adc_value = 150, + .gpio = INVALID_GPIO, + .active_low = PRESS_LEV_LOW, + }, + { + .desc = "vol+", + .code = KEY_VOLUMEUP, + .adc_value = 1, + .gpio = INVALID_GPIO, + .active_low = PRESS_LEV_LOW, + }, +}; +struct rk29_keys_platform_data rk29_keys_pdata = { + .buttons = key_button, + .nbuttons = ARRAY_SIZE(key_button), + .chn = 1, //chn: 0-7, if do not use ADC,set 'chn' -1 +}; +*/ +static struct rk29_keys_button key_button[] = { + { + .desc = "play", + .code = KEY_POWER, + .wakeup = 1, + }, + { + .desc = "vol-", + .code = KEY_VOLUMEDOWN, + }, + { + .desc = "vol+", + .code = KEY_VOLUMEUP, + }, + { + .desc = "menu", + .code = EV_MENU, + }, + { + .desc = "esc", + .code = KEY_BACK, + }, + { + .desc = "home", + .code = KEY_HOME, + }, +}; +struct rk29_keys_platform_data rk29_keys_pdata = { + .buttons = key_button, + .chn = -1, //chn: 0-7, if do not use ADC,set 'chn' -1 +}; +#if defined(CONFIG_CT36X_TS) + +#define TOUCH_MODEL 363 +#define TOUCH_MAX_X 1280 +#define TOUCH_MAX_y 800 +#define TOUCH_RESET_PIN RK30_PIN0_PB6 +#define TOUCH_INT_PIN RK30_PIN1_PB7 + +static struct ct36x_platform_data ct36x_info = { + .model = TOUCH_MODEL, + .x_max = TOUCH_MAX_X, + .y_max = TOUCH_MAX_y, + + .rst_io = { + .gpio = TOUCH_RESET_PIN, + .active_low = 1, + }, + .irq_io = { + .gpio = TOUCH_INT_PIN, + .active_low = 1, + }, + .orientation = {1, 0, 1, 0}, +}; +#endif +#if defined(CONFIG_TOUCHSCREEN_GSLX680) +#define TOUCH_RESET_PIN RK30_PIN0_PB6 +#define TOUCH_EN_PIN NULL +#define TOUCH_INT_PIN RK30_PIN1_PB7 + +int gslx680_init_platform_hw(void) +{ + + if(gpio_request(TOUCH_RESET_PIN,NULL) != 0){ + gpio_free(TOUCH_RESET_PIN); + printk("gslx680_init_platform_hw gpio_request error\n"); + return -EIO; + } + if(gpio_request(TOUCH_INT_PIN,NULL) != 0){ + gpio_free(TOUCH_INT_PIN); + printk("gslx680_init_platform_hw gpio_request error\n"); + return -EIO; + } + gpio_direction_output(TOUCH_RESET_PIN, GPIO_HIGH); + mdelay(10); + gpio_set_value(TOUCH_RESET_PIN,GPIO_LOW); + mdelay(10); + gpio_set_value(TOUCH_RESET_PIN,GPIO_HIGH); + msleep(300); + return 0; + +} + +struct ts_hw_data gslx680_info = { + .reset_gpio = TOUCH_RESET_PIN, + .touch_en_gpio = TOUCH_INT_PIN, + .init_platform_hw = gslx680_init_platform_hw, +}; +#endif +#if defined (CONFIG_TOUCHSCREEN_GSLX680_RK3168) +static int gslx680_init_platform_hw() +{ + int ret; + if(tp_rst!=-1){ + ret = port_output_init(tp_rst, 1, "tp_rst"); + if(ret<0) + printk("%s: port output init faild\n", __func__); + } + + port_output_on(tp_rst); + mdelay(10); + port_output_off(tp_rst); + mdelay(10); + port_output_on(tp_rst); + msleep(300); + return 0; +} + +static struct tp_platform_data gslx680_data = { + + .init_platform_hw = gslx680_init_platform_hw, +}; +struct i2c_board_info __initdata gslx680_info = { + .type = "gslX680", + .flags = 0, + .platform_data = &gslx680_data, +}; +#endif + + +#if defined (CONFIG_TOUCHSCREEN_86V_GT811_IIC) +int gt811_init_platform_hw(int irq,int reset) +{ + int ret; + if(tp_rst!=-1){ + ret = port_output_init(tp_rst, 1, "tp_rst"); + if(ret<0) + printk("%s: port output init faild\n", __func__); + } + + port_output_off(tp_rst); + msleep(500); + port_output_off(tp_rst); + msleep(500); + port_output_on(tp_rst); + mdelay(100); + return 0; +} + + +static struct tp_platform_data gt811_data = { + .model= 811, + .init_platform_hw= gt811_init_platform_hw, +}; + +struct i2c_board_info __initdata gt811_info = { + .type = "gt811_ts", + .flags = 0, + .platform_data = >811_data, +}; +#endif + + +/*********************************************************** +* rk30 codec +************************************************************/ +#if defined (CONFIG_SND_RK29_SOC_RT5631) +static struct codec_platform_data rt5631_data = { +}; +struct i2c_board_info __initdata rt5631_info = { + .type = "rt5631", + .flags = 0, + .platform_data =&rt5631_data, +}; +#endif + +#if defined (CONFIG_SND_RK29_SOC_ES8323) +static struct codec_platform_data es8323_data = { +}; +struct i2c_board_info __initdata es8323_info = { + .type = "es8323", + .flags = 0, + .platform_data =&es8323_data, +}; +#endif +#ifdef CONFIG_TOUCHSCREEN_GT82X_IIC +#define TOUCH_ENABLE_PIN INVALID_GPIO +#define TOUCH_RESET_PIN RK30_PIN0_PB6//RK30_PIN4_PD0 +#define TOUCH_INT_PIN RK30_PIN1_PB7//RK30_PIN4_PC2 +int goodix_init_platform_hw(void) +{ + int ret; + + //rk30_mux_api_set(GPIO4D0_SMCDATA8_TRACEDATA8_NAME, GPIO4D_GPIO4D0); //hjc + //rk30_mux_api_set(GPIO4C2_SMCDATA2_TRACEDATA2_NAME, GPIO4C_GPIO4C2); //hjc + //printk("%s:0x%x,0x%x\n",__func__,rk30_mux_api_get(GPIO4D0_SMCDATA8_TRACEDATA8_NAME),rk30_mux_api_get(GPIO4C2_SMCDATA2_TRACEDATA2_NAME)); + if (TOUCH_ENABLE_PIN != INVALID_GPIO) { + ret = gpio_request(TOUCH_ENABLE_PIN, "goodix power pin"); + if (ret != 0) { + gpio_free(TOUCH_ENABLE_PIN); + printk("goodix power error\n"); + return -EIO; + } + gpio_direction_output(TOUCH_ENABLE_PIN, 0); + gpio_set_value(TOUCH_ENABLE_PIN, GPIO_LOW); + msleep(100); + } + + if (TOUCH_RESET_PIN != INVALID_GPIO) { + ret = gpio_request(TOUCH_RESET_PIN, "goodix reset pin"); + if (ret != 0) { + gpio_free(TOUCH_RESET_PIN); + printk("goodix gpio_request error\n"); + return -EIO; + } + gpio_direction_output(TOUCH_RESET_PIN, 0); + gpio_set_value(TOUCH_RESET_PIN, GPIO_LOW); + msleep(10); + gpio_set_value(TOUCH_RESET_PIN, GPIO_HIGH); + msleep(500); + } + return 0; +} +u8 ts82x_config_data[] = { + 0x65,0x00,0x04,0x00,0x03,0x00,0x0A,0x0D,0x1E,0xE7, + 0x32,0x03,0x08,0x10,0x48,0x42,0x42,0x20,0x00,0x01, + 0x60,0x60,0x4B,0x6E,0x0E,0x0D,0x0C,0x0B,0x0A,0x09, + 0x08,0x07,0x06,0x05,0x04,0x03,0x02,0x01,0x00,0x1D, + 0x1C,0x1B,0x1A,0x19,0x18,0x17,0x16,0x15,0x14,0x13, + 0x12,0x11,0x10,0x0F,0x50,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x2B,0x00,0x00, + 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00 +}; +static struct goodix_i2c_rmi_platform_data ts82x_pdata = { + .gpio_shutdown = TOUCH_ENABLE_PIN, + .gpio_irq = TOUCH_INT_PIN, + .gpio_reset = TOUCH_RESET_PIN, + .irq_edge = 1, /* 0:rising edge, 1:falling edge */ + + .ypol = 1, + .swap_xy = 1, + .xpol = 0, + .xmax = 800, + .ymax = 600, + .config_info_len =ARRAY_SIZE(ts82x_config_data), + .config_info = ts82x_config_data, + .init_platform_hw= goodix_init_platform_hw, +}; +#endif + +static struct spi_board_info board_spi_devices[] = { +}; +/*********************************************************** +* rk30 backlight +************************************************************/ +#ifdef CONFIG_BACKLIGHT_RK29_BL +static int rk29_backlight_io_init(void) +{ + int ret = 0; + iomux_set(bl_pwm_mode); + msleep(100); + + if(bl_en== -1) + return 0; + ret = port_output_init(bl_en, 1, "bl_en"); + if(ret < 0){ + printk("%s: port output init faild\n", __func__); + return ret; + } + port_output_on(bl_en); + + return ret; +} + + +static int rk29_backlight_io_deinit(void){ + int ret = 0, pwm_gpio; + + if(bl_en != -1) + port_deinit(bl_en); + + pwm_gpio = iomux_mode_to_gpio(bl_pwm_mode); + gpio_request(pwm_gpio, NULL); + gpio_direction_output(pwm_gpio, GPIO_LOW); + return 0; +} + +static int rk29_backlight_pwm_suspend(void) +{ + int ret = 0, pwm_gpio; + + pwm_gpio = iomux_mode_to_gpio(bl_pwm_mode); + if (gpio_request(pwm_gpio, NULL)) { + printk("func %s, line %d: request gpio fail\n", __FUNCTION__, __LINE__); + return -1; + } + gpio_direction_output(pwm_gpio, GPIO_LOW); + port_output_off(bl_en); + return ret; +} + +static int rk29_backlight_pwm_resume(void) +{ + int pwm_gpio = iomux_mode_to_gpio(bl_pwm_mode); + gpio_free(pwm_gpio); + iomux_set(bl_pwm_mode); + msleep(150); + port_output_on(bl_en); + return 0; +} + +static struct rk29_bl_info rk29_bl_info = { + .io_init = rk29_backlight_io_init, + .io_deinit = rk29_backlight_io_deinit, + .pwm_suspend = rk29_backlight_pwm_suspend, + .pwm_resume = rk29_backlight_pwm_resume, +}; + +static struct platform_device rk29_device_backlight = { + .name = "rk29_backlight", + .id = -1, + .dev = { + .platform_data = &rk29_bl_info, + } +}; + +#endif + +/*MMA8452 gsensor*/ +#if defined (CONFIG_GS_MMA8452) +static int mma8452_init_platform_hw(void) +{ + return 0; +} + +static struct sensor_platform_data mma8452_data = { + .type = SENSOR_TYPE_ACCEL, + .irq_enable = 1, + .poll_delay_ms = 30, + .init_platform_hw = mma8452_init_platform_hw, +}; +struct i2c_board_info __initdata mma8452_info = { + .type = "gs_mma8452", + .flags = 0, + .platform_data =&mma8452_data, +}; +#endif + +/*MMA7660 gsensor*/ +#if defined (CONFIG_GS_MMA7660) +static int mma7660_init_platform_hw(void) +{ + //rk30_mux_api_set(GPIO1B2_SPI_RXD_UART1_SIN_NAME, GPIO1B_GPIO1B2); + + return 0; +} + +static struct sensor_platform_data mma7660_data = { + .type = SENSOR_TYPE_ACCEL, + .irq_enable = 1, + .poll_delay_ms = 30, + .init_platform_hw = mma7660_init_platform_hw, +}; +struct i2c_board_info __initdata mma7660_info = { + .type = "gs_mma7660", + .flags = 0, + .platform_data =&mma7660_data, +}; +#endif + +#if defined (CONFIG_GS_MXC6225) +static int mxc6225_init_platform_hw(void) +{ +// rk30_mux_api_set(GPIO1B1_SPI_TXD_UART1_SOUT_NAME, GPIO1B_GPIO1B1); + return 0; +} + +static struct sensor_platform_data mxc6225_data = { + .type = SENSOR_TYPE_ACCEL, + .irq_enable = 0, + .poll_delay_ms = 30, + .init_platform_hw = mxc6225_init_platform_hw, +}; +struct i2c_board_info __initdata mxc6225_info = { + .type = "gs_mxc6225", + .flags = 0, + .platform_data =&mxc6225_data, +}; +#endif + +#if defined (CONFIG_GS_DMT10) +static int dmt10_init_platform_hw(void) +{ + return 0; +} + +static struct sensor_platform_data dmt10_data = { + .type = SENSOR_TYPE_ACCEL, + .irq_enable = 0, + .poll_delay_ms = 30, + .init_platform_hw = dmt10_init_platform_hw, +}; +struct i2c_board_info __initdata dmt10_info = { + .type = "gs_dmard10", + .flags = 0, + .platform_data =&dmt10_data, +}; +#endif + + +#if defined (CONFIG_GS_LIS3DH) +static int lis3dh_init_platform_hw(void) +{ + return 0; +} +static struct sensor_platform_data lis3dh_data = { + .type = SENSOR_TYPE_ACCEL, + .irq_enable = 1, + .poll_delay_ms = 30, + .init_platform_hw = lis3dh_init_platform_hw, +}; +struct i2c_board_info __initdata lis3dh_info = { + .type = "gs_lis3dh", + .flags = 0, + .platform_data =&lis3dh_data, +}; +#endif +#if defined (CONFIG_COMPASS_AK8975) +static struct sensor_platform_data akm8975_info = +{ + .type = SENSOR_TYPE_COMPASS, + .irq_enable = 1, + .poll_delay_ms = 30, + .m_layout = + { + { + {1, 0, 0}, + {0, 1, 0}, + {0, 0, 1}, + }, + + { + {1, 0, 0}, + {0, 1, 0}, + {0, 0, 1}, + }, + + { + {1, 0, 0}, + {0, 1, 0}, + {0, 0, 1}, + }, + + { + {1, 0, 0}, + {0, 1, 0}, + {0, 0, 1}, + }, + } +}; + +#endif + +#if defined (CONFIG_COMPASS_AK8963) +static struct sensor_platform_data akm8963_info = +{ + .type = SENSOR_TYPE_COMPASS, + .irq_enable = 1, + .poll_delay_ms = 30, + .m_layout = + { + { + {0, 1, 0}, + {1, 0, 0}, + {0, 0, -1}, + }, + + { + {1, 0, 0}, + {0, 1, 0}, + {0, 0, 1}, + }, + + { + {0, -1, 0}, + {-1, 0, 0}, + {0, 0, -1}, + }, + + { + {1, 0, 0}, + {0, 1, 0}, + {0, 0, 1}, + }, + } +}; + +#endif + + +#if defined(CONFIG_GYRO_L3G4200D) + +#include +#define L3G4200D_INT_PIN RK30_PIN0_PB4 + +static int l3g4200d_init_platform_hw(void) +{ + return 0; +} + +static struct sensor_platform_data l3g4200d_info = { + .type = SENSOR_TYPE_GYROSCOPE, + .irq_enable = 1, + .poll_delay_ms = 30, + .orientation = {0, 1, 0, -1, 0, 0, 0, 0, 1}, + .init_platform_hw = l3g4200d_init_platform_hw, + .x_min = 40,//x_min,y_min,z_min = (0-100) according to hardware + .y_min = 40, + .z_min = 20, +}; + +#endif + +#ifdef CONFIG_LS_CM3217 +static struct sensor_platform_data cm3217_info = { + .type = SENSOR_TYPE_LIGHT, + .irq_enable = 0, + .poll_delay_ms = 500, +}; + +#endif + + +#ifdef CONFIG_FB_ROCKCHIP +static int rk_fb_io_init(struct rk29_fb_setting_info *fb_setting) +{ + int stbyb_gpio; + int ret = 0; + printk("rk_fb_io_init %x,%x,%x\n",lcd_cs,lcd_en,lcd_std); + if(lcd_cs != -1){ + ret = port_output_init(lcd_cs, 1, "lcd_cs"); + if(ret < 0) + printk("%s: port output init faild\n", __func__); + port_output_on(lcd_cs); + } + + if(lcd_en != -1){ + ret = port_output_init(lcd_en, 1, "lcd_en"); + if(ret < 0) + printk("%s: port output init faild\n", __func__); + port_output_on(lcd_en); + } + + if(lcd_std != -1){ + ret = port_output_init(lcd_std, 1, "lcd_std"); + if(ret < 0) + printk("%s: port output init faild\n", __func__); + port_output_on(lcd_std); + } + + return ret; +} + +static int rk_fb_io_disable(void){ + if(lcd_cs != -1) + port_output_off(lcd_cs); + if(lcd_en != -1) + port_output_on(lcd_en); + return 0; +} + +static int rk_fb_io_enable(void){ + if(lcd_en != -1) + port_output_on(lcd_en); + if(lcd_cs != -1) + port_output_on(lcd_cs); + return 0; +} + +#if defined(CONFIG_LCDC0_RK3066B) +struct rk29fb_info lcdc0_screen_info = { +#if defined(CONFIG_RK_HDMI) && defined(CONFIG_HDMI_SOURCE_LCDC0)&& defined(CONFIG_DUAL_LCDC_DUAL_DISP_IN_KERNEL) + .prop = EXTEND, //primary display device + .io_init = NULL, + .io_disable = NULL, + .io_enable = NULL, + .set_screen_info = hdmi_init_lcdc, +#else + .prop = PRMRY, //primary display device + .io_init = rk_fb_io_init, + .io_disable = rk_fb_io_disable, + .io_enable = rk_fb_io_enable, + .set_screen_info = set_lcd_info, +#endif +}; +#endif + +#if defined(CONFIG_LCDC1_RK3066B) +struct rk29fb_info lcdc1_screen_info = { +#if defined(CONFIG_RK_HDMI) && defined(CONFIG_HDMI_SOURCE_LCDC1) && defined(CONFIG_DUAL_LCDC_DUAL_DISP_IN_KERNEL) + .prop = EXTEND, //primary display device + .io_init = NULL, + .io_disable = NULL, + .io_enable = NULL, + .set_screen_info = hdmi_init_lcdc, +#else + .prop = PRMRY, //primary display device + .io_init = rk_fb_io_init, + .io_disable = rk_fb_io_disable, + .io_enable = rk_fb_io_enable, + .set_screen_info = set_lcd_info, +#endif + +}; +#endif + +static struct resource resource_fb[] = { + [0] = { + .name = "fb0 buf", + .start = 0, + .end = 0,//RK30_FB0_MEM_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .name = "ipp buf", //for rotate + .start = 0, + .end = 0,//RK30_FB0_MEM_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + [2] = { + .name = "fb2 buf", + .start = 0, + .end = 0,//RK30_FB0_MEM_SIZE - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device device_fb = { + .name = "rk-fb", + .id = -1, + .num_resources = ARRAY_SIZE(resource_fb), + .resource = resource_fb, +}; +#endif + +#if defined(CONFIG_LCDC0_RK3066B) +static struct resource resource_lcdc0[] = { + [0] = { + .name = "lcdc0 reg", + .start = RK30_LCDC0_PHYS, + .end = RK30_LCDC0_PHYS + RK30_LCDC0_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + + [1] = { + .name = "lcdc0 irq", + .start = IRQ_LCDC0, + .end = IRQ_LCDC0, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device device_lcdc0 = { + .name = "rk30-lcdc", + .id = 0, + .num_resources = ARRAY_SIZE(resource_lcdc0), + .resource = resource_lcdc0, + .dev = { + .platform_data = &lcdc0_screen_info, + }, +}; +#endif +#if defined(CONFIG_LCDC1_RK3066B) +static struct resource resource_lcdc1[] = { + [0] = { + .name = "lcdc1 reg", + .start = RK30_LCDC1_PHYS, + .end = RK30_LCDC1_PHYS + RK30_LCDC1_SIZE - 1, + .flags = IORESOURCE_MEM, + }, + [1] = { + .name = "lcdc1 irq", + .start = IRQ_LCDC1, + .end = IRQ_LCDC1, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device device_lcdc1 = { + .name = "rk30-lcdc", + .id = 1, + .num_resources = ARRAY_SIZE(resource_lcdc1), + .resource = resource_lcdc1, + .dev = { + .platform_data = &lcdc1_screen_info, + }, +}; +#endif + +#if defined(CONFIG_MFD_RK610) +#define RK610_RST_PIN RK30_PIN3_PB2 +static int rk610_power_on_init(void) +{ + int ret; + if(RK610_RST_PIN != INVALID_GPIO) + { + ret = gpio_request(RK610_RST_PIN, "rk610 reset"); + if (ret) + { + printk(KERN_ERR "rk610_control_probe request gpio fail\n"); + } + else + { + gpio_direction_output(RK610_RST_PIN, GPIO_HIGH); + msleep(100); + gpio_direction_output(RK610_RST_PIN, GPIO_LOW); + msleep(100); + gpio_set_value(RK610_RST_PIN, GPIO_HIGH); + } + } + + return 0; + +} + + +static struct rk610_ctl_platform_data rk610_ctl_pdata = { + .rk610_power_on_init = rk610_power_on_init, +}; +#endif + +#ifdef CONFIG_SND_SOC_RK610 +static int rk610_codec_io_init(void) +{ +//if need iomux. +//Must not gpio_request + return 0; +} + +static struct rk610_codec_platform_data rk610_codec_pdata = { + .spk_ctl_io = RK30_PIN2_PD7, + .io_init = rk610_codec_io_init, + .boot_depop = 1, +}; +#endif + +#if defined(CONFIG_MFD_RK616) +//#define RK616_RST_PIN RK30_PIN3_PB2 +//#define RK616_PWREN_PIN RK30_PIN0_PA3 +#define RK616_SCL_RATE (100*1000) //i2c scl rate +static int rk616_power_on_init(void) +{ + int ret; + + if(codec_power!=-1) + { + ret = port_output_init(codec_power, 1, "codec_power"); + if(ret < 0) + printk("%s: port output init faild\n", __func__); + port_output_on(codec_power); + } + + if(codec_rst!=-1) + { + ret = port_output_init(codec_rst, 1, "codec_rst"); + if(ret < 0) + printk("%s: port output init faild\n", __func__); + port_output_on(codec_rst); + msleep(100); + port_output_off(codec_rst); + msleep(100); + port_output_on(codec_rst); + } + return 0; + +} + + +static struct rk616_platform_data rk616_pdata = { + .power_init = rk616_power_on_init, + .scl_rate = RK616_SCL_RATE, + .lcd0_func = INPUT, //port lcd0 as input + .lcd1_func = OUTPUT, //port lcd1 as input + .lvds_ch_nr = 1, //the number of used lvds channel + //.hdmi_irq = RK30_PIN2_PD6, + //.spk_ctl_gpio = RK30_PIN2_PD7, +}; + +struct i2c_board_info __initdata rk616_info = { + .type = "rk616", + .flags = 0, + .platform_data = &rk616_pdata, +}; + +#endif + +#ifdef CONFIG_ION +#define ION_RESERVE_SIZE (80 * SZ_1M) +static struct ion_platform_data rk30_ion_pdata = { + .nr = 1, + .heaps = { + { + .type = ION_HEAP_TYPE_CARVEOUT, + .id = ION_NOR_HEAP_ID, + .name = "norheap", + .size = ION_RESERVE_SIZE, + } + }, +}; + +static struct platform_device device_ion = { + .name = "ion-rockchip", + .id = 0, + .dev = { + .platform_data = &rk30_ion_pdata, + }, +}; +#endif + +/************************************************************************************************** + * SDMMC devices, include the module of SD,MMC,and sdio.noted by xbw at 2012-03-05 +**************************************************************************************************/ +#ifdef CONFIG_SDMMC_RK29 +#include "board-rk3168-86v-sdmmc-config.c" +#include "../plat-rk/rk-sdmmc-ops.c" +#include "../plat-rk/rk-sdmmc-wifi.c" +#endif //endif ---#ifdef CONFIG_SDMMC_RK29 + +#ifdef CONFIG_SDMMC0_RK29 +static int rk29_sdmmc0_cfg_gpio(void) +{ +#ifdef CONFIG_SDMMC_RK29_OLD + iomux_set(MMC0_CMD); + iomux_set(MMC0_CLKOUT); + iomux_set(MMC0_D0); + iomux_set(MMC0_D1); + iomux_set(MMC0_D2); + iomux_set(MMC0_D3); + + iomux_set_gpio_mode(iomux_mode_to_gpio(MMC0_DETN)); + + gpio_request(RK30_PIN3_PA7, "sdmmc-power"); + gpio_direction_output(RK30_PIN3_PA7, GPIO_LOW); + +#else + rk29_sdmmc_set_iomux(0, 0xFFFF); + + #if defined(CONFIG_SDMMC0_RK29_SDCARD_DET_FROM_GPIO) + #if SDMMC_USE_NEW_IOMUX_API + iomux_set_gpio_mode(iomux_gpio_to_mode(RK29SDK_SD_CARD_DETECT_N)); + #else + rk30_mux_api_set(RK29SDK_SD_CARD_DETECT_PIN_NAME, RK29SDK_SD_CARD_DETECT_IOMUX_FGPIO); + #endif + #else + #if SDMMC_USE_NEW_IOMUX_API + iomux_set(MMC0_DETN); + #else + rk30_mux_api_set(RK29SDK_SD_CARD_DETECT_PIN_NAME, RK29SDK_SD_CARD_DETECT_IOMUX_FMUX); + #endif + #endif + +#if defined(CONFIG_SDMMC0_RK29_WRITE_PROTECT) + gpio_request(SDMMC0_WRITE_PROTECT_PIN, "sdmmc-wp"); + gpio_direction_input(SDMMC0_WRITE_PROTECT_PIN); +#endif + +#endif + + return 0; +} + +#define CONFIG_SDMMC0_USE_DMA +struct rk29_sdmmc_platform_data default_sdmmc0_data = { + .host_ocr_avail = + (MMC_VDD_25_26 | MMC_VDD_26_27 | MMC_VDD_27_28 | MMC_VDD_28_29 | + MMC_VDD_29_30 | MMC_VDD_30_31 | MMC_VDD_31_32 | MMC_VDD_32_33 | + MMC_VDD_33_34 | MMC_VDD_34_35 | MMC_VDD_35_36), + .host_caps = + (MMC_CAP_4_BIT_DATA | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), + .io_init = rk29_sdmmc0_cfg_gpio, + +#if !defined(CONFIG_SDMMC_RK29_OLD) + .set_iomux = rk29_sdmmc_set_iomux, +#endif + + .dma_name = "sd_mmc", +#ifdef CONFIG_SDMMC0_USE_DMA + .use_dma = 1, +#else + .use_dma = 0, +#endif + +#if defined(CONFIG_WIFI_COMBO_MODULE_CONTROL_FUNC) && defined(CONFIG_USE_SDMMC0_FOR_WIFI_DEVELOP_BOARD) + .status = rk29sdk_wifi_mmc0_status, + .register_status_notify = rk29sdk_wifi_mmc0_status_register, +#endif + +#if defined(RK29SDK_SD_CARD_PWR_EN) || (INVALID_GPIO != RK29SDK_SD_CARD_PWR_EN) + .power_en = RK29SDK_SD_CARD_PWR_EN, + .power_en_level = RK29SDK_SD_CARD_PWR_EN_LEVEL, +#else + .power_en = INVALID_GPIO, + .power_en_level = GPIO_LOW, +#endif + .enable_sd_wakeup = 0, + +#if defined(CONFIG_SDMMC0_RK29_WRITE_PROTECT) + .write_prt = SDMMC0_WRITE_PROTECT_PIN, + .write_prt_enalbe_level = SDMMC0_WRITE_PROTECT_ENABLE_VALUE; +#else + .write_prt = INVALID_GPIO, +#endif + + .det_pin_info = { + #if defined(RK29SDK_SD_CARD_DETECT_N) || (INVALID_GPIO != RK29SDK_SD_CARD_DETECT_N) + .io = RK29SDK_SD_CARD_DETECT_N, //INVALID_GPIO, + .enable = RK29SDK_SD_CARD_INSERT_LEVEL, + #ifdef RK29SDK_SD_CARD_DETECT_PIN_NAME + .iomux = { + .name = RK29SDK_SD_CARD_DETECT_PIN_NAME, + #ifdef RK29SDK_SD_CARD_DETECT_IOMUX_FGPIO + .fgpio = RK29SDK_SD_CARD_DETECT_IOMUX_FGPIO, + #endif + #ifdef RK29SDK_SD_CARD_DETECT_IOMUX_FMUX + .fmux = RK29SDK_SD_CARD_DETECT_IOMUX_FMUX, + #endif + }, + #endif + #else + .io = INVALID_GPIO, + .enable = GPIO_LOW, + #endif + }, + +}; +#endif // CONFIG_SDMMC0_RK29 + +#ifdef CONFIG_SDMMC1_RK29 +#define CONFIG_SDMMC1_USE_DMA +static int rk29_sdmmc1_cfg_gpio(void) +{ +#if defined(CONFIG_SDMMC_RK29_OLD) + iomux_set(MMC1_CMD); + iomux_set(MMC1_CLKOUT); + iomux_set(MMC1_D0); + iomux_set(MMC1_D1); + iomux_set(MMC1_D2); + iomux_set(MMC1_D3); +#else + +#if defined(CONFIG_SDMMC1_RK29_WRITE_PROTECT) + gpio_request(SDMMC1_WRITE_PROTECT_PIN, "sdio-wp"); + gpio_direction_input(SDMMC1_WRITE_PROTECT_PIN); +#endif + +#endif + + return 0; +} + +struct rk29_sdmmc_platform_data default_sdmmc1_data = { + .host_ocr_avail = + (MMC_VDD_25_26 | MMC_VDD_26_27 | MMC_VDD_27_28 | MMC_VDD_28_29 | + MMC_VDD_29_30 | MMC_VDD_30_31 | MMC_VDD_31_32 | MMC_VDD_32_33 | + MMC_VDD_33_34), + +#if !defined(CONFIG_USE_SDMMC1_FOR_WIFI_DEVELOP_BOARD) + .host_caps = (MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ | + MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), +#else + .host_caps = + (MMC_CAP_4_BIT_DATA | MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), +#endif + + .io_init = rk29_sdmmc1_cfg_gpio, + +#if !defined(CONFIG_SDMMC_RK29_OLD) + .set_iomux = rk29_sdmmc_set_iomux, +#endif + + .dma_name = "sdio", +#ifdef CONFIG_SDMMC1_USE_DMA + .use_dma = 1, +#else + .use_dma = 0, +#endif + +#if defined(CONFIG_WIFI_CONTROL_FUNC) || defined(CONFIG_WIFI_COMBO_MODULE_CONTROL_FUNC) + .status = rk29sdk_wifi_status, + .register_status_notify = rk29sdk_wifi_status_register, +#endif + +#if defined(CONFIG_SDMMC1_RK29_WRITE_PROTECT) + .write_prt = SDMMC1_WRITE_PROTECT_PIN, + .write_prt_enalbe_level = SDMMC1_WRITE_PROTECT_ENABLE_VALUE; +#else + .write_prt = INVALID_GPIO, +#endif + + #if defined(CONFIG_RK29_SDIO_IRQ_FROM_GPIO) + .sdio_INT_gpio = RK29SDK_WIFI_SDIO_CARD_INT, + #ifdef USE_SDIO_INT_LEVEL + .sdio_INT_level = RK30SDK_WIFI_GPIO_WIFI_INT_B_ENABLE_VALUE, + #endif + #endif + + .det_pin_info = { +#if defined(CONFIG_USE_SDMMC1_FOR_WIFI_DEVELOP_BOARD) + #if defined(RK29SDK_SD_CARD_DETECT_N) || (INVALID_GPIO != RK29SDK_SD_CARD_DETECT_N) + .io = RK29SDK_SD_CARD_DETECT_N, + #else + .io = INVALID_GPIO, + #endif + + .enable = RK29SDK_SD_CARD_INSERT_LEVEL, + #ifdef RK29SDK_SD_CARD_DETECT_PIN_NAME + .iomux = { + .name = RK29SDK_SD_CARD_DETECT_PIN_NAME, + #ifdef RK29SDK_SD_CARD_DETECT_IOMUX_FGPIO + .fgpio = RK29SDK_SD_CARD_DETECT_IOMUX_FGPIO, + #endif + #ifdef RK29SDK_SD_CARD_DETECT_IOMUX_FMUX + .fmux = RK29SDK_SD_CARD_DETECT_IOMUX_FMUX, + #endif + }, + #endif + #else + .io = INVALID_GPIO, + .enable = GPIO_LOW, +#endif + }, + + .enable_sd_wakeup = 0, +}; +#endif //endif--#ifdef CONFIG_SDMMC1_RK29 + +/************************************************************************************************** + * the end of setting for SDMMC devices +**************************************************************************************************/ + +#ifdef CONFIG_BATTERY_RK30_ADC_FAC +static struct rk30_adc_battery_platform_data rk30_adc_battery_platdata = { +/* + .dc_det_pin = RK30_PIN0_PB2, + .batt_low_pin = INVALID_GPIO, + .charge_set_pin = INVALID_GPIO, + .charge_ok_pin = RK30_PIN0_PA6, + .usb_det_pin = INVALID_GPIO, + .dc_det_level = GPIO_LOW, + .charge_ok_level = GPIO_HIGH, + + .reference_voltage = 1800, // the rK2928 is 3300;RK3066 and rk29 are 2500;rk3066B is 1800; + .pull_up_res = 200, //divider resistance , pull-up resistor + .pull_down_res = 120, //divider resistance , pull-down resistor + + .is_reboot_charging = 1, + .save_capacity = 1 , + .low_voltage_protection = 3600, + */ +}; + + +static struct platform_device rk30_device_adc_battery = { + .name = "rk30-battery", + .id = -1, + .dev = { + .platform_data = &rk30_adc_battery_platdata, + }, +}; +#endif +#ifdef CONFIG_RK30_PWM_REGULATOR +static int pwm_voltage_map[] = { + 800000,825000,850000, 875000,900000, 925000 ,950000, 975000,1000000, 1025000, 1050000, 1075000, 1100000, 1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000, 1300000, 1325000, 1350000,1375000 +}; + +static struct regulator_consumer_supply pwm_dcdc1_consumers[] = { + { + .supply = "vdd_cpu", + } +}; + +struct regulator_init_data pwm_regulator_init_dcdc[1] = +{ + { + .constraints = { + .name = "PWM_DCDC1", + .min_uV = 600000, + .max_uV = 1800000, //0.6-1.8V + .apply_uV = true, + .valid_ops_mask = REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_VOLTAGE, + }, + .num_consumer_supplies = ARRAY_SIZE(pwm_dcdc1_consumers), + .consumer_supplies = pwm_dcdc1_consumers, + }, +}; + +static struct pwm_platform_data pwm_regulator_info[1] = { + { + .pwm_id = 1, + .pwm_gpio = RK30_PIN3_PD4, + .pwm_iomux_pwm = PWM1, + .pwm_iomux_gpio = GPIO3_D4, + .pwm_voltage = 1100000, + .suspend_voltage = 1000000, + .min_uV = 800000, + .max_uV = 1375000, + .coefficient = 575, //55.0% + .pwm_voltage_map = pwm_voltage_map, + .init_data = &pwm_regulator_init_dcdc[0], + }, +}; + +struct platform_device pwm_regulator_device[1] = { + { + .name = "pwm-voltage-regulator", + .id = 0, + .dev = { + .platform_data = &pwm_regulator_info[0], + } + }, +}; +#endif + +#ifdef CONFIG_RFKILL_RK +// bluetooth rfkill device, its driver in net/rfkill/rfkill-rk.c +static struct rfkill_rk_platform_data rfkill_rk_platdata = { + .type = RFKILL_TYPE_BLUETOOTH, + + .poweron_gpio = { // BT_REG_ON + .io = INVALID_GPIO, //RK30_PIN3_PC7, + .enable = GPIO_HIGH, + .iomux = { + .name = "bt_poweron", + .fgpio = GPIO3_C7, + }, + }, + + .reset_gpio = { // BT_RST + .io = RK30_PIN3_PD1, // set io to INVALID_GPIO for disable it + .enable = GPIO_LOW, + .iomux = { + .name = "bt_reset", + .fgpio = GPIO3_D1, + }, + }, + + .wake_gpio = { // BT_WAKE, use to control bt's sleep and wakeup + .io = RK30_PIN3_PC6, // set io to INVALID_GPIO for disable it + .enable = GPIO_HIGH, + .iomux = { + .name = "bt_wake", + .fgpio = GPIO3_C6, + }, + }, + + .wake_host_irq = { // BT_HOST_WAKE, for bt wakeup host when it is in deep sleep + .gpio = { + .io = RK30_PIN0_PA5, // set io to INVALID_GPIO for disable it + .enable = GPIO_LOW, // set GPIO_LOW for falling, set 0 for rising + .iomux = { + .name = NULL, + }, + }, + }, + + .rts_gpio = { // UART_RTS, enable or disable BT's data coming + .io = RK30_PIN1_PA3, // set io to INVALID_GPIO for disable it + .enable = GPIO_LOW, + .iomux = { + .name = "bt_rts", + .fgpio = GPIO1_A3, + .fmux = UART0_RTSN, + }, + }, +}; + +static struct platform_device device_rfkill_rk = { + .name = "rfkill_rk", + .id = -1, + .dev = { + .platform_data = &rfkill_rk_platdata, + }, +}; +#endif + +#if defined(CONFIG_GPS_RK) +int rk_gps_io_init(void) +{ + printk("%s \n", __FUNCTION__); + + rk30_mux_api_set(GPIO1B5_UART3RTSN_NAME, GPIO1B_GPIO1B5);//VCC_EN + gpio_request(RK30_PIN1_PB5, NULL); + gpio_direction_output(RK30_PIN1_PB5, GPIO_LOW); + + rk30_mux_api_set(GPIO1B4_UART3CTSN_GPSRFCLK_NAME, GPIO1B_GPSRFCLK);//GPS_CLK + rk30_mux_api_set(GPIO1B2_UART3SIN_GPSMAG_NAME, GPIO1B_GPSMAG);//GPS_MAG + rk30_mux_api_set(GPIO1B3_UART3SOUT_GPSSIG_NAME, GPIO1B_GPSSIG);//GPS_SIGN + + rk30_mux_api_set(GPIO1A6_UART1CTSN_SPI0CLK_NAME, GPIO1A_GPIO1A6);//SPI_CLK + gpio_request(RK30_PIN1_PA6, NULL); + gpio_direction_output(RK30_PIN1_PA6, GPIO_LOW); + + rk30_mux_api_set(GPIO1A5_UART1SOUT_SPI0TXD_NAME, GPIO1A_GPIO1A5);//SPI_MOSI + gpio_request(RK30_PIN1_PA5, NULL); + gpio_direction_output(RK30_PIN1_PA5, GPIO_LOW); + + rk30_mux_api_set(GPIO1A7_UART1RTSN_SPI0CSN0_NAME, GPIO1A_GPIO1A7);//SPI_CS + gpio_request(RK30_PIN1_PA7, NULL); + gpio_direction_output(RK30_PIN1_PA7, GPIO_LOW); + return 0; +} +int rk_gps_power_up(void) +{ + printk("%s \n", __FUNCTION__); + + return 0; +} + +int rk_gps_power_down(void) +{ + printk("%s \n", __FUNCTION__); + + return 0; +} + +int rk_gps_reset_set(int level) +{ + return 0; +} +int rk_enable_hclk_gps(void) +{ + printk("%s \n", __FUNCTION__); + clk_enable(clk_get(NULL, "hclk_gps")); + return 0; +} +int rk_disable_hclk_gps(void) +{ + printk("%s \n", __FUNCTION__); + clk_disable(clk_get(NULL, "hclk_gps")); + return 0; +} +struct rk_gps_data rk_gps_info = { + .io_init = rk_gps_io_init, + .power_up = rk_gps_power_up, + .power_down = rk_gps_power_down, + .reset = rk_gps_reset_set, + .enable_hclk_gps = rk_enable_hclk_gps, + .disable_hclk_gps = rk_disable_hclk_gps, + .GpsSign = RK30_PIN1_PB3, + .GpsMag = RK30_PIN1_PB2, //GPIO index + .GpsClk = RK30_PIN1_PB4, //GPIO index + .GpsVCCEn = RK30_PIN1_PB5, //GPIO index + .GpsSpi_CSO = RK30_PIN1_PA4, //GPIO index + .GpsSpiClk = RK30_PIN1_PA5, //GPIO index + .GpsSpiMOSI = RK30_PIN1_PA7, //GPIO index + .GpsIrq = IRQ_GPS, + .GpsSpiEn = 0, + .GpsAdcCh = 2, + .u32GpsPhyAddr = RK30_GPS_PHYS, + .u32GpsPhySize = RK30_GPS_SIZE, +}; + +struct platform_device rk_device_gps = { + .name = "gps_hv5820b", + .id = -1, + .dev = { + .platform_data = &rk_gps_info, + } + }; +#endif + +#if defined(CONFIG_MT5931_MT6622) +static struct mt6622_platform_data mt6622_platdata = { + .power_gpio = { // BT_REG_ON + .io = RK30_PIN3_PC7, // set io to INVALID_GPIO for disable it + .enable = GPIO_HIGH, + .iomux = { + .name = NULL, + }, + }, + + .reset_gpio = { // BT_RST + .io = RK30_PIN3_PD1, + .enable = GPIO_HIGH, + .iomux = { + .name = NULL, + }, + }, + + .irq_gpio = { + .io = RK30_PIN0_PA5, + .enable = GPIO_LOW, + .iomux = { + .name = NULL, + }, + }, + + .rts_gpio = { // UART_RTS + .io = RK30_PIN1_PA3, + .enable = GPIO_LOW, + .iomux = { + .name = "bt_rts", + .fgpio = GPIO1_A3, + .fmux = UART0_RTSN, + }, + }, +}; + +static struct platform_device device_mt6622 = { + .name = "mt6622", + .id = -1, + .dev = { + .platform_data = &mt6622_platdata, + }, +}; +#endif +#if defined CONFIG_TCC_BT_DEV +static struct tcc_bt_platform_data tcc_bt_platdata = { + + .power_gpio = { // ldoon + .io = RK30_PIN3_PC0,//difined depend on your harware + .enable = GPIO_HIGH, + .iomux = { + .name = NULL, + }, + }, + + .wake_host_gpio = { // BT_HOST_WAKE, for bt wakeup host when it is in deep sleep + .io = RK30_PIN0_PC5, // set io to INVALID_GPIO for disable it,it's depend on your hardware + .enable = IRQF_TRIGGER_RISING,// set IRQF_TRIGGER_FALLING for falling, set IRQF_TRIGGER_RISING for rising + .iomux = { + .name = NULL, + }, + }, +}; + +static struct platform_device device_tcc_bt = { + .name = "tcc_bt_dev", + .id = -1, + .dev = { + .platform_data = &tcc_bt_platdata, + }, +}; +#endif + +static struct platform_device *devices[] __initdata = { + +#ifdef CONFIG_ION + &device_ion, +#endif +#ifdef CONFIG_WIFI_CONTROL_FUNC + &rk29sdk_wifi_device, +#endif + +#if defined(CONFIG_MT6620) + &mt3326_device_gps, +#endif + +#ifdef CONFIG_BATTERY_RK30_ADC_FAC + &rk30_device_adc_battery, +#endif +#ifdef CONFIG_RFKILL_RK + &device_rfkill_rk, +#endif +#ifdef CONFIG_GPS_RK + &rk_device_gps, +#endif +#ifdef CONFIG_MT5931_MT6622 + &device_mt6622, +#endif +#ifdef CONFIG_TCC_BT_DEV + &device_tcc_bt, +#endif +}; + + +static int rk_platform_add_display_devices(void) +{ + struct platform_device *fb = NULL; //fb + struct platform_device *lcdc0 = NULL; //lcdc0 + struct platform_device *lcdc1 = NULL; //lcdc1 + struct platform_device *bl = NULL; //backlight +#ifdef CONFIG_FB_ROCKCHIP + fb = &device_fb; +#endif + +#if defined(CONFIG_LCDC0_RK3066B) + lcdc0 = &device_lcdc0, +#endif + +#if defined(CONFIG_LCDC1_RK3066B) + lcdc1 = &device_lcdc1, +#endif + +#ifdef CONFIG_BACKLIGHT_RK29_BL + bl = &rk29_device_backlight, +#endif + __rk_platform_add_display_devices(fb,lcdc0,lcdc1,bl); + + return 0; + +} + +// i2c +#ifdef CONFIG_I2C0_RK30 +static struct i2c_board_info __initdata i2c0_info[] = { +#if defined (CONFIG_GS_MMA8452) + { + .type = "gs_mma8452", + .addr = 0x1d, + .flags = 0, + .irq = MMA8452_INT_PIN, + .platform_data = &mma8452_info, + }, +#endif +#if defined (CONFIG_COMPASS_AK8975) + { + .type = "ak8975", + .addr = 0x0d, + .flags = 0, + .irq = RK30_PIN3_PD7, + .platform_data = &akm8975_info, + .irq = RK30_PIN3_PD7, + .platform_data = &akm8975_info, + }, +#endif +#if defined (CONFIG_COMPASS_AK8963) + { + .type = "ak8963", + .addr = 0x0d, + .flags = 0, + .irq = RK30_PIN3_PD7, + .platform_data = &akm8963_info, + }, +#endif +#if defined (CONFIG_GYRO_L3G4200D) + { + .type = "l3g4200d_gryo", + .addr = 0x69, + .flags = 0, + .irq = L3G4200D_INT_PIN, + .platform_data = &l3g4200d_info, + }, +#endif +#if defined (CONFIG_SND_SOC_RK1000) + { + .type = "rk1000_i2c_codec", + .addr = 0x60, + .flags = 0, + }, + { + .type = "rk1000_control", + .addr = 0x40, + .flags = 0, + }, +#endif +#if defined (CONFIG_SND_SOC_RT5616) + { + .type = "rt5616", + .addr = 0x1b, + .flags = 0, + }, +#endif +}; +#endif + +int __sramdata g_pmic_type = 0; +#ifdef CONFIG_I2C1_RK30 +#ifdef CONFIG_REGULATOR_ACT8846 +#define PMU_POWER_SLEEP RK30_PIN0_PA1 +#define ACT8846_HOST_IRQ RK30_PIN0_PB3 + +static struct pmu_info act8846_dcdc_info[] = { + { + .name = "act_dcdc1", //ddr + .min_uv = 1200000, + .max_uv = 1200000, + #ifdef CONFIG_ACT8846_SUPPORT_RESET + .suspend_vol = 1200000, + #else + .suspend_vol = 900000, + #endif + }, + { + .name = "vdd_core", //logic + .min_uv = 1000000, + .max_uv = 1000000, + #ifdef CONFIG_ACT8846_SUPPORT_RESET + .suspend_vol = 1200000, + #else + .suspend_vol = 900000, + #endif + }, + { + .name = "vdd_cpu", //arm + .min_uv = 1000000, + .max_uv = 1000000, + #ifdef CONFIG_ACT8846_SUPPORT_RESET + .suspend_vol = 1200000, + #else + .suspend_vol = 900000, + #endif + }, + { + .name = "act_dcdc4", //vccio + .min_uv = 3000000, + .max_uv = 3000000, + #ifdef CONFIG_ACT8846_SUPPORT_RESET + .suspend_vol = 3000000, + #else + .suspend_vol = 2800000, + #endif + }, + +}; +static struct pmu_info act8846_ldo_info[] = { + { + .name = "act_ldo1", //vdd10 + .min_uv = 1000000, + .max_uv = 1000000, + }, + { + .name = "act_ldo2", //vdd12 + .min_uv = 1200000, + .max_uv = 1200000, + }, + { + .name = "act_ldo3", //vcc18_cif + .min_uv = 1800000, + .max_uv = 1800000, + }, + { + .name = "act_ldo4", //vcca33 + .min_uv = 3300000, + .max_uv = 3300000, + }, + { + .name = "act_ldo5", //vcctp + .min_uv = 3300000, + .max_uv = 3300000, + }, + { + .name = "act_ldo6", //vcc_jetta + .min_uv = 3300000, + .max_uv = 3300000, + }, + { + .name = "act_ldo7", //vcc18 + .min_uv = 1800000, + .max_uv = 1800000, + }, + { + .name = "act_ldo8", //vcc28_cif + .min_uv = 2800000, + .max_uv = 2800000, + }, + }; + +#include "board-pmu-act8846.c" +#endif + +#ifdef CONFIG_MFD_WM831X_I2C +#define PMU_POWER_SLEEP RK30_PIN0_PA1 + +static struct pmu_info wm8326_dcdc_info[] = { + { + .name = "vdd_core", //logic + .min_uv = 1000000, + .max_uv = 1000000, + .suspend_vol = 950000, + }, + { + .name = "vdd_cpu", //arm + .min_uv = 1000000, + .max_uv = 1000000, + .suspend_vol = 950000, + }, + { + .name = "dcdc3", //ddr + .min_uv = 1150000, + .max_uv = 1150000, + .suspend_vol = 1150000, + }, + #ifdef CONFIG_MACH_RK3066_SDK + { + .name = "dcdc4", //vcc_io + .min_uv = 3300000, + .max_uv = 3300000, + .suspend_vol = 3000000, + }, + #else + { + .name = "dcdc4", //vcc_io + .min_uv = 3000000, + .max_uv = 3000000, + .suspend_vol = 2800000, + }, + #endif +}; + +static struct pmu_info wm8326_ldo_info[] = { + { + .name = "ldo1", //vcc18_cif + .min_uv = 1800000, + .max_uv = 1800000, + .suspend_vol = 1800000, + }, + { + .name = "ldo2", //vccio_wl + .min_uv = 1800000, + .max_uv = 1800000, + .suspend_vol = 1800000, + }, + { + .name = "ldo3", // + .min_uv = 1100000, + .max_uv = 1100000, + .suspend_vol = 1100000, + }, + { + .name = "ldo4", //vdd11 + .min_uv = 1000000, + .max_uv = 1000000, + .suspend_vol = 1000000, + }, + { + .name = "ldo5", //vcc25 + .min_uv = 1800000, + .max_uv = 1800000, + .suspend_vol = 1800000, + }, + { + .name = "ldo6", //vcc33 + .min_uv = 3300000, + .max_uv = 3300000, + .suspend_vol = 3300000, + }, + { + .name = "ldo7", //vcc28_cif + .min_uv = 2800000, + .max_uv = 2800000, + .suspend_vol = 2800000, + }, + { + .name = "ldo8", //vcca33 + .min_uv = 3300000, + .max_uv = 3300000, + .suspend_vol = 3300000, + }, + { + .name = "ldo9", //vcc_tp + .min_uv = 3300000, + .max_uv = 3300000, + .suspend_vol = 3300000, + }, + { + .name = "ldo10", //flash_io + .min_uv = 1800000, + .max_uv = 1800000, + .suspend_vol = 1800000, + }, +}; + +#include "board-pmu-wm8326.c" +#endif + +#ifdef CONFIG_MFD_TPS65910 +#ifdef CONFIG_ARCH_RK3066B +#define TPS65910_HOST_IRQ RK30_PIN0_PB3 +#else +#define TPS65910_HOST_IRQ RK30_PIN6_PA4 +#endif + +#define PMU_POWER_SLEEP RK30_PIN0_PA1 + +static struct pmu_info tps65910_dcdc_info[] = { + { + .name = "vdd_core", //logic + .min_uv = 1200000, + .max_uv = 1200000, + }, + { + .name = "vdd_cpu", //arm + .min_uv = 1200000, + .max_uv = 1200000, + }, + { + .name = "vio", //vcc_io + .min_uv = 3000000, + .max_uv = 3000000, + }, + +}; +static struct pmu_info tps65910_ldo_info[] = { +/* { + .name = "vpll", //vdd10 + .min_uv = 1000000, + .max_uv = 1000000, + },*/ + { + .name = "vdig1", //vcc18_cif + .min_uv = 1800000, + .max_uv = 1800000, + }, +#ifdef CONFIG_MFD_RK616 + { + .name = "vdig2", //vdd11//1.0->1.2 for rk616 vdd_core lch + .min_uv = 1200000, + .max_uv = 1200000, + }, +#else + { + .name = "vdig2", //vdd11 + .min_uv = 1000000, + .max_uv = 1000000, + }, +#endif + { + .name = "vaux1", //vcc28_cif + .min_uv = 2800000, + .max_uv = 2800000, + }, + { + .name = "vaux2", //vcc33 + .min_uv = 3300000, + .max_uv = 3300000, + }, + { + .name = "vaux33", //vcc_tp + .min_uv = 3300000, + .max_uv = 3300000, + }, + { + .name = "vmmc", //vcca30 + .min_uv = 3000000, + .max_uv = 3000000, + }, + { + .name = "vdac", //vcc18 + .min_uv = 1800000, + .max_uv = 1800000, + }, + }; + +#include "board-pmu-tps65910.c" +#endif +#ifdef CONFIG_REGULATOR_ACT8931 +#define ACT8931_HOST_IRQ RK30_PIN0_PB5//depend on your hardware + + +#define ACT8931_CHGSEL_PIN RK30_PIN0_PD0 //depend on your hardware + + +static struct pmu_info act8931_dcdc_info[] = { + { + .name = "vdd_core", //vdd_logic + .min_uv = 1200000, + .max_uv = 1200000, + }, + { + .name = "act_dcdc2", //ddr + .min_uv = 1500000, + .max_uv = 1500000, + }, + { + .name = "vdd_cpu", //vdd_arm + .min_uv = 1200000, + .max_uv = 1200000, + }, + +}; +static struct pmu_info act8931_ldo_info[] = { + { + .name = "act_ldo1", //vcc28_cif + .min_uv = 2800000, + .max_uv = 2800000, + }, + { + .name = "act_ldo2", //vcc18_cif + .min_uv = 1800000, + .max_uv = 1800000, + }, + { + .name = "act_ldo3", //vcca30 + .min_uv = 3000000, + .max_uv = 3000000, + }, + { + .name = "act_ldo4", //vcc_wl + .min_uv = 3300000, + .max_uv = 3300000, + }, +}; +#include "board-rk30-sdk-act8931.c" +#endif + +static struct i2c_board_info __initdata i2c1_info[] = { +#if defined (CONFIG_REGULATOR_ACT8846) + { + .type = "act8846", + .addr = 0x5a, + .flags = 0, + .irq = ACT8846_HOST_IRQ, + .platform_data=&act8846_data, + }, +#endif +#if defined (CONFIG_RTC_HYM8563) + { + .type = "rtc_hym8563", + .addr = 0x51, + .flags = 0, + .irq = RK30_PIN0_PB5, + }, +#endif +#if defined (CONFIG_MFD_WM831X_I2C) + { + .type = "wm8326", + .addr = 0x34, + .flags = 0, + .irq = RK30_PIN0_PB3, + .platform_data = &wm831x_platdata, + }, +#endif +#if defined (CONFIG_MFD_TPS65910) + { + .type = "tps65910", + .addr = TPS65910_I2C_ID0, + .flags = 0, + .irq = TPS65910_HOST_IRQ, + .platform_data = &tps65910_data, + }, +#endif +#if defined (CONFIG_REGULATOR_ACT8931) + { + .type = "act8931", + .addr = 0x5b, + .flags = 0, + .irq = ACT8931_HOST_IRQ, + .platform_data=&act8931_data, + }, +#endif +}; +#endif + +void __sramfunc board_pmu_suspend(void) +{ + #if defined (CONFIG_REGULATOR_ACT8846) + if(pmic_is_act8846()) + board_pmu_act8846_suspend(); + #endif + #if defined (CONFIG_MFD_WM831X_I2C) + if(pmic_is_wm8326()) + board_pmu_wm8326_suspend(); + #endif + #if defined (CONFIG_MFD_TPS65910) + if(pmic_is_tps65910()) + board_pmu_tps65910_suspend(); + #endif +} + +void __sramfunc board_pmu_resume(void) +{ + #if defined (CONFIG_REGULATOR_ACT8846) + if(pmic_is_act8846()) + board_pmu_act8846_resume(); + #endif + #if defined (CONFIG_MFD_WM831X_I2C) + if(pmic_is_wm8326()) + board_pmu_wm8326_resume(); + #endif + #if defined (CONFIG_MFD_TPS65910) + if(pmic_is_tps65910()) + board_pmu_tps65910_resume(); + #endif +} + + int __sramdata gpio3d6_iomux,gpio3d6_do,gpio3d6_dir,gpio3d6_en; + +#define grf_readl(offset) readl_relaxed(RK30_GRF_BASE + offset) +#define grf_writel(v, offset) do { writel_relaxed(v, RK30_GRF_BASE + offset); dsb(); } while (0) + +void __sramfunc rk30_pwm_logic_suspend_voltage(void) +{ +#ifdef CONFIG_RK30_PWM_REGULATOR + +// int gpio0d7_iomux,gpio0d7_do,gpio0d7_dir,gpio0d7_en; + sram_udelay(10000); + gpio3d6_iomux = grf_readl(GRF_GPIO3D_IOMUX); + gpio3d6_do = grf_readl(GRF_GPIO3H_DO); + gpio3d6_dir = grf_readl(GRF_GPIO3H_DIR); + gpio3d6_en = grf_readl(GRF_GPIO3H_EN); + + grf_writel((1<<28), GRF_GPIO3D_IOMUX); + grf_writel((1<<30)|(1<<14), GRF_GPIO3H_DIR); + grf_writel((1<<30)|(1<<14), GRF_GPIO3H_DO); + grf_writel((1<<30)|(1<<14), GRF_GPIO3H_EN); +#endif +} +void __sramfunc rk30_pwm_logic_resume_voltage(void) +{ +#ifdef CONFIG_RK30_PWM_REGULATOR + grf_writel((1<<28)|gpio3d6_iomux, GRF_GPIO3D_IOMUX); + grf_writel((1<<30)|gpio3d6_en, GRF_GPIO3H_EN); + grf_writel((1<<30)|gpio3d6_dir, GRF_GPIO3H_DIR); + grf_writel((1<<30)|gpio3d6_do, GRF_GPIO3H_DO); + sram_udelay(10000); + +#endif + +} +extern void pwm_suspend_voltage(void); +extern void pwm_resume_voltage(void); +void rk30_pwm_suspend_voltage_set(void) +{ +#ifdef CONFIG_RK30_PWM_REGULATOR + pwm_suspend_voltage(); +#endif +} +void rk30_pwm_resume_voltage_set(void) +{ +#ifdef CONFIG_RK30_PWM_REGULATOR + pwm_resume_voltage(); +#endif +} + + +#ifdef CONFIG_I2C2_RK30 +static struct i2c_board_info __initdata i2c2_info[] = { +#if defined (CONFIG_CT36X_TS) + { + .type = CT36X_NAME, + .addr = 0x01, + .flags = 0, + .platform_data = &ct36x_info, + }, +#endif +#if defined (CONFIG_LS_CM3217) + { + .type = "lightsensor", + .addr = 0x10, + .flags = 0, + .platform_data = &cm3217_info, + }, +#endif +#if defined (CONFIG_TOUCHSCREEN_GSLX680) + { + .type = "gslX680", + .addr = 0x40, + .flags = 0, + .platform_data =&gslx680_info, + }, +#endif +#if defined(CONFIG_TOUCHSCREEN_GT82X_IIC) + { + .type = "Goodix-TS-82X", + .addr = 0x5D, + .flags = 0, + .irq = RK30_PIN1_PB7, + .platform_data = &ts82x_pdata, + }, +#endif +#if defined(CONFIG_HDMI_CAT66121) + { + .type = "cat66121_hdmi", + .addr = 0x4c, + .flags = 0, + .irq = RK30_PIN2_PD6, + .platform_data = &rk_hdmi_pdata, + }, +#endif +}; +#endif + +#ifdef CONFIG_I2C3_RK30 +static struct i2c_board_info __initdata i2c3_info[] = { +}; +#endif + +#ifdef CONFIG_I2C4_RK30 +static struct i2c_board_info __initdata i2c4_info[] = { +#ifdef CONFIG_MFD_RK610 + { + .type = "rk610_ctl", + .addr = 0x40, + .flags = 0, + .platform_data = &rk610_ctl_pdata, + }, +#ifdef CONFIG_RK610_TVOUT + { + .type = "rk610_tvout", + .addr = 0x42, + .flags = 0, + }, +#endif +#ifdef CONFIG_HDMI_RK610 + { + .type = "rk610_hdmi", + .addr = 0x46, + .flags = 0, + .irq = INVALID_GPIO, + }, +#endif +#ifdef CONFIG_SND_SOC_RK610 + {//RK610_CODEC addr from 0x60 to 0x80 (0x60~0x80) + .type = "rk610_i2c_codec", + .addr = 0x60, + .flags = 0, + .platform_data = &rk610_codec_pdata, + }, +#endif +#endif + +}; + +#if defined (CONFIG_SND_SOC_RT5616) + { + .type = "rt5616", + .addr = 0x1b, + .flags = 0, + }, +#endif +#endif + +#ifdef CONFIG_I2C_GPIO_RK30 +#define I2C_SDA_PIN INVALID_GPIO// RK30_PIN2_PD6 //set sda_pin here +#define I2C_SCL_PIN INVALID_GPIO//RK30_PIN2_PD7 //set scl_pin here +static int rk30_i2c_io_init(void) +{ + //set iomux (gpio) here + //rk30_mux_api_set(GPIO2D7_I2C1SCL_NAME, GPIO2D_GPIO2D7); + //rk30_mux_api_set(GPIO2D6_I2C1SDA_NAME, GPIO2D_GPIO2D6); + + return 0; +} +struct i2c_gpio_platform_data default_i2c_gpio_data = { + .sda_pin = I2C_SDA_PIN, + .scl_pin = I2C_SCL_PIN, + .udelay = 5, // clk = 500/udelay = 100Khz + .timeout = 100,//msecs_to_jiffies(100), + .bus_num = 5, + .io_init = rk30_i2c_io_init, +}; +static struct i2c_board_info __initdata i2c_gpio_info[] = { +}; +#endif + +static void __init rk30_i2c_register_board_info(void) +{ +#ifdef CONFIG_I2C0_RK30 + i2c_register_board_info(0, i2c0_info, ARRAY_SIZE(i2c0_info)); +#endif +#ifdef CONFIG_I2C1_RK30 + i2c_register_board_info(1, i2c1_info, ARRAY_SIZE(i2c1_info)); +#endif +#ifdef CONFIG_I2C2_RK30 + i2c_register_board_info(2, i2c2_info, ARRAY_SIZE(i2c2_info)); +#endif +#ifdef CONFIG_I2C3_RK30 + i2c_register_board_info(3, i2c3_info, ARRAY_SIZE(i2c3_info)); +#endif +#ifdef CONFIG_I2C4_RK30 + i2c_register_board_info(4, i2c4_info, ARRAY_SIZE(i2c4_info)); +#endif +#ifdef CONFIG_I2C_GPIO_RK30 + i2c_register_board_info(5, i2c_gpio_info, ARRAY_SIZE(i2c_gpio_info)); +#endif +} +//end of i2c +#define USB_INSERT_FAKE_SHUTDOWN +#if defined(USB_INSERT_FAKE_SHUTDOWN) +extern int rk30_pm_enter(suspend_state_t state); +int __sramdata charge_power_off = 0; + +static void rk30_charge_deal(void) +{ + struct regulator *ldo = NULL; + int ret; + charge_power_off = 1; + + //ldo = regulator_get(NULL, "ldo9"); // shutdown tp power + //regulator_disable(ldo); + //regulator_put(ldo); + //gpio_set_value(TOUCH_RESET_PIN, GPIO_LOW); + rk29_backlight_pwm_suspend();//shutdown backlight + rk_fb_io_disable(); //shutdown lcd + + local_irq_disable(); + local_fiq_disable(); + + rk30_pm_enter(PM_SUSPEND_MEM); + + if(charge_power_off == 1) + { + arm_pm_restart(0, NULL); + } +} +#else +static void rk30_charge_deal(void){ +} +#endif + + +#define POWER_ON_PIN RK30_PIN0_PA0 //power_hold +static void rk30_pm_power_off(void) +{ + printk(KERN_ERR "rk30_pm_power_off start...\n"); + gpio_direction_output(get_port_config(pwr_on).gpio, GPIO_LOW); + + if (pmic_is_tps65910()) { + printk("enter dcdet pmic_is_tps65910===========\n"); + if(gpio_get_value (get_port_config(dc_det).gpio) == GPIO_LOW) + { + printk("enter restart===========\n"); + arm_pm_restart(0, "charge"); + }else if(gpio_get_value (RK30_PIN0_PA7) == GPIO_LOW){//usb in + printk("debug: detect dc_det LOW, charging!\n"); + rk30_charge_deal(); + } + tps65910_device_shutdown(); + }else if(pmic_is_act8846()){ + printk("enter dcdet pmic_is_act8846===========\n"); + if(gpio_get_value (get_port_config(dc_det).gpio) == GPIO_LOW) + { + printk("enter restart===========\n"); + arm_pm_restart(0, "charge"); + } + act8846_device_shutdown(); + }else if(pmic_is_wm8326()){ + printk("enter dcdet pmic_is_wm8326===========\n"); + if(gpio_get_value (get_port_config(dc_det).gpio) == GPIO_LOW) + { + printk("enter restart===========\n"); + arm_pm_restart(0, "charge"); + } + wm831x_set_bits(Wm831x,WM831X_GPIO_LEVEL,0x0001,0x0000); //set sys_pwr 0 + wm831x_device_shutdown(Wm831x);//wm8326 shutdown + }else if(pmic_is_act8931()){ + printk("enter dcdet pmic_is_act8931===========\n"); + if(gpio_get_value (get_port_config(dc_det).gpio) == GPIO_LOW) + { + printk("enter restart===========\n"); + arm_pm_restart(0, "charge"); + } + act8931_device_shutdown(); + } + while (1); +} + +static int __init tp_board_init(void) +{ + int i; + struct port_config irq_port; + struct port_config rst_port; + int ret = check_tp_param(); + + if(ret < 0) + return ret; + + irq_port = get_port_config(tp_irq); + rst_port = get_port_config(tp_rst); +#if defined (CONFIG_TOUCHSCREEN_GSLX680_RK3168) + if(tp_type == TP_TYPE_GSLX680){ + gslx680_data.irq_pin = irq_port.gpio; + gslx680_info.addr = tp_addr; + gslx680_data.reset_pin= rst_port.gpio; + gslx680_data.x_max=tp_xmax; + gslx680_data.y_max=tp_ymax; + gslx680_data.firmVer=tp_firmVer; + i2c_register_board_info(tp_i2c, &gslx680_info, 1); + } +#endif + +#if defined (CONFIG_TOUCHSCREEN_86V_GT811_IIC) + if(tp_type == TP_TYPE_GT811_86V){ + gt811_data.irq_pin = irq_port.gpio; + gt811_info.addr = tp_addr; + gt811_data.reset_pin= rst_port.gpio; + gt811_data.x_max=tp_xmax; + gt811_data.y_max=tp_ymax; + i2c_register_board_info(tp_i2c, >811_info, 1); + } +#endif + return 0; +} + + +static int __init codec_board_init(void) +{ + struct port_config spk_port; + struct port_config hp_port; + struct port_config hdmi_irq_port; + int ret = check_codec_param(); + + if(ret < 0) + return ret; + + spk_port = get_port_config(spk_ctl); + hp_port = get_port_config(hp_det); + +#if defined (CONFIG_SND_RK29_SOC_RT5631) + if(codec_type == CODEC_TYPE_RT5631){ + rt5631_data.spk_pin = spk_port.gpio; + rt5631_info.addr = codec_addr; + rt5631_data.hp_pin= hp_port.gpio; + i2c_register_board_info(codec_i2c, &rt5631_info, 1); + } +#endif + +#if defined (CONFIG_SND_RK29_SOC_ES8323) + if(codec_type == CODEC_TYPE_ES8323){ + es8323_data.spk_pin = spk_port.gpio; + es8323_info.addr = codec_addr; + es8323_data.hp_pin= hp_port.gpio; + i2c_register_board_info(codec_i2c, &es8323_info, 1); + } +#endif + +#if defined (CONFIG_MFD_RK616) +if(codec_type == CODEC_TYPE_RK616){ + rk616_pdata.spk_ctl_gpio = spk_port.gpio; + rk616_info.addr = codec_addr; + rk616_pdata.hdmi_irq= get_port_config(codec_hdmi_irq).gpio; + i2c_register_board_info(codec_i2c, &rk616_info, 1); + } +#endif + return 0; +} + +static int __init chg_board_init(void) +{ + int i; + int ret = check_chg_param(); + if(ret < 0) + return ret; + //rk30_adc_battery_platdata.adc_channel = chg_adc; + if(dc_det != -1){ + rk30_adc_battery_platdata.dc_det_pin = get_port_config(dc_det).gpio; + printk("rk30_adc_battery_platdata.dc_det_pin %d %d",rk30_adc_battery_platdata.dc_det_pin,RK30_PIN0_PB2); + rk30_adc_battery_platdata.dc_det_level = !get_port_config(dc_det).io.active_low; + } + else{ + rk30_adc_battery_platdata.dc_det_pin=INVALID_GPIO; + } + if(bat_low != -1){ + rk30_adc_battery_platdata.batt_low_pin = get_port_config(bat_low).gpio; + rk30_adc_battery_platdata.batt_low_level = !get_port_config(bat_low).io.active_low; + } + else{ + rk30_adc_battery_platdata.batt_low_pin=INVALID_GPIO; + } + if(chg_ok != -1){ + rk30_adc_battery_platdata.charge_ok_pin = get_port_config(chg_ok).gpio; + rk30_adc_battery_platdata.charge_ok_level = !get_port_config(chg_ok).io.active_low; + } + else{ + rk30_adc_battery_platdata.charge_ok_pin=INVALID_GPIO; + } + if(chg_set != -1){ + rk30_adc_battery_platdata.charge_set_pin = get_port_config(chg_set).gpio; + rk30_adc_battery_platdata.charge_set_level = !get_port_config(chg_set).io.active_low; + } + else{ + rk30_adc_battery_platdata.charge_set_pin=INVALID_GPIO; + } + if(usb_det!= -1){ + rk30_adc_battery_platdata.usb_det_pin = get_port_config(chg_set).gpio; + rk30_adc_battery_platdata.usb_det_level = !get_port_config(chg_set).io.active_low; + } + else{ + rk30_adc_battery_platdata.usb_det_pin=INVALID_GPIO; + } + + if(ref_vol!= -1){ + rk30_adc_battery_platdata.reference_voltage=ref_vol; + } + + if(up_res!= -1){ + rk30_adc_battery_platdata.pull_up_res=up_res; + } + if(down_res!= -1){ + rk30_adc_battery_platdata.pull_down_res=down_res; + } + if(root_chg!= -1){ + rk30_adc_battery_platdata.is_reboot_charging=root_chg; + } + if(save_cap!= -1){ + rk30_adc_battery_platdata.save_capacity=save_cap; + } + if(low_vol!= -1){ + rk30_adc_battery_platdata.low_voltage_protection=low_vol; + } + + for(i=0;i<11;i++) + { + rk30_adc_battery_platdata.chargeArray[i]=bat_charge[i]; + rk30_adc_battery_platdata.dischargeArray[i]=bat_discharge[i]; + } + + return 0; +} + +static int __init gs_board_init(void) +{ + int i; + struct port_config port; + int ret = check_gs_param(); + if(ret < 0) + return ret; + port = get_port_config(gs_irq); +//mma7660 +#if defined (CONFIG_GS_MMA7660) + if(gs_type == GS_TYPE_MMA7660){ + + mma7660_info.irq = port.gpio; + mma7660_info.addr = gs_addr; + for(i = 0; i < 9; i++) + mma7660_data.orientation[i] = gs_orig[i]; + i2c_register_board_info(gs_i2c, &mma7660_info, 1); + } +#endif +#if defined (CONFIG_GS_MMA8452) + if(gs_type == GS_TYPE_MMA8452){ + mma8452_info.irq = port.gpio; + mma8452_info.addr = gs_addr; + for(i = 0; i < 9; i++) + mma8452_data.orientation[i] = gs_orig[i]; + i2c_register_board_info(gs_i2c, &mma8452_info, 1); + } +#endif + +#if defined (CONFIG_GS_LIS3DH) + if(gs_type == GS_TYPE_LIS3DH){ + lis3dh_info.irq = port.gpio; + lis3dh_info.addr = gs_addr; + for(i = 0; i < 9; i++) + lis3dh_data.orientation[i] = gs_orig[i]; + i2c_register_board_info(gs_i2c, &lis3dh_info, 1); + } +#endif + +#if defined (CONFIG_GS_MXC6225) + if(gs_type == GS_TYPE_MXC6225){ + mxc6225_info.irq = port.gpio; + mxc6225_info.addr = gs_addr; + for(i = 0; i < 9; i++) + mxc6225_data.orientation[i] = gs_orig[i]; + i2c_register_board_info(gs_i2c, &mxc6225_info, 1); + } +#endif + +#if defined (CONFIG_GS_DMT10) + if(gs_type == GS_TYPE_DMARAD10){ + dmt10_info.irq = port.gpio; + dmt10_info.addr = gs_addr; + for(i = 0; i < 9; i++) + dmt10_data.orientation[i] = gs_orig[i]; + i2c_register_board_info(gs_i2c, &dmt10_info, 1); + } +#endif + + + return 0; +} + +static int __init bl_board_init(void){ + int ret = check_bl_param(); + if(ret < 0) + return ret; + + switch(bl_pwmid) + { + case 0: + bl_pwm_mode = PWM0; + break; + case 1: + bl_pwm_mode = PWM1; + break; + case 2: + bl_pwm_mode = PWM2; + break; + case 3: + bl_pwm_mode = PWM3; + break; + } + + rk29_bl_info.pwm_id = bl_pwmid; + rk29_bl_info.brightness_mode=bl_mode; + rk29_bl_info.pre_div=bl_div; + rk29_bl_info.bl_ref = bl_ref; + rk29_bl_info.min_brightness=bl_min; + rk29_bl_info.max_brightness=bl_max; + + + return 0; +} + +static int __init lcd_board_init(void) +{ + return check_lcd_param(); +} + +static int __init key_board_init(void){ + int i; + struct port_config port; + for(i = 0; i < key_val_size; i++){ + if(key_val[i] & (1<<31)){ + key_button[i].adc_value = key_val[i] & 0xffff; + key_button[i].gpio = INVALID_GPIO; + }else{ + port = get_port_config(key_val[i]); + key_button[i].gpio = port.gpio; + key_button[i].active_low = port.io.active_low; + } + } + rk29_keys_pdata.nbuttons = key_val_size; + rk29_keys_pdata.chn = key_adc; + return 0; +} + +static int __init wifi_board_init(void) +{ + return check_wifi_param(); +} + + +static int __init rk_config_init(void) +{ + int ret = 0; + ret = lcd_board_init(); + if(ret < 0) + INIT_ERR("lcd"); + + ret = bl_board_init(); + if(ret < 0) + INIT_ERR("backlight"); + + ret = tp_board_init(); + if(ret < 0) + INIT_ERR("tp"); + + ret = gs_board_init(); + if(ret < 0) + INIT_ERR("gsensor"); + + ret = codec_board_init(); + if(ret < 0) + INIT_ERR("codec"); + + ret = key_board_init(); + if(ret < 0) + INIT_ERR("key"); + + ret = chg_board_init(); + if(ret < 0) + INIT_ERR("charge"); + + ret = wifi_board_init(); + if(ret < 0) + INIT_ERR("wifi"); + + return 0; +} + +static void __init rk_board_init(void) +{ + avs_init(); + rk_power_on(); + rk_config_init(); + + //pm_power_off = rk30_pm_power_off; + + rk30_i2c_register_board_info(); + spi_register_board_info(board_spi_devices, ARRAY_SIZE(board_spi_devices)); + platform_add_devices(devices, ARRAY_SIZE(devices)); + rk_platform_add_display_devices(); + board_usb_detect_init(RK30_PIN0_PA7); + +#ifdef CONFIG_WIFI_CONTROL_FUNC + rk29sdk_wifi_bt_gpio_control_init(); +#endif + +#if defined(CONFIG_MT6620) + clk_set_rate(clk_get_sys("rk_serial.1", "uart"), 48*1000000); +#endif + +#if defined(CONFIG_MT5931_MT6622) + clk_set_rate(clk_get_sys("rk_serial.0", "uart"), 24*1000000); +#endif + +} + +static void __init rk30_reserve(void) +{ +#ifdef CONFIG_ION + rk30_ion_pdata.heaps[0].base = board_mem_reserve_add("ion", ION_RESERVE_SIZE); +#endif + +#ifdef CONFIG_FB_ROCKCHIP + resource_fb[0].start = board_mem_reserve_add("fb0 buf", get_fb_size()); + resource_fb[0].end = resource_fb[0].start + get_fb_size()- 1; + #if 0 + resource_fb[1].start = board_mem_reserve_add("ipp buf", RK30_FB0_MEM_SIZE); + resource_fb[1].end = resource_fb[1].start + RK30_FB0_MEM_SIZE - 1; + #endif + + + #if defined(CONFIG_FB_ROTATE) || !defined(CONFIG_THREE_FB_BUFFER) + resource_fb[2].start = board_mem_reserve_add("fb2 buf",get_fb_size()); + resource_fb[2].end = resource_fb[2].start + get_fb_size() - 1; + #endif +#endif + + +#ifdef CONFIG_VIDEO_RK29 + rk30_camera_request_reserve_mem(); +#endif + +#ifdef CONFIG_GPS_RK + //it must be more than 8MB + rk_gps_info.u32MemoryPhyAddr = board_mem_reserve_add("gps", SZ_8M); +#endif + board_mem_reserved(); + +} + +/** + * dvfs_cpu_logic_table: table for arm and logic dvfs + * @frequency : arm frequency + * @cpu_volt : arm voltage depend on frequency + * @logic_volt : logic voltage arm requests depend on frequency + * comments : min arm/logic voltage + */ +#ifdef CONFIG_DVFS_WITH_UOC +//chenxing uoc +static struct cpufreq_frequency_table dvfs_arm_table[] = { + {.frequency = 312 * 1000, .index = 950 * 1000}, + {.frequency = 504 * 1000, .index = 1000 * 1000}, + {.frequency = 816 * 1000, .index = 1050 * 1000}, + {.frequency = 1008 * 1000, .index = 1125 * 1000}, + {.frequency = 1200 * 1000, .index = 1200 * 1000}, + {.frequency = CPUFREQ_TABLE_END}, +}; + +static struct cpufreq_frequency_table dvfs_gpu_table[] = { + {.frequency = 100 * 1000, .index = 1000 * 1000}, + {.frequency = 200 * 1000, .index = 1000 * 1000}, + {.frequency = 266 * 1000, .index = 1050 * 1000}, + //{.frequency = 300 * 1000, .index = 1050 * 1000}, + {.frequency = 400 * 1000, .index = 1125 * 1000}, + {.frequency = 600 * 1000, .index = 1250 * 1000}, + {.frequency = CPUFREQ_TABLE_END}, +}; + +static struct cpufreq_frequency_table dvfs_ddr_table[] = { + {.frequency = 200 * 1000 + DDR_FREQ_SUSPEND, .index = 1000 * 1000}, + {.frequency = 300 * 1000 + DDR_FREQ_VIDEO, .index = 1050 * 1000}, + {.frequency = 400 * 1000 + DDR_FREQ_NORMAL, .index = 1100 * 1000}, + {.frequency = CPUFREQ_TABLE_END}, +}; +#else +//chenliang +static struct cpufreq_frequency_table dvfs_arm_table[] = { + {.frequency = 312 * 1000, .index = 1025 * 1000}, + {.frequency = 504 * 1000, .index = 1025 * 1000}, + {.frequency = 816 * 1000, .index = 1050 * 1000}, + {.frequency = 1008 * 1000, .index = 1125 * 1000}, + {.frequency = 1200 * 1000, .index = 1200 * 1000}, + {.frequency = CPUFREQ_TABLE_END}, +}; + +static struct cpufreq_frequency_table dvfs_gpu_table[] = { + {.frequency = 100 * 1000, .index = 1000 * 1000}, + {.frequency = 200 * 1000, .index = 1000 * 1000}, + {.frequency = 266 * 1000, .index = 1050 * 1000}, + {.frequency = 300 * 1000, .index = 1050 * 1000}, + {.frequency = 400 * 1000, .index = 1125 * 1000}, + {.frequency = 600 * 1000, .index = 1250 * 1000}, + {.frequency = CPUFREQ_TABLE_END}, +}; + +static struct cpufreq_frequency_table dvfs_ddr_table[] = { + {.frequency = 200 * 1000 + DDR_FREQ_SUSPEND, .index = 1000 * 1000}, + {.frequency = 240 * 1000 + DDR_FREQ_VIDEO, .index = 1050 * 1000}, + {.frequency = 300 * 1000 + DDR_FREQ_NORMAL, .index = 1075 * 1000}, + {.frequency = CPUFREQ_TABLE_END}, +}; +#endif +//#define DVFS_CPU_TABLE_SIZE (ARRAY_SIZE(dvfs_cpu_logic_table)) +//static struct cpufreq_frequency_table cpu_dvfs_table[DVFS_CPU_TABLE_SIZE]; +//static struct cpufreq_frequency_table dep_cpu2core_table[DVFS_CPU_TABLE_SIZE]; +int get_max_freq(struct cpufreq_frequency_table *table) +{ + int i,temp=0; + + for(i=0;table[i].frequency!= CPUFREQ_TABLE_END;i++) + { + if(temp +#include + +#define BOARD_DEFAULT +//#define BOARD_RK3168_86V +//#define BOARD_RK3168_86V_RK616 + +#define INVALID_VALUE -1 +#define INVALID_GPIO -1 + + + +enum { + CODEC_TYPE_NONE = 0, + CODEC_TYPE_RT5631, + CODEC_TYPE_ES8323, + CODEC_TYPE_RK616, + CODEC_TYPE_MAX, +}; + +enum { + TP_TYPE_NONE = 0, + TP_TYPE_GSLX680, + TP_TYPE_GT811_86V, + TP_TYPE_MAX, +}; + +enum { + GS_TYPE_NONE = 0, + GS_TYPE_MMA7660, + GS_TYPE_LIS3DH, + GS_TYPE_MXC6225, + GS_TYPE_DMARAD10, + GS_TYPE_MAX, +}; + +enum { + WIFI_TYPE_NONE = 0, + WIFI_TYPE_RTL8188CU, + WIFI_TYPE_RTL8188EU, + WIFI_TYPE_MT7601, + WIFI_TYPE_RTL8188ETV, + WIFI_TYPE_MT5370, + WIFI_TYPE_MAX, +}; + + +enum { + OUT_TYPE_INDEX = 0, + OUT_FACE_INDEX, + LVDS_FORMAT_INDEX, + OUT_CLK_INDEX, + LCDC_ACLK_INDEX, + H_PW_INDEX, + H_BP_INDEX, + H_VD_INDEX, + H_FP_INDEX, + V_PW_INDEX, + V_BP_INDEX, + V_VD_INDEX, + V_FP_INDEX, + LCD_WIDTH_INDEX, + LCD_HEIGHT_INDEX, + DCLK_POL_INDEX, + SWAP_RB_INDEX, + LCD_PARAM_MAX, +}; + +#ifdef BOARD_DEFAULT +//////////////////////////////////////////////////////////// +/*system*/ +enum { + DEF_PWR_ON = -1, +}; +//////////////////////////////////////////////////////////// +/*lcd*/ +enum { + DEF_LCD_EN = -1, + DEF_LCD_CS = -1, + DEF_LCD_STD=-1, +}; + + +#define DEF_LCD_PARAM {SCREEN_RGB, OUT_P888, 0,\ + 50000000, 500000000, \ + 30, 10, 1024, 210, \ + 13, 10, 600, 22, \ + 154, 85, \ + 1, 0 } +////////////////////////////////////////////////////////////// +/* backlight */ + +enum{ + DEF_BL_EN = -1, + DEF_BL_PWMID =-1, + DEF_BL_PWM_MOD=-1, + DEF_BL_MOD = -1, + DEF_BL_DIV = -1, + DEF_BL_REF = -1, + DEF_BL_MIN = -1, + DEF_BL_MAX = -1, +}; +////////////////////////////////////////////////////////////// +/*tp*/ +enum { + DEF_TP_TYPE= -1, + DEF_TP_IRQ = -1, + DEF_TP_RST = -1, + DEF_TP_I2C = -1, + DEF_TP_ADDR = -1, + DEF_X_MAX = -1, + DEF_Y_MAX = -1, + DEF_FIRMVER = -1, +}; +////////////////////////////////////////////////////////////// +/*key*/ +enum{ + DEF_KEY_ADC = -1, + DEF_PLAY_KEY = -1, + DEF_VOLDN_KEY = -1, + DEF_VOLUP_KEY = -1, + DEF_MENU_KEY = -1, + DEF_ESC_KEY = -1, + DEF_HOME_KEY = -1, + //DEF_CAM_KEY = -1 + }; +////////////////////////////////////////////////////////////// +/* gsensor */ +enum { + DEF_GS_TYPE = -1, + DEF_GS_IRQ = -1, + DEF_GS_I2C = -1, + DEF_GS_ADDR = -1, + +}; +#define DEF_GS_ORIG {-1, 0, 0, 0, -1, 0, 0, 0, 1} +//////////////////////////////////////////////////////////////// +/* codec */ +enum { + DEF_CODEC_TYPE=-1, + DEF_CODEC_POWER=-1, + DEF_CODEC_RST=-1, + DEF_CODEC_HDMI_IRQ=-1, + DEF_SPK_CTL = -1, + DEF_HP_DET = -1, + DEF_CODEC_I2C= -1, + DEF_CODEC_ADDR=-1, +}; +///////////////////////////////////////////////////////////////// +/* charge */ +enum { + DEF_DC_DET = -1, + DEF_BAT_LOW = -1, + DEF_CHG_OK = -1, + DEF_CHG_SET = -1, + DEF_USB_DET = -1, + DEF_REF_VOL = -1, + DEF_UP_RES = -1, + DEF_DOWN_RES = -1, + DEF_ROOT_CHG = -1, + DEF_SAVE_CAP = -1, + DEF_LOW_VOL = -1, + DEF_NUM = 0, +}; +#define DEF_BAT_CHARGE {3600, 3700, 3760, 3810, 3870, 3910, 3960, 4020, 4080, 4130, 4180}; +#define DEF_BAT_DISCHARGE {3495, 3570, 3630, 3700, 3740, 3790, 3825, 3865, 3920, 3980, 4050} ; +////////////////////////////////////////////////////////////////// +/*wifi*/ +enum { + DEF_WIFI_TYPE = -1, + DEF_WIFI_POWER = -1, +}; +#endif + +#ifdef BOARD_RK3168_86V +//////////////////////////////////////////////////////////// +/*system*/ +enum { + DEF_PWR_ON = 0x000000a0, +}; +//////////////////////////////////////////////////////////// +/*lcd*/ +enum { + DEF_LCD_EN = 0x000100b0, + DEF_LCD_CS = 0x000003d4, + DEF_LCD_STD=0x000102c6, +}; + +#define DEF_LCD_PARAM {SCREEN_RGB, OUT_P888, 0,\ + 50000000, 500000000, \ + 30, 10, 1024, 210, \ + 13, 10, 600, 22, \ + 154, 85, \ + 0, 0 } + + +////////////////////////////////////////////////////////////// +/* backlight */ + +enum{ + DEF_BL_EN = 0x000000a2, + DEF_BL_PWMID = 3, + DEF_BL_PWM_MOD=PWM3, + DEF_BL_MOD = 1, + DEF_BL_DIV = 20*1000, + DEF_BL_REF = 0, + DEF_BL_MIN = 60, + DEF_BL_MAX = 255, +}; +////////////////////////////////////////////////////////////// +/*tp*/ +enum { + DEF_TP_TYPE= TP_TYPE_GSLX680, + DEF_TP_IRQ = 0x000001b7, + DEF_TP_RST = 0x000000b6, + DEF_TP_I2C = 2, + DEF_TP_ADDR = 0x40, + DEF_X_MAX = 1024, + DEF_Y_MAX = 600, + DEF_FIRMVER = 0, +}; +////////////////////////////////////////////////////////////// +/*key*/ +enum{ + DEF_KEY_ADC = 1, + DEF_PLAY_KEY = 0x000100a4, + DEF_VOLDN_KEY = 0x80000096, + DEF_VOLUP_KEY = 0x80000001, + DEF_MENU_KEY = 0x80000000, + DEF_ESC_KEY = 0x80000000, + DEF_HOME_KEY = 0x80000000, + }; +////////////////////////////////////////////////////////////// +/* gsensor */ +enum { + DEF_GS_TYPE = GS_TYPE_MXC6225, + DEF_GS_IRQ = 0x008000b7, + DEF_GS_I2C = 0, + DEF_GS_ADDR = 0x15, + +}; +#define DEF_GS_ORIG {-1, 0, 0, 0, -1, 0, 0, 0, 1} +//////////////////////////////////////////////////////////////// +/* codec */ +enum { + DEF_CODEC_TYPE=CODEC_TYPE_ES8323, + DEF_CODEC_POWER=-1, + DEF_CODEC_RST=-1, + DEF_CODEC_HDMI_IRQ=-1, + DEF_SPK_CTL = 0x000002d7, + DEF_HP_DET = 0x000000b5, + DEF_CODEC_I2C= 4, + DEF_CODEC_ADDR=0x10, +}; +///////////////////////////////////////////////////////////////// +/* charge */ +enum { + DEF_DC_DET = 0x000100b2, + DEF_BAT_LOW = INVALID_GPIO, + DEF_CHG_OK = 0x000000a6, + DEF_CHG_SET = INVALID_GPIO, + DEF_USB_DET = INVALID_GPIO, + DEF_REF_VOL = 1800, + DEF_UP_RES = 200, + DEF_DOWN_RES = 120, + DEF_ROOT_CHG = 1, + DEF_SAVE_CAP = 1, + DEF_LOW_VOL = 3600, + DEF_NUM = 0, +}; +#define DEF_BAT_CHARGE {3600, 3700, 3760, 3810, 3870, 3910, 3960, 4020, 4080, 4130, 4180}; +#define DEF_BAT_DISCHARGE {3495, 3570, 3630, 3700, 3740, 3790, 3825, 3865, 3920, 3980, 4050}; +////////////////////////////////////////////////////////////////// +/*wifi*/ +enum { + DEF_WIFI_TYPE = WIFI_TYPE_RTL8188EU, + DEF_WIFI_POWER = 0x000100d5, +}; +#endif + + + + + + + + +#ifdef BOARD_RK3168_86V_RK616 +//////////////////////////////////////////////////////////// +/*system*/ +enum { + DEF_PWR_ON = 0x000000a0, +}; +//////////////////////////////////////////////////////////// +/*lcd*/ +enum { + DEF_LCD_EN = 0x000100b0, + DEF_LCD_CS = 0x000003d4, + DEF_LCD_STD=0x000102c6, +}; +/* +#define DEF_LCD_PARAM {SCREEN_RGB, OUT_P888, \ + 50000000, 500000000, \ + 30, 10, 1024, 210, \ + 13, 10, 600, 22, \ + 154, 85, \ + 1, 0 } +*/ + +#define DEF_LCD_PARAM {SCREEN_RGB, OUT_P888,0, \ + 33000000, 150000000, \ + 1,88,800,40, \ + 3,29,480,13, \ + 154, 85, \ + 0, 0 } + +////////////////////////////////////////////////////////////// +/* backlight */ + +enum{ + DEF_BL_EN = 0x000000a2, + DEF_BL_PWMID = 3, + DEF_BL_PWM_MOD=PWM3, + DEF_BL_MOD = 1, + DEF_BL_DIV = 20*1000, + DEF_BL_REF = 0, + DEF_BL_MIN = 60, + DEF_BL_MAX = 255, +}; +////////////////////////////////////////////////////////////// +/*tp*/ +enum { + DEF_TP_TYPE= TP_TYPE_GSLX680, + DEF_TP_IRQ = 0x000001b7, + DEF_TP_RST = 0x000000b6, + DEF_TP_I2C = 2, + DEF_TP_ADDR = 0x40, + DEF_X_MAX = 1024, + DEF_Y_MAX = 600, + DEF_FIRMVER= 0, +}; +////////////////////////////////////////////////////////////// +/*key*/ +enum{ + DEF_KEY_ADC = 1, + DEF_PLAY_KEY = 0x000100a4, + DEF_VOLDN_KEY = 0x80000096, + DEF_VOLUP_KEY = 0x80000001, + DEF_MENU_KEY = 0x80000000, + DEF_ESC_KEY = 0x80000000, + DEF_HOME_KEY = 0x80000000, + }; +////////////////////////////////////////////////////////////// +/* gsensor */ +enum { + DEF_GS_TYPE = GS_TYPE_MMA7660, + DEF_GS_IRQ = 0x008000b7, + DEF_GS_I2C = 0, + DEF_GS_ADDR = 0x4c, + +}; +#define DEF_GS_ORIG {1, 0, 0, 0, -1, 0, 0, 0, 1} +//////////////////////////////////////////////////////////////// +/* codec */ +enum { + DEF_CODEC_TYPE=CODEC_TYPE_RK616, + DEF_CODEC_POWER=0x000000a3, + DEF_CODEC_RST=0x000003b2, + DEF_CODEC_HDMI_IRQ=0x000002d6, + DEF_SPK_CTL = 0x000002d7, + DEF_HP_DET = -1, + DEF_CODEC_I2C= 4, + DEF_CODEC_ADDR=0x50, +}; +///////////////////////////////////////////////////////////////// +/* charge */ +enum { + DEF_DC_DET = 0x000100b2, + DEF_BAT_LOW = INVALID_GPIO, + DEF_CHG_OK = 0x000000a6, + DEF_CHG_SET = INVALID_GPIO, + DEF_USB_DET = INVALID_GPIO, + DEF_REF_VOL = 1800, + DEF_UP_RES = 200, + DEF_DOWN_RES = 120, + DEF_ROOT_CHG = 1, + DEF_SAVE_CAP = 1, + DEF_LOW_VOL = 3600, + DEF_NUM = 0, +}; +#define DEF_BAT_CHARGE {3600, 3700, 3760, 3810, 3870, 3910, 3960, 4020, 4080, 4130, 4180}; +#define DEF_BAT_DISCHARGE {3495, 3570, 3630, 3700, 3740, 3790, 3825, 3865, 3920, 3980, 4050} ; +////////////////////////////////////////////////////////////////// +/*wifi*/ +enum { + DEF_WIFI_TYPE = WIFI_TYPE_RTL8188EU, + DEF_WIFI_POWER = 0x000100d5, +}; +#endif + +#endif + + + diff --git a/arch/arm/plat-rk/config.c b/arch/arm/plat-rk/config.c index d5cec84f7d8b..d3a0e8e7b82e 100644 --- a/arch/arm/plat-rk/config.c +++ b/arch/arm/plat-rk/config.c @@ -14,7 +14,11 @@ int port_output_init(unsigned int value, int on, char *name) gpio_pull_updown(port.gpio, 0); if(port.io.pull_mode == PULL_MODE_ENABLE) gpio_pull_updown(port.gpio, 1); - gpio_direction_output(port.gpio, (on)? !port.io.active_low: !!port.io.active_low); + #ifdef CONFIG_MACH_RK_FAC + //gpio_direction_output(port.gpio, (on)? !port.io.active_low: !!port.io.active_low); + #else + gpio_direction_output(port.gpio, (on)? !port.io.active_low: !!port.io.active_low); + #endif return 0; } diff --git a/arch/arm/plat-rk/include/plat/board.h b/arch/arm/plat-rk/include/plat/board.h index 45bd521e5de9..52dd95a18623 100755 --- a/arch/arm/plat-rk/include/plat/board.h +++ b/arch/arm/plat-rk/include/plat/board.h @@ -329,6 +329,9 @@ struct rk30_adc_battery_platform_data { int *charge_table; int *property_tabel; int *board_batt_table; + int chargeArray[11]; + int dischargeArray[11]; + }; @@ -353,6 +356,27 @@ struct goodix_platform_data { void (*exit_platform_hw)(void); }; +struct tp_platform_data { + int model; + int x_max; + int y_max; + int reset_pin; + int irq_pin ; + int firmVer; + int (*get_pendown_state)(void); + int (*init_platform_hw)(void); + int (*platform_sleep)(void); + int (*platform_wakeup)(void); + void (*exit_platform_hw)(void); +}; + + +struct codec_platform_data { + int spk_pin; + int hp_pin ; +}; + + struct ct360_platform_data { u16 model; u16 x_max; diff --git a/arch/arm/plat-rk/rk-sdmmc-wifi.c b/arch/arm/plat-rk/rk-sdmmc-wifi.c index 78eab446092c..bb45ecf75f2d 100644 --- a/arch/arm/plat-rk/rk-sdmmc-wifi.c +++ b/arch/arm/plat-rk/rk-sdmmc-wifi.c @@ -341,12 +341,17 @@ static int __init rk29sdk_wifi_bt_gpio_control_init(void) rk29sdk_init_wifi_mem(); rk29_mux_api_set(rk_platform_wifi_gpio.power_n.iomux.name, rk_platform_wifi_gpio.power_n.iomux.fgpio); +#ifdef CONFIG_MACH_RK_FAC + if(wifi_pwr!=-1) + port_output_init(wifi_pwr, 1, "wifi_pwr"); +#else if (rk_platform_wifi_gpio.power_n.io != INVALID_GPIO) { if (gpio_request(rk_platform_wifi_gpio.power_n.io, "wifi_power")) { pr_info("%s: request wifi power gpio failed\n", __func__); return -1; } } +#endif #ifdef RK30SDK_WIFI_GPIO_RESET_N if (rk_platform_wifi_gpio.reset_n.io != INVALID_GPIO) { @@ -358,8 +363,13 @@ static int __init rk29sdk_wifi_bt_gpio_control_init(void) } #endif - if (rk_platform_wifi_gpio.power_n.io != INVALID_GPIO) +#ifdef CONFIG_MACH_RK_FAC + if(wifi_pwr!=-1) + port_output_off(wifi_pwr); +#else + if (rk_platform_wifi_gpio.power_n.io != INVALID_GPIO) gpio_direction_output(rk_platform_wifi_gpio.power_n.io, !(rk_platform_wifi_gpio.power_n.enable) ); +#endif #ifdef RK30SDK_WIFI_GPIO_RESET_N if (rk_platform_wifi_gpio.reset_n.io != INVALID_GPIO) @@ -421,7 +431,12 @@ int rk29sdk_wifi_power(int on) { pr_info("%s: %d\n", __func__, on); if (on){ + #ifdef CONFIG_MACH_RK_FAC + if(wifi_pwr!=-1) + port_output_on(wifi_pwr); + #else gpio_set_value(rk_platform_wifi_gpio.power_n.io, rk_platform_wifi_gpio.power_n.enable); + #endif mdelay(50); #if defined(CONFIG_SDMMC1_RK29) && !defined(CONFIG_SDMMC_RK29_OLD) @@ -436,8 +451,12 @@ int rk29sdk_wifi_power(int on) pr_info("wifi turn on power\n"); }else{ // if (!rk29sdk_bt_power_state){ - gpio_set_value(rk_platform_wifi_gpio.power_n.io, !(rk_platform_wifi_gpio.power_n.enable)); - + #ifdef CONFIG_MACH_RK_FAC + if(wifi_pwr!=-1) + port_output_off(wifi_pwr); + #else + gpio_set_value(rk_platform_wifi_gpio.power_n.io, !(rk_platform_wifi_gpio.power_n.enable)); + #endif #if defined(CONFIG_SDMMC1_RK29) && !defined(CONFIG_SDMMC_RK29_OLD) rk29_sdmmc_gpio_open(1, 0); //added by xbw at 2011-10-13 #endif diff --git a/drivers/input/touchscreen/86v_gt811_ts.c b/drivers/input/touchscreen/86v_gt811_ts.c index 5e78b9533293..4698e1c1557f 100755 --- a/drivers/input/touchscreen/86v_gt811_ts.c +++ b/drivers/input/touchscreen/86v_gt811_ts.c @@ -700,7 +700,11 @@ static int goodix_ts_probe(struct i2c_client *client, const struct i2c_device_id const char irq_table[2] = {IRQF_TRIGGER_FALLING,IRQF_TRIGGER_RISING}; struct gt811_ts_data *ts; // struct gt811_platform_data *811data = client->dev.platform_data; +#ifdef CONFIG_MACH_RK_FAC + struct tp_platform_data *pdata; +#else struct gt811_platform_data *pdata; +#endif dev_info(&client->dev,"Install gt811 driver.\n"); dev_info(&client->dev,"Driver Release Date:2012-02-08\n"); diff --git a/drivers/input/touchscreen/rockchip_gslX680.c b/drivers/input/touchscreen/rockchip_gslX680.c index a7586976cb0f..7aec4abb1887 100755 --- a/drivers/input/touchscreen/rockchip_gslX680.c +++ b/drivers/input/touchscreen/rockchip_gslX680.c @@ -27,7 +27,7 @@ #include #include #include -#ifdef CONFIG_MACH_RK3168_86V +#if defined(CONFIG_MACH_RK3168_86V)||||defined(CONFIG_MACH_RK_FAC) #include #else #include "rockchip_gslX680.h" diff --git a/drivers/input/touchscreen/rockchip_gslX680_rk3168.c b/drivers/input/touchscreen/rockchip_gslX680_rk3168.c index 02f9b0132214..ae022f01152c 100755 --- a/drivers/input/touchscreen/rockchip_gslX680_rk3168.c +++ b/drivers/input/touchscreen/rockchip_gslX680_rk3168.c @@ -808,6 +808,9 @@ static void gsl_timer_handle(unsigned long data) static int gsl_ts_init_ts(struct i2c_client *client, struct gsl_ts *ts) { struct input_dev *input_device; +#ifdef CONFIG_MACH_RK_FAC + struct tp_platform_data *pdata = client->dev.platform_data; +#endif int i, rc = 0; printk("[GSLX680] Enter %s\n", __func__); @@ -861,9 +864,13 @@ static int gsl_ts_init_ts(struct i2c_client *client, struct gsl_ts *ts) set_bit(ABS_MT_POSITION_Y, input_device->absbit); set_bit(ABS_MT_TOUCH_MAJOR, input_device->absbit); set_bit(ABS_MT_WIDTH_MAJOR, input_device->absbit); - +#ifdef CONFIG_MACH_RK_FAC + input_set_abs_params(input_device,ABS_MT_POSITION_X, 0, pdata->x_max, 0, 0); + input_set_abs_params(input_device,ABS_MT_POSITION_Y, 0, pdata->y_max, 0, 0); +#else input_set_abs_params(input_device,ABS_MT_POSITION_X, 0, SCREEN_MAX_X, 0, 0); input_set_abs_params(input_device,ABS_MT_POSITION_Y, 0, SCREEN_MAX_Y, 0, 0); +#endif input_set_abs_params(input_device,ABS_MT_TOUCH_MAJOR, 0, PRESS_MAX, 0, 0); input_set_abs_params(input_device,ABS_MT_WIDTH_MAJOR, 0, 200, 0, 0); @@ -993,8 +1000,11 @@ static void gsl_ts_late_resume(struct early_suspend *h) static int __devinit gsl_ts_probe(struct i2c_client *client, const struct i2c_device_id *id) { - struct ts_hw_data *pdata = client->dev.platform_data; - + #ifdef CONFIG_MACH_RK_FAC + struct tp_platform_data *pdata = client->dev.platform_data; + #else + struct ts_hw_data *pdata = client->dev.platform_data; + #endif struct gsl_ts *ts; int rc; @@ -1012,9 +1022,14 @@ static int __devinit gsl_ts_probe(struct i2c_client *client, ts->client = client; ts->device_id = id->driver_data; +#ifdef CONFIG_MACH_RK_FAC + ts->reset_gpio = pdata->reset_pin; //lizhengwei + ts->irq= gpio_to_irq(pdata->irq_pin); //lizhengwei +#else ts->reset_gpio = pdata->reset_gpio; //lizhengwei ts->irq= gpio_to_irq(pdata->touch_en_gpio); //lizhengwei - + +#endif ts_global_reset_pin=ts->reset_gpio; i2c_set_clientdata(client, ts); diff --git a/drivers/net/wireless/wifi_sys/rkwifi_sys_iface.c b/drivers/net/wireless/wifi_sys/rkwifi_sys_iface.c index 2aece1f541e2..c36419b975bf 100755 --- a/drivers/net/wireless/wifi_sys/rkwifi_sys_iface.c +++ b/drivers/net/wireless/wifi_sys/rkwifi_sys_iface.c @@ -9,6 +9,10 @@ #include #include +#ifdef CONFIG_MACH_RK_FAC +#include +extern int wifi_type; +#endif #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 37)) static ssize_t wifi_chip_read(struct class *cls, struct class_attribute *attr, char *_buf) #else @@ -16,7 +20,32 @@ static ssize_t wifi_chip_read(struct class *cls, char *_buf) #endif { int count = 0; +#ifdef CONFIG_MACH_RK_CONFIG + if(wifi_type==WIFI_TYPE_RTL8188CU) + { + count = sprintf(_buf, "%s", "RTL8188CU"); + printk("Current WiFi chip is RTL8188CU.\n"); + }else if(wifi_type==WIFI_TYPE_RTL8188EU){ + count = sprintf(_buf, "%s", "RTL8188EU"); + printk("Current WiFi chip is RTL8188EU.\n"); + }else if(wifi_type==WIFI_TYPE_MT7601){ + count = sprintf(_buf, "%s", "MT7601"); + printk("Current WiFi chip is MT7601.\n"); + }else if(wifi_type==WIFI_TYPE_RTL8188ETV) + { + count = sprintf(_buf, "%s", "RTL8188ETV"); + printk("Current WiFi chip is RTL8188ETV.\n"); + }else if(wifi_type==WIFI_TYPE_MT5370) + { + count = sprintf(_buf, "%s", "MT5370"); + printk("Current WiFi chip is MT5370.\n"); + } + else + { + printk("NOT surpport type %d\n",wifi_type); + } +#else #ifdef CONFIG_BCM4329 count = sprintf(_buf, "%s", "BCM4329"); printk("Current WiFi chip is BCM4329.\n"); @@ -117,7 +146,7 @@ static ssize_t wifi_chip_read(struct class *cls, char *_buf) count = sprintf(_buf, "%s", "RTL8723AS"); printk("Current WiFi chip is RTL8723AS.\n"); #endif - +#endif return count; } diff --git a/drivers/power/rk30_factory_adc_battery.c b/drivers/power/rk30_factory_adc_battery.c index 9646c22cea93..f3913e4bfc2f 100644 --- a/drivers/power/rk30_factory_adc_battery.c +++ b/drivers/power/rk30_factory_adc_battery.c @@ -2093,6 +2093,14 @@ static int rk30_adc_battery_probe(struct platform_device *pdev) struct adc_client *client; struct rk30_adc_battery_data *data; struct rk30_adc_battery_platform_data *pdata = pdev->dev.platform_data; +#ifdef CONFIG_MACH_RK_FAC + int i; + for(i=0;ichargeArray[i]; + batt_table[BATT_NUM+6+i]=pdata->chargeArray[i]; + } +#endif gSecondsCnt = get_seconds(); data = kzalloc(sizeof(*data), GFP_KERNEL); if (data == NULL) { diff --git a/drivers/video/rockchip/hdmi/rk_hdmi_task.c b/drivers/video/rockchip/hdmi/rk_hdmi_task.c index a84c12bafbb6..55e4919b9a27 100755 --- a/drivers/video/rockchip/hdmi/rk_hdmi_task.c +++ b/drivers/video/rockchip/hdmi/rk_hdmi_task.c @@ -3,7 +3,19 @@ #include "rk_hdmi.h" #ifdef CONFIG_RK_HDMI_CTL_CODEC -extern void codec_set_spk(bool on); +#ifdef CONFIG_MACH_RK_FAC + #ifdef CONFIG_SND_RK29_SOC_ES8323 + extern void es8323_codec_set_spk(bool on); + #endif + #ifdef CONFIG_SND_RK29_SOC_RT5616 + extern void rt5616_codec_set_spk(bool on); + #endif + #ifdef CONFIG_SND_RK_SOC_RK616 + extern void rk616_codec_set_spk(bool on); + #endif +#else + extern void codec_set_spk(bool on); +#endif #endif #define HDMI_MAX_TRY_TIMES 1 @@ -88,7 +100,19 @@ void hdmi_sys_remove(void) switch_set_state(&(hdmi->switch_hdmi), 0); #endif #ifdef CONFIG_RK_HDMI_CTL_CODEC +#ifdef CONFIG_MACH_RK_FAC + #ifdef CONFIG_SND_RK29_SOC_ES8323 + es8323_codec_set_spk(1); + #endif + #ifdef CONFIG_SND_RK29_SOC_RT5616 + rt5616_codec_set_spk(1); + #endif + #ifdef CONFIG_SND_RK_SOC_RK616 + rk616_codec_set_spk(1); + #endif +#else codec_set_spk(1); +#endif #endif } @@ -229,7 +253,19 @@ void hdmi_work(struct work_struct *work) switch_set_state(&(hdmi->switch_hdmi), 1); #endif #ifdef CONFIG_RK_HDMI_CTL_CODEC - codec_set_spk(0); + #ifdef CONFIG_MACH_RK_FAC + #if defined(CONFIG_SND_RK29_SOC_ES8323) + es8323_codec_set_spk(0); + #endif + #if defined (CONFIG_SND_RK29_SOC_RT5616) + rt5616_codec_set_spk(0); + #endif + #if defined (CONFIG_SND_RK_SOC_RK616) + rk616_codec_set_spk(0); + #endif + #else + codec_set_spk(0); + #endif #endif } break; diff --git a/drivers/video/rockchip/screen/Kconfig b/drivers/video/rockchip/screen/Kconfig old mode 100644 new mode 100755 index abd9f2f6a487..ac08545bc105 --- a/drivers/video/rockchip/screen/Kconfig +++ b/drivers/video/rockchip/screen/Kconfig @@ -189,6 +189,8 @@ config LCD_LD089WU1_MIPI bool "mipi dsi lcd LD089WU1 1920X1200" config LCD_B080XAN02_MIPI bool "mipi dsi lcd B080XAN02 1024X768" +config LCD_RK3168_FAC + bool "RK3168 for factoryTool" endchoice diff --git a/drivers/video/rockchip/screen/Makefile b/drivers/video/rockchip/screen/Makefile index fcce6234747f..40248ecdb6fc 100644 --- a/drivers/video/rockchip/screen/Makefile +++ b/drivers/video/rockchip/screen/Makefile @@ -2,6 +2,7 @@ obj-$(CONFIG_LCD_NULL) += lcd_null.o obj-$(CONFIG_LCD_RK2928) += lcd_rk2928.o +obj-$(CONFIG_LCD_RK3168_FAC) += lcd_rk3168_fac.o obj-$(CONFIG_LCD_TD043MGEA1) += lcd_td043mgea1.o obj-$(CONFIG_LCD_HSD070IDW1) += lcd_hsd800x480.o obj-$(CONFIG_LCD_HL070VM4AU) += lcd_hl070vm4.o diff --git a/drivers/video/rockchip/screen/lcd_rk3168_fac.c b/drivers/video/rockchip/screen/lcd_rk3168_fac.c new file mode 100644 index 000000000000..23fef355de00 --- /dev/null +++ b/drivers/video/rockchip/screen/lcd_rk3168_fac.c @@ -0,0 +1,203 @@ +/* This Lcd Driver is HSD070IDW1 write by cst 2009.10.27 */ + +#ifndef __LCD_RK3168_FAC__ +#define __LCD_RK3168_FAC__ +/* Base */ + +#ifdef CONFIG_RK610_LVDS +#include "../transmitter/rk610_lcd.h" +#endif + +#define DEN_POL 0 +#define VSYNC_POL 0 +#define HSYNC_POL 0 + +#define SWAP_RB 0 +#define SWAP_RG 0 +#define SWAP_GB 0 + +int dsp_lut[256] ={ + 0x00000000, 0x00010101, 0x00020202, 0x00030303, 0x00040404, 0x00050505, 0x00060606, 0x00070707, + 0x00080808, 0x00090909, 0x000a0a0a, 0x000b0b0b, 0x000c0c0c, 0x000d0d0d, 0x000e0e0e, 0x000f0f0f, + 0x00101010, 0x00111111, 0x00121212, 0x00131313, 0x00141414, 0x00151515, 0x00161616, 0x00171717, + 0x00181818, 0x00191919, 0x001a1a1a, 0x001b1b1b, 0x001c1c1c, 0x001d1d1d, 0x001e1e1e, 0x001f1f1f, + 0x00202020, 0x00212121, 0x00222222, 0x00232323, 0x00242424, 0x00252525, 0x00262626, 0x00272727, + 0x00282828, 0x00292929, 0x002a2a2a, 0x002b2b2b, 0x002c2c2c, 0x002d2d2d, 0x002e2e2e, 0x002f2f2f, + 0x00303030, 0x00313131, 0x00323232, 0x00333333, 0x00343434, 0x00353535, 0x00363636, 0x00373737, + 0x00383838, 0x00393939, 0x003a3a3a, 0x003b3b3b, 0x003c3c3c, 0x003d3d3d, 0x003e3e3e, 0x003f3f3f, + 0x00404040, 0x00414141, 0x00424242, 0x00434343, 0x00444444, 0x00454545, 0x00464646, 0x00474747, + 0x00484848, 0x00494949, 0x004a4a4a, 0x004b4b4b, 0x004c4c4c, 0x004d4d4d, 0x004e4e4e, 0x004f4f4f, + 0x00505050, 0x00515151, 0x00525252, 0x00535353, 0x00545454, 0x00555555, 0x00565656, 0x00575757, + 0x00585858, 0x00595959, 0x005a5a5a, 0x005b5b5b, 0x005c5c5c, 0x005d5d5d, 0x005e5e5e, 0x005f5f5f, + 0x00606060, 0x00616161, 0x00626262, 0x00636363, 0x00646464, 0x00656565, 0x00666666, 0x00676767, + 0x00686868, 0x00696969, 0x006a6a6a, 0x006b6b6b, 0x006c6c6c, 0x006d6d6d, 0x006e6e6e, 0x006f6f6f, + 0x00707070, 0x00717171, 0x00727272, 0x00737373, 0x00747474, 0x00757575, 0x00767676, 0x00777777, + 0x00787878, 0x00797979, 0x007a7a7a, 0x007b7b7b, 0x007c7c7c, 0x007d7d7d, 0x007e7e7e, 0x007f7f7f, + 0x00808080, 0x00818181, 0x00828282, 0x00838383, 0x00848484, 0x00858585, 0x00868686, 0x00878787, + 0x00888888, 0x00898989, 0x008a8a8a, 0x008b8b8b, 0x008c8c8c, 0x008d8d8d, 0x008e8e8e, 0x008f8f8f, + 0x00909090, 0x00919191, 0x00929292, 0x00939393, 0x00949494, 0x00959595, 0x00969696, 0x00979797, + 0x00989898, 0x00999999, 0x009a9a9a, 0x009b9b9b, 0x009c9c9c, 0x009d9d9d, 0x009e9e9e, 0x009f9f9f, + 0x00a0a0a0, 0x00a1a1a1, 0x00a2a2a2, 0x00a3a3a3, 0x00a4a4a4, 0x00a5a5a5, 0x00a6a6a6, 0x00a7a7a7, + 0x00a8a8a8, 0x00a9a9a9, 0x00aaaaaa, 0x00ababab, 0x00acacac, 0x00adadad, 0x00aeaeae, 0x00afafaf, + 0x00b0b0b0, 0x00b1b1b1, 0x00b2b2b2, 0x00b3b3b3, 0x00b4b4b4, 0x00b5b5b5, 0x00b6b6b6, 0x00b7b7b7, + 0x00b8b8b8, 0x00b9b9b9, 0x00bababa, 0x00bbbbbb, 0x00bcbcbc, 0x00bdbdbd, 0x00bebebe, 0x00bfbfbf, + 0x00c0c0c0, 0x00c1c1c1, 0x00c2c2c2, 0x00c3c3c3, 0x00c4c4c4, 0x00c5c5c5, 0x00c6c6c6, 0x00c7c7c7, + 0x00c8c8c8, 0x00c9c9c9, 0x00cacaca, 0x00cbcbcb, 0x00cccccc, 0x00cdcdcd, 0x00cecece, 0x00cfcfcf, + 0x00d0d0d0, 0x00d1d1d1, 0x00d2d2d2, 0x00d3d3d3, 0x00d4d4d4, 0x00d5d5d5, 0x00d6d6d6, 0x00d7d7d7, + 0x00d8d8d8, 0x00d9d9d9, 0x00dadada, 0x00dbdbdb, 0x00dcdcdc, 0x00dddddd, 0x00dedede, 0x00dfdfdf, + 0x00e0e0e0, 0x00e1e1e1, 0x00e2e2e2, 0x00e3e3e3, 0x00e4e4e4, 0x00e5e5e5, 0x00e6e6e6, 0x00e7e7e7, + 0x00e8e8e8, 0x00e9e9e9, 0x00eaeaea, 0x00ebebeb, 0x00ececec, 0x00ededed, 0x00eeeeee, 0x00efefef, + 0x00f0f0f0, 0x00f1f1f1, 0x00f2f2f2, 0x00f3f3f3, 0x00f4f4f4, 0x00f5f5f5, 0x00f6f6f6, 0x00f7f7f7, + 0x00f8f8f8, 0x00f9f9f9, 0x00fafafa, 0x00fbfbfb, 0x00fcfcfc, 0x00fdfdfd, 0x00fefefe, 0x00ffffff, +}; + +#if defined(CONFIG_ONE_LCDC_DUAL_OUTPUT_INF)&& ( defined(CONFIG_RK610_LVDS) || defined(CONFIG_RK616_LVDS)) + +/* scaler Timing */ +//1920*1080*60 + +#define S_OUT_CLK SCALE_RATE(148500000,50625000) +#define S_H_PW 10 +#define S_H_BP 10 +#define S_H_VD 1024 +#define S_H_FP 306 + +#define S_V_PW 10 +#define S_V_BP 10 +#define S_V_VD 600 +#define S_V_FP 5 + +#define S_H_ST 0 +#define S_V_ST 5 + +#define S_PLL_CFG_VAL 0x01443013//0x01842016 +#define S_FRAC 0x4d9380//0xc16c2d +#define S_SCL_VST 0x00b//0x25 +#define S_SCL_HST 0x000//0x4ba +#define S_VIF_VST 0x1//0x1 +#define S_VIF_HST 0xca//0xca + +//1920*1080*50 +#define S1_OUT_CLK SCALE_RATE(148500000,45375000) +#define S1_H_PW 10 +#define S1_H_BP 10 +#define S1_H_VD 1024 +#define S1_H_FP 408 + +#define S1_V_PW 10 +#define S1_V_BP 10 +#define S1_V_VD 600 +#define S1_V_FP 5 + +#define S1_H_ST 0 +#define S1_V_ST 5 + +#define S1_PLL_CFG_VAL 0x01843013//0x01c42016 +#define S1_FRAC 0x4d9365//0x1f9ad4 +#define S1_SCL_VST 0x00a//0x25 +#define S1_SCL_HST 0xa4f//0x5ab +#define S1_VIF_VST 0x1//0x1 +#define S1_VIF_HST 0xca//0xca + + +//1280*720*60 +#define S2_OUT_CLK SCALE_RATE(74250000,50625000) +#define S2_H_PW 10 +#define S2_H_BP 10 +#define S2_H_VD 1024 +#define S2_H_FP 306 + +#define S2_V_PW 10 +#define S2_V_BP 10 +#define S2_V_VD 600 +#define S2_V_FP 5 + +#define S2_H_ST 0 +#define S2_V_ST 3 + + +//bellow are for jettaB +#define S2_PLL_CFG_VAL 0x01423013//0x01822016 +#define S2_FRAC 0x4d9380//0xc16c2d +#define S2_SCL_VST 0x008//0x19 +#define S2_SCL_HST 0x000//0x483 +#define S2_VIF_VST 0x1//0x1 +#define S2_VIF_HST 0xcf//0xcf + + +//1280*720*50 + +#define S3_OUT_CLK SCALE_RATE(74250000,44343750) +#define S3_H_PW 10 +#define S3_H_BP 10 +#define S3_H_VD 1024 +#define S3_H_FP 375 + +#define S3_V_PW 10 +#define S3_V_BP 10 +#define S3_V_VD 600 +#define S3_V_FP 3 + +#define S3_H_ST 0 +#define S3_V_ST 3 + +#define S3_PLL_CFG_VAL 0x01823013//0x01c22016 +#define S3_FRAC 0x4d9365//0x1f9ad4 +#define S3_SCL_VST 0x007//0x19 +#define S3_SCL_HST 0x7bb//0x569 +#define S3_VIF_VST 0x1//0x1 +#define S3_VIF_HST 0xcf//0xcf + + +//720*576*50 +#define S4_OUT_CLK SCALE_RATE(27000000,46875000) +#define S4_H_PW 10 +#define S4_H_BP 10 +#define S4_H_VD 1024 +#define S4_H_FP 396 + +#define S4_V_PW 10 +#define S4_V_BP 10 +#define S4_V_VD 600 +#define S4_V_FP 31 + +#define S4_H_ST 0 +#define S4_V_ST 28 + +#define S4_PLL_CFG_VAL 0x01c12015//0x01412016 +#define S4_FRAC 0x80f04c//0xa23d09 +#define S4_SCL_VST 0x01f//0x2d +#define S4_SCL_HST 0x2b3//0x33d +#define S4_VIF_VST 0x1//0x1 +#define S4_VIF_HST 0xc1//0xc1 + + +//720*480*60 +#define S5_OUT_CLK SCALE_RATE(27000000,56250000) //m=100 n=9 no=4 +#define S5_H_PW 10 +#define S5_H_BP 10 +#define S5_H_VD 1024 +#define S5_H_FP 386 + +#define S5_V_PW 10 +#define S5_V_BP 10 +#define S5_V_VD 600 +#define S5_V_FP 35 + +#define S5_H_ST 0 +#define S5_V_ST 22 + +#define S5_PLL_CFG_VAL 0x01812016//0x01c11013 +#define S5_FRAC 0x45d17b//0x25325e +#define S5_SCL_VST 0x01a//0x26 +#define S5_SCL_HST 0x359//0x2ae +#define S5_VIF_VST 0x1//0x1 +#define S5_VIF_HST 0xc1//0xc1 + + +#define S_DCLK_POL 1 + +#endif + +#endif + diff --git a/drivers/video/rockchip/screen/rk_screen.c b/drivers/video/rockchip/screen/rk_screen.c index d0c3975d2e53..63074f3d525a 100644 --- a/drivers/video/rockchip/screen/rk_screen.c +++ b/drivers/video/rockchip/screen/rk_screen.c @@ -4,8 +4,10 @@ #if defined(CONFIG_RK_HDMI) #include "../hdmi/rk_hdmi.h" #endif - - +#if defined(CONFIG_MACH_RK_FAC) +#include +extern uint lcd_param[LCD_PARAM_MAX]; +#endif @@ -194,6 +196,41 @@ void set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info ) #if defined(RK_USE_SCREEN_ID) set_lcd_info_by_id(screen,lcd_info); #else + #if defined(CONFIG_MACH_RK_FAC) + screen->type = lcd_param[OUT_TYPE_INDEX]; + screen->face = lcd_param[OUT_FACE_INDEX]; + screen->lvds_format = lcd_param[LVDS_FORMAT_INDEX]; //lvds data format + + + screen->x_res = lcd_param[H_VD_INDEX]; + screen->y_res = lcd_param[V_VD_INDEX]; + + screen->width = lcd_param[LCD_WIDTH_INDEX]; + screen->height = lcd_param[LCD_HEIGHT_INDEX]; + + + screen->lcdc_aclk = lcd_param[LCDC_ACLK_INDEX]; + screen->pixclock = lcd_param[OUT_CLK_INDEX]; + screen->left_margin = lcd_param[H_BP_INDEX]; + screen->right_margin = lcd_param[H_FP_INDEX]; + screen->hsync_len = lcd_param[H_PW_INDEX]; + screen->upper_margin = lcd_param[V_BP_INDEX]; + screen->lower_margin = lcd_param[V_FP_INDEX]; + screen->vsync_len = lcd_param[V_PW_INDEX]; + + + screen->pin_hsync = HSYNC_POL; //Pin polarity + screen->pin_vsync = VSYNC_POL; + screen->pin_den = DEN_POL; + screen->pin_dclk = lcd_param[DCLK_POL_INDEX]; + + + screen->swap_rb = lcd_param[SWAP_RB_INDEX]; + screen->swap_rg = SWAP_RG; + screen->swap_gb = SWAP_GB; + screen->swap_delta = 0; + screen->swap_dumy = 0; + #else screen->type = SCREEN_TYPE; screen->face = OUT_FACE; screen->lvds_format = LVDS_FORMAT; //lvds data format @@ -227,6 +264,7 @@ void set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info ) screen->swap_gb = SWAP_GB; screen->swap_delta = 0; screen->swap_dumy = 0; + #endif #if defined(CONFIG_MIPI_DSI) /* MIPI DSI */ @@ -265,6 +303,62 @@ void set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info ) } +#if defined(CONFIG_MACH_RK_FAC) +size_t get_fb_size(void) +{ + size_t size = 0; + char *pchar=NULL; + char lcdParam[]="lcd_param"; + char LcdWith[10]; + char LcdHigh[10]; + int mLcdWith,mLcdHigh; + int num=0,i; + int count=20; + pchar=strstr(boot_command_line,lcdParam); + memset(LcdWith,0,sizeof(char)*10); + memset(LcdHigh,0,sizeof(char)*10); + + if(pchar!=NULL) + { + do{ + if(count==14) + { + num=strcspn(pchar,","); + for(i=0;i0)&&(mLcdHigh>0)) + { + lcd_param[H_VD_INDEX]=mLcdWith; + lcd_param[V_VD_INDEX]=mLcdHigh; + } + #if defined(CONFIG_THREE_FB_BUFFER) + size = ((lcd_param[H_VD_INDEX])*(lcd_param[V_VD_INDEX])<<2)* 3; //three buffer + #else + size = ((lcd_param[H_VD_INDEX])*(lcd_param[V_VD_INDEX])<<2)<<1; //two buffer + #endif + return ALIGN(size,SZ_1M); +} +#else size_t get_fb_size(void) { size_t size = 0; @@ -275,3 +369,4 @@ size_t get_fb_size(void) #endif return ALIGN(size,SZ_1M); } +#endif diff --git a/sound/soc/codecs/es8323.c b/sound/soc/codecs/es8323.c index 1ae7bb15cc9f..cbbe3a911160 100755 --- a/sound/soc/codecs/es8323.c +++ b/sound/soc/codecs/es8323.c @@ -62,6 +62,9 @@ static bool last_is_spk = false; //#define SPK_CON RK29_PIN6_PB6 #undef SPK_CTL // #undef SPK_CON +#ifdef CONFIG_MACH_RK_FAC +int es8323_hdmi_ctrl=0; +#endif #define SPK_CON RK30_PIN2_PD7 //RK30_PIN4_PC5 #define HP_DET RK30_PIN0_PB5 static int HP_IRQ=0; @@ -1140,6 +1143,16 @@ static int es8323_remove(struct snd_soc_codec *codec) return 0; } +#ifdef CONFIG_MACH_RK_FAC +void es8323_codec_set_spk(bool on) +{ + if(es8323_hdmi_ctrl) + { + set_spk = on; + gpio_set_value(SPK_CON, on); + } +} +#else void codec_set_spk(bool on) { DBG("Enter::%s----%d--, on = %d\n",__FUNCTION__,__LINE__, on); @@ -1148,6 +1161,7 @@ void codec_set_spk(bool on) gpio_set_value(SPK_CON, on); //return; } +#endif static struct snd_soc_codec_driver soc_codec_dev_es8323 = { .probe = es8323_probe, @@ -1342,6 +1356,9 @@ static __devinit int es8323_i2c_probe(struct i2c_client *i2c, ret = device_create_file(es8323_dev, &dev_attr_es8323); if (ret < 0) printk("failed to add dev_attr_es8323 file\n"); + #ifdef CONFIG_MACH_RK_FAC + es8323_hdmi_ctrl=1; + #endif return ret; } diff --git a/sound/soc/codecs/rk616_codec.c b/sound/soc/codecs/rk616_codec.c index d9bbb037ce83..6659f1844931 100755 --- a/sound/soc/codecs/rk616_codec.c +++ b/sound/soc/codecs/rk616_codec.c @@ -44,6 +44,12 @@ #define SPKOUT_VOLUME 22 //0~31 #define HPOUT_VOLUME 21 //0~31 +#ifdef CONFIG_MACH_RK_FAC +//for factorytool + int rk616_hdmi_ctrl=0; +#endif + + struct rk616_codec_priv { struct snd_soc_codec *codec; @@ -551,7 +557,74 @@ bool get_hdmi_state(void) { return is_hdmi_in; } +#ifdef CONFIG_MACH_RK_FAC +void rk616_codec_set_spk(bool on) +{ + struct snd_soc_codec *codec = rk616_priv->codec; + DBG("%s : %s\n", __func__, on ? "enable spk" : "disable spk"); + + if(rk616_hdmi_ctrl) + { + + if (!rk616_priv || !rk616_priv->codec) { + printk("%s : rk616_priv or rk616_priv->codec is NULL\n", __func__); + return; + } + + if (on) { + if (rk616_for_mid) + { + snd_soc_update_bits(codec, RK616_SPKL_CTL, + RK616_MUTE, 0); + snd_soc_update_bits(codec, RK616_SPKR_CTL, + RK616_MUTE, 0); + snd_soc_update_bits(codec, RK616_HPL_CTL, + RK616_MUTE, 0); + snd_soc_update_bits(codec, RK616_HPR_CTL, + RK616_MUTE, 0); + } + else + { + snd_soc_dapm_enable_pin(&codec->dapm, "Headphone Jack"); + snd_soc_dapm_enable_pin(&codec->dapm, "Ext Spk"); + } + } else { + if (rk616_priv->spk_ctl_gpio != INVALID_GPIO) { + DBG("%s : set spk ctl gpio LOW\n", __func__); + gpio_set_value(rk616_priv->spk_ctl_gpio, GPIO_LOW); + } + + if (rk616_priv->hp_ctl_gpio != INVALID_GPIO) { + DBG("%s : set hp ctl gpio LOW\n", __func__); + gpio_set_value(rk616_priv->hp_ctl_gpio, GPIO_LOW); + snd_soc_write(codec, RK616_CLK_CHPUMP, 0x41); + } + + if (rk616_for_mid) + { + snd_soc_update_bits(codec, RK616_SPKL_CTL, + RK616_MUTE, RK616_MUTE); + snd_soc_update_bits(codec, RK616_SPKR_CTL, + RK616_MUTE, RK616_MUTE); + snd_soc_update_bits(codec, RK616_HPL_CTL, + RK616_MUTE, RK616_MUTE); + snd_soc_update_bits(codec, RK616_HPR_CTL, + RK616_MUTE, RK616_MUTE); + } + else + { + snd_soc_dapm_disable_pin(&codec->dapm, "Headphone Jack"); + snd_soc_dapm_disable_pin(&codec->dapm, "Ext Spk"); + } + } + snd_soc_dapm_sync(&codec->dapm); + + is_hdmi_in = on ? 0 : 1; + } +} +EXPORT_SYMBOL_GPL(rk616_codec_set_spk); +#else void codec_set_spk(bool on) { struct snd_soc_codec *codec = rk616_priv->codec; @@ -614,6 +687,7 @@ void codec_set_spk(bool on) is_hdmi_in = on ? 0 : 1; } EXPORT_SYMBOL_GPL(codec_set_spk); +#endif static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -3900, 150, 0); static const DECLARE_TLV_DB_SCALE(pga_vol_tlv, -1800, 150, 0); @@ -1968,7 +2042,11 @@ static int rk616_codec_power_up(int type) snd_soc_write(codec, playback_power_up_list[i].reg, playback_power_up_list[i].value); } - codec_set_spk(!get_hdmi_state()); + #ifdef CONFIG_MACH_RK_FAC + rk616_codec_set_spk(!get_hdmi_state()); + #else + codec_set_spk(!get_hdmi_state()); + #endif } else if (type == RK616_CODEC_CAPTURE) { for (i = 0; i < RK616_CODEC_CAPTURE_POWER_UP_LIST_LEN; i++) { snd_soc_write(codec, capture_power_up_list[i].reg, @@ -2323,6 +2401,10 @@ static int rk616_probe(struct snd_soc_codec *codec) codec->dapm.bias_level = SND_SOC_BIAS_OFF; rk616_set_bias_level(codec, SND_SOC_BIAS_STANDBY); } + + #ifdef CONFIG_MACH_RK_FAC + rk616_hdmi_ctrl=1; + #endif return 0; diff --git a/sound/soc/codecs/rt5631.c b/sound/soc/codecs/rt5631.c index 4cd004fa9450..d192bff6ee8c 100755 --- a/sound/soc/codecs/rt5631.c +++ b/sound/soc/codecs/rt5631.c @@ -60,6 +60,9 @@ struct work_struct spk_work; static int last_is_spk = -1; //bard 9-13 #endif +#ifdef CONFIG_MACH_RK_FAC + rt5631_hdmi_ctrl=0; +#endif static struct snd_soc_codec *rt5631_codec; struct delayed_work rt5631_delay_cap; //bard 7-16 EXPORT_SYMBOL(rt5631_delay_cap); //bard 7-16 @@ -2094,6 +2097,34 @@ static int rt5631_resume(struct snd_soc_codec *codec) return 0; } +#ifdef CONFIG_MACH_RK_FAC +void rt5631_codec_set_spk(bool on) +{ + struct snd_soc_codec *codec = rt5631_codec; + if(rt5631_hdmi_ctrl) + { + DBG("%s: %d\n", __func__, on); + + if(!codec) + return; + mutex_lock(&codec->mutex); + if(on){ + DBG("snd_soc_dapm_enable_pin\n"); + snd_soc_dapm_enable_pin(&codec->dapm, "Headphone Jack"); + snd_soc_dapm_enable_pin(&codec->dapm, "Ext Spk"); + } + else{ + DBG("snd_soc_dapm_disable_pin\n"); + snd_soc_dapm_disable_pin(&codec->dapm, "Headphone Jack"); + snd_soc_dapm_disable_pin(&codec->dapm, "Ext Spk"); + } + + snd_soc_dapm_sync(&codec->dapm); + mutex_unlock(&codec->mutex); + } + return; +} +#else void codec_set_spk(bool on) { struct snd_soc_codec *codec = rt5631_codec; @@ -2118,6 +2149,7 @@ void codec_set_spk(bool on) mutex_unlock(&codec->mutex); return; } +#endif /* * detect short current for mic1 @@ -2178,6 +2210,9 @@ static int rt5631_i2c_probe(struct i2c_client *i2c, rt5631_dai, ARRAY_SIZE(rt5631_dai)); if (ret < 0) kfree(rt5631); +#ifdef CONFIG_MACH_RK_FAC + rt5631_hdmi_ctrl=1; +#endif return ret; } diff --git a/sound/soc/rk29/rk29_es8323.c b/sound/soc/rk29/rk29_es8323.c index f8e66af06e04..2361c7582176 100755 --- a/sound/soc/rk29/rk29_es8323.c +++ b/sound/soc/rk29/rk29_es8323.c @@ -26,6 +26,10 @@ #include "rk29_i2s.h" #include +#ifdef CONFIG_MACH_RK_FAC +#include +extern int codec_type; +#endif #if 1 #define DBG(x...) printk(KERN_INFO x) @@ -190,6 +194,10 @@ static struct platform_device *rk29_snd_device; static int __init audio_card_init(void) { int ret =0; +#ifdef CONFIG_MACH_RK_FAC + if(codec_type!=CODEC_TYPE_ES8323) + return -1; +#endif DBG("ES8323 audio_card_init\n"); #if 0 extern int get_sound_card_exist() ; diff --git a/sound/soc/rk29/rk29_jetta_codec.c b/sound/soc/rk29/rk29_jetta_codec.c index 20238edfda83..5c26663b7062 100755 --- a/sound/soc/rk29/rk29_jetta_codec.c +++ b/sound/soc/rk29/rk29_jetta_codec.c @@ -22,6 +22,10 @@ #include "../codecs/rk610_codec.h" #include "rk29_pcm.h" #include "rk29_i2s.h" +#ifdef CONFIG_MACH_RK_FAC +#include +extern int codec_type; +#endif #if 0 #define DBG(x...) printk(KERN_ERR x) @@ -155,6 +159,10 @@ static struct platform_device *rk29_snd_device; static int __init audio_card_init(void) { int ret =0; +#ifdef CONFIG_MACH_RK_FAC + if(codec_type!=CODEC_TYPE_RK616) + return -1; +#endif DBG("Enter::%s----%d\n",__FUNCTION__,__LINE__); rk29_snd_device = platform_device_alloc("soc-audio", -1); if (!rk29_snd_device) { diff --git a/sound/soc/rk29/rk29_rt5631.c b/sound/soc/rk29/rk29_rt5631.c index 6ce4585f2d14..b5b87843390d 100755 --- a/sound/soc/rk29/rk29_rt5631.c +++ b/sound/soc/rk29/rk29_rt5631.c @@ -23,6 +23,10 @@ #include "rk29_pcm.h" #include "rk29_i2s.h" +#ifdef CONFIG_MACH_RK_FAC +#include +extern int codec_type; +#endif #if 0 #define DBG(x...) printk(KERN_INFO x) #else @@ -228,6 +232,10 @@ static int __init audio_card_init(void) { int ret =0; +#ifdef CONFIG_MACH_RK_FAC + if(codec_type!=CODEC_TYPE_RT5631) + return -1; +#endif DBG("Enter::%s----%d\n",__FUNCTION__,__LINE__); rk29_snd_device = platform_device_alloc("soc-audio", -1); if (!rk29_snd_device) {