From: Pete Cooper Date: Thu, 7 May 2015 21:48:26 +0000 (+0000) Subject: Clear kill flags in tail duplication. X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=e4eff4b23195596e3dc6d1ed8d10450557a36c2b;p=oota-llvm.git Clear kill flags in tail duplication. If we duplicate an instruction then we must also clear kill flags on any uses we rewrite. Otherwise we might be killing a register which was used in other BBs. For example, here the entry BB ended up with these instructions, the ADD having been tail duplicated. %vreg24 = t2ADDri %vreg10, 1, pred:14, pred:%noreg, opt:%noreg; GPRnopc:%vreg24 rGPR:%vreg10 %vreg22 = COPY %vreg10; GPR:%vreg22 rGPR:%vreg10 The copy here is inserted after the add and so needs vreg10 to be live. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236782 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/CodeGen/TailDuplication.cpp b/lib/CodeGen/TailDuplication.cpp index 04b39922627..23f41c8dd4b 100644 --- a/lib/CodeGen/TailDuplication.cpp +++ b/lib/CodeGen/TailDuplication.cpp @@ -449,6 +449,9 @@ void TailDuplicatePass::DuplicateInstruction(MachineInstr *MI, DenseMap::iterator VI = LocalVRMap.find(Reg); if (VI != LocalVRMap.end()) { MO.setReg(VI->second); + // Clear any kill flags from this operand. The new register could have + // uses after this one, so kills are not valid here. + MO.setIsKill(false); MRI->constrainRegClass(VI->second, MRI->getRegClass(Reg)); } } diff --git a/test/CodeGen/ARM/tail-dup-kill-flags.ll b/test/CodeGen/ARM/tail-dup-kill-flags.ll new file mode 100644 index 00000000000..bce6cdc4e28 --- /dev/null +++ b/test/CodeGen/ARM/tail-dup-kill-flags.ll @@ -0,0 +1,54 @@ +; RUN: llc %s -o - -fast-isel=true -O1 -verify-machineinstrs | FileCheck %s + +target datalayout = "e-m:o-p:32:32-f64:32:64-v64:32:64-v128:32:128-a:0:32-n32-S32" +target triple = "thumbv7-apple-ios8.0.0" + +; Tail duplication was incorrectly leaving kill flags on the duplicated instructions. +; The machine verifier is able to spot this error, so this test should pass if it passes verification. + +; CHECK-LABEL: @test + +%struct.cdiff_ctx = type { i8*, %struct.cdiff_node*, %struct.cdiff_node*, %struct.cdiff_node*, %struct.cdiff_node* } +%struct.cdiff_node = type { i32, i8*, i8*, %struct.cdiff_node* } + +declare i32 @logg(i32) + +define hidden i32 @test(%struct.cdiff_ctx* nocapture %ctx, %struct.cdiff_node* %tmp10) { +bb: + br label %.outer + +bb33: ; preds = %bb92, %.outer + %lines.0 = phi i32 [ %tmp37, %bb92 ], [ %lines.0.ph, %.outer ] + %tmp37 = add i32 %lines.0, 1 + %tmp39 = load i32, i32* %tmp57, align 4 + %tmp40 = icmp eq i32 %tmp39, %tmp37 + br i1 %tmp40, label %bb41, label %bb92 + +bb41: ; preds = %bb33 + %tmp45 = call i32 @strncmp() + %tmp46 = icmp eq i32 %tmp45, 0 + br i1 %tmp46, label %bb53, label %bb47 + +bb47: ; preds = %bb41 + %tmp52 = call i32 @logg(i32 %tmp37) + ret i32 -1 + +bb53: ; preds = %bb41 + %tmp54 = getelementptr inbounds %struct.cdiff_node, %struct.cdiff_node* %del.0.ph, i32 0, i32 3 + %tmp55 = load %struct.cdiff_node*, %struct.cdiff_node** %tmp54, align 4 + br label %.outer + +.outer: ; preds = %bb53, %bb + %del.0.ph = phi %struct.cdiff_node* [ %tmp55, %bb53 ], [ null, %bb ] + %lines.0.ph = phi i32 [ 1, %bb53 ], [ 0, %bb ] + %tmp57 = getelementptr inbounds %struct.cdiff_node, %struct.cdiff_node* %del.0.ph, i32 0, i32 0 + br label %bb33 + +bb92: ; preds = %bb33 + %tmp93 = call i32 @puts() + br label %bb33 +} + +declare i32 @strncmp() + +declare i32 @puts()