From: Jim Grosbach Date: Fri, 2 Dec 2011 22:57:57 +0000 (+0000) Subject: ARM VEXT tighten up operand classes a bit. X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=e40ab244c19ff73d086188526dbb81537f3af6c1;p=oota-llvm.git ARM VEXT tighten up operand classes a bit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145722 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/ARM/ARMInstrNEON.td b/lib/Target/ARM/ARMInstrNEON.td index fbd545c08c7..093204da0bd 100644 --- a/lib/Target/ARM/ARMInstrNEON.td +++ b/lib/Target/ARM/ARMInstrNEON.td @@ -5027,7 +5027,7 @@ def : AlignedVEXTq; class VEXTd : N3V<0,1,0b11,{?,?,?,?},0,0, (outs DPR:$Vd), - (ins DPR:$Vn, DPR:$Vm, i32imm:$index), NVExtFrm, + (ins DPR:$Vn, DPR:$Vm, imm0_7:$index), NVExtFrm, IIC_VEXTD, OpcodeStr, Dt, "$Vd, $Vn, $Vm, $index", "", [(set DPR:$Vd, (Ty (NEONvext (Ty DPR:$Vn), (Ty DPR:$Vm), imm:$index)))]> { @@ -5037,7 +5037,7 @@ class VEXTd class VEXTq : N3V<0,1,0b11,{?,?,?,?},1,0, (outs QPR:$Vd), - (ins QPR:$Vn, QPR:$Vm, i32imm:$index), NVExtFrm, + (ins QPR:$Vn, QPR:$Vm, imm0_15:$index), NVExtFrm, IIC_VEXTQ, OpcodeStr, Dt, "$Vd, $Vn, $Vm, $index", "", [(set QPR:$Vd, (Ty (NEONvext (Ty QPR:$Vn), (Ty QPR:$Vm), imm:$index)))]> {