From: Matt Beaumont-Gay Date: Tue, 9 Nov 2010 19:56:25 +0000 (+0000) Subject: Add a trivial virtual dtor to AbstractRegisterDescription to appease X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=e33daaaaf9d67f30b141430bffc34bbda93063d1;p=oota-llvm.git Add a trivial virtual dtor to AbstractRegisterDescription to appease -Wnon-virtual-dtor. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118616 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/CodeGen/LiveIntervalUnion.h b/lib/CodeGen/LiveIntervalUnion.h index f0bce470875..cb07653368a 100644 --- a/lib/CodeGen/LiveIntervalUnion.h +++ b/lib/CodeGen/LiveIntervalUnion.h @@ -66,6 +66,17 @@ inline bool overlap(const LiveRange &lvrSeg, const LiveSegment &liuSeg) { return lvrSeg.start < liuSeg.end && liuSeg.start < lvrSeg.end; } +template <> struct isPodLike { static const bool value = true; }; + +raw_ostream& operator<<(raw_ostream& os, const LiveSegment &ls); + +/// Abstraction to provide info for the representative register. +class AbstractRegisterDescription { +public: + virtual const char *getName(unsigned reg) const = 0; + virtual ~AbstractRegisterDescription() { } +}; + /// Union of live intervals that are strong candidates for coalescing into a /// single register (either physical or virtual depending on the context). We /// expect the constituent live intervals to be disjoint, although we may