From: hjc <hjc@rock-chips.com>
Date: Sat, 15 Mar 2014 06:37:03 +0000 (+0800)
Subject: fix rk3288 pinctrl compile error
X-Git-Tag: firefly_0821_release~6073
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=da75b041954bf87c1b6fcfc0db1a85dc5607f39c;p=firefly-linux-kernel-4.4.55.git

fix rk3288 pinctrl compile error
---

diff --git a/arch/arm/boot/dts/rk3288-pinctrl.dtsi b/arch/arm/boot/dts/rk3288-pinctrl.dtsi
index 180982eaeb3b..7c207f10a0f9 100755
--- a/arch/arm/boot/dts/rk3288-pinctrl.dtsi
+++ b/arch/arm/boot/dts/rk3288-pinctrl.dtsi
@@ -8,7 +8,7 @@
 		compatible = "rockchip,rk3288-pinctrl";
 		reg = <0xff770000 0x140>,
 		      <0xff770140 0x80>,
-		      <0xff7701c0 0x80>,
+		      <0xff7701c0 0x80>;
 		reg-names = "base", "pull", "drv";
 		#address-cells = <1>;
 		#size-cells = <1>;
@@ -17,9 +17,9 @@
 		gpio0: gpio0@ff750000 {
 			compatible = "rockchip,rk3288-gpio-bank0";
 			reg =	<0xff750000 0x100>,
-				<0xff730080 0x10>,
+					<0xff730080 0x10>,
 		      		<0xff730060 0x0c>,
-		      		<0xff73006c 0x0c>,
+					<0xff73006c 0x0c>;
 			reg-names = "base", "mux_bank0", "pull_bank0", "drv_bank0";
 			interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
 			//clocks = <&clk_gates8 9>;