From: Craig Topper <craig.topper@gmail.com>
Date: Sun, 5 Jan 2014 19:25:13 +0000 (+0000)
Subject: Remove opcode from MOV32r0 that I accidentally left when I converted it to Pseudo... 
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=d9ff6f10a17c0e5ddca0d0a470ada7517e4adcbe;p=oota-llvm.git

Remove opcode from MOV32r0 that I accidentally left when I converted it to Pseudo. Remove FIXME as well.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198564 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/X86InstrCompiler.td b/lib/Target/X86/X86InstrCompiler.td
index 6a6c31fbaf5..77ac8b354d7 100644
--- a/lib/Target/X86/X86InstrCompiler.td
+++ b/lib/Target/X86/X86InstrCompiler.td
@@ -220,10 +220,9 @@ def MORESTACK_RET_RESTORE_R10 : I<0, Pseudo, (outs), (ins),
 
 // Alias instruction mapping movr0 to xor.
 // FIXME: remove when we can teach regalloc that xor reg, reg is ok.
-// FIXME: Set encoding to pseudo.
 let Defs = [EFLAGS], isReMaterializable = 1, isAsCheapAsAMove = 1,
     isPseudo = 1 in
-def MOV32r0  : I<0x31, Pseudo, (outs GR32:$dst), (ins), "",
+def MOV32r0  : I<0, Pseudo, (outs GR32:$dst), (ins), "",
                  [(set GR32:$dst, 0)], IIC_ALU_NONMEM>, Sched<[WriteZero]>;
 
 // Other widths can also make use of the 32-bit xor, which may have a smaller