From: Akira Hatanaka <ahatanaka@mips.com>
Date: Sat, 7 Sep 2013 00:26:26 +0000 (+0000)
Subject: [mips] Place parentheses around && to silence warning.
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=d65d2fde4eadcb40e80b361e4cf244c02dcc670b;p=oota-llvm.git

[mips] Place parentheses around && to silence warning.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190234 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp b/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp
index 231d48520ef..26321c99243 100644
--- a/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp
+++ b/lib/Target/Mips/InstPrinter/MipsInstPrinter.cpp
@@ -232,9 +232,9 @@ bool MipsInstPrinter::printAlias(const MCInst &MI, raw_ostream &OS) {
   case Mips::BEQ:
     // beq $zero, $zero, $L2 => b $L2
     // beq $r0, $zero, $L2 => beqz $r0, $L2
-    return isReg<Mips::ZERO>(MI, 0) && isReg<Mips::ZERO>(MI, 1) &&
-           printAlias("b", MI, 2, OS) ||
-           isReg<Mips::ZERO>(MI, 1) && printAlias("beqz", MI, 0, 2, OS);
+    return (isReg<Mips::ZERO>(MI, 0) && isReg<Mips::ZERO>(MI, 1) &&
+            printAlias("b", MI, 2, OS)) ||
+           (isReg<Mips::ZERO>(MI, 1) && printAlias("beqz", MI, 0, 2, OS));
   case Mips::BEQ64:
     // beq $r0, $zero, $L2 => beqz $r0, $L2
     return isReg<Mips::ZERO_64>(MI, 1) && printAlias("beqz", MI, 0, 2, OS);