From: Evan Cheng Date: Wed, 18 May 2011 18:47:27 +0000 (+0000) Subject: Fix an ARMTargetLowering::LowerSELECT bug: legalized result must have same type as... X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=d48fda46f5b65f87e92a2bb94a722417bd5cc758;p=oota-llvm.git Fix an ARMTargetLowering::LowerSELECT bug: legalized result must have same type as input. Sorry test cases only trigger when dag combine is disabled. rdar://9449178 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131553 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index 67cb29362d8..ef399b65fbf 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -2697,7 +2697,9 @@ SDValue ARMTargetLowering::LowerSELECT(SDValue Op, SelectionDAG &DAG) const { SDValue ARMcc = Cond.getOperand(2); SDValue CCR = Cond.getOperand(3); SDValue Cmp = duplicateCmp(Cond.getOperand(4), DAG); - return DAG.getNode(ARMISD::CMOV, dl, VT, True, False, ARMcc, CCR, Cmp); + return DAG.getNode(ISD::BITCAST, dl, Op.getValueType(), + DAG.getNode(ARMISD::CMOV, dl, VT, True, False, + ARMcc, CCR, Cmp)); } } }