From: Chris Lattner Date: Sun, 11 Jul 2004 02:48:49 +0000 (+0000) Subject: Auto-registrate target X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=d36c970a11633414e56ac1e03010dafa4a63b9c4;p=oota-llvm.git Auto-registrate target git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@14745 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/CBackend/CBackend.cpp b/lib/Target/CBackend/CBackend.cpp index 1f6b9005979..2cdf30f0d60 100644 --- a/lib/Target/CBackend/CBackend.cpp +++ b/lib/Target/CBackend/CBackend.cpp @@ -27,6 +27,7 @@ #include "llvm/Analysis/LoopInfo.h" #include "llvm/CodeGen/IntrinsicLowering.h" #include "llvm/Transforms/Scalar.h" +#include "llvm/Target/TargetMachineRegistry.h" #include "llvm/Support/CallSite.h" #include "llvm/Support/CFG.h" #include "llvm/Support/GetElementPtrTypeIterator.h" @@ -40,6 +41,9 @@ using namespace llvm; namespace { + // Register the target. + RegisterTarget X("c", "C backend"); + /// NameAllUsedStructs - This pass inserts names for any unnamed structure /// types that are used by the program. /// diff --git a/lib/Target/CBackend/CTargetMachine.h b/lib/Target/CBackend/CTargetMachine.h index 97f880d2fd6..aa672fc6ca5 100644 --- a/lib/Target/CBackend/CTargetMachine.h +++ b/lib/Target/CBackend/CTargetMachine.h @@ -25,6 +25,9 @@ struct CTargetMachine : public TargetMachine { // This is the only thing that actually does anything here. virtual bool addPassesToEmitAssembly(PassManager &PM, std::ostream &Out); + + // This class always works, but shouldn't be the default in most cases. + static unsigned getModuleMatchQuality(const Module &M) { return 1; } }; } // End llvm namespace diff --git a/lib/Target/CBackend/Writer.cpp b/lib/Target/CBackend/Writer.cpp index 1f6b9005979..2cdf30f0d60 100644 --- a/lib/Target/CBackend/Writer.cpp +++ b/lib/Target/CBackend/Writer.cpp @@ -27,6 +27,7 @@ #include "llvm/Analysis/LoopInfo.h" #include "llvm/CodeGen/IntrinsicLowering.h" #include "llvm/Transforms/Scalar.h" +#include "llvm/Target/TargetMachineRegistry.h" #include "llvm/Support/CallSite.h" #include "llvm/Support/CFG.h" #include "llvm/Support/GetElementPtrTypeIterator.h" @@ -40,6 +41,9 @@ using namespace llvm; namespace { + // Register the target. + RegisterTarget X("c", "C backend"); + /// NameAllUsedStructs - This pass inserts names for any unnamed structure /// types that are used by the program. /// diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp index 035c31e7de4..1d6898a96cd 100644 --- a/lib/Target/PowerPC/PPCTargetMachine.cpp +++ b/lib/Target/PowerPC/PPCTargetMachine.cpp @@ -18,9 +18,16 @@ #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/Passes.h" #include "llvm/Target/TargetMachineImpls.h" +#include "llvm/Target/TargetMachineRegistry.h" #include "llvm/Transforms/Scalar.h" +#include using namespace llvm; +namespace { + // Register the target. + RegisterTarget X("powerpc", "PowerPC (experimental)"); +} + // allocatePowerPCTargetMachine - Allocate and return a subclass of // TargetMachine that implements the PowerPC backend. // diff --git a/lib/Target/PowerPC/PowerPCTargetMachine.cpp b/lib/Target/PowerPC/PowerPCTargetMachine.cpp index bf57b155013..7132e5de6d5 100644 --- a/lib/Target/PowerPC/PowerPCTargetMachine.cpp +++ b/lib/Target/PowerPC/PowerPCTargetMachine.cpp @@ -15,10 +15,16 @@ #include "llvm/Module.h" #include "llvm/PassManager.h" #include "llvm/Target/TargetMachineImpls.h" +#include "llvm/Target/TargetMachineRegistry.h" #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/Passes.h" using namespace llvm; +namespace { + // Register the target. + RegisterTarget X("powerpc", "PowerPC (experimental)"); +} + // allocatePowerPCTargetMachine - Allocate and return a subclass of // TargetMachine that implements the PowerPC backend. // diff --git a/lib/Target/Sparc/SparcTargetMachine.cpp b/lib/Target/Sparc/SparcTargetMachine.cpp index cdd902cf831..4a8a3947773 100644 --- a/lib/Target/Sparc/SparcTargetMachine.cpp +++ b/lib/Target/Sparc/SparcTargetMachine.cpp @@ -17,10 +17,16 @@ #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/Passes.h" #include "llvm/Target/TargetMachineImpls.h" +#include "llvm/Target/TargetMachineRegistry.h" #include "llvm/Transforms/Scalar.h" #include using namespace llvm; +namespace { + // Register the target. + RegisterTarget X("sparcv8", "SPARC V8 (experimental)"); +} + // allocateSparcV8TargetMachine - Allocate and return a subclass of // TargetMachine that implements the SparcV8 backend. // diff --git a/lib/Target/SparcV8/SparcV8TargetMachine.cpp b/lib/Target/SparcV8/SparcV8TargetMachine.cpp index cdd902cf831..4a8a3947773 100644 --- a/lib/Target/SparcV8/SparcV8TargetMachine.cpp +++ b/lib/Target/SparcV8/SparcV8TargetMachine.cpp @@ -17,10 +17,16 @@ #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/Passes.h" #include "llvm/Target/TargetMachineImpls.h" +#include "llvm/Target/TargetMachineRegistry.h" #include "llvm/Transforms/Scalar.h" #include using namespace llvm; +namespace { + // Register the target. + RegisterTarget X("sparcv8", "SPARC V8 (experimental)"); +} + // allocateSparcV8TargetMachine - Allocate and return a subclass of // TargetMachine that implements the SparcV8 backend. // diff --git a/lib/Target/SparcV9/SparcV9TargetMachine.cpp b/lib/Target/SparcV9/SparcV9TargetMachine.cpp index 78332e1f104..e114674eb0d 100644 --- a/lib/Target/SparcV9/SparcV9TargetMachine.cpp +++ b/lib/Target/SparcV9/SparcV9TargetMachine.cpp @@ -24,12 +24,12 @@ #include "llvm/CodeGen/MachineCodeForInstruction.h" #include "llvm/CodeGen/Passes.h" #include "llvm/Target/TargetMachineImpls.h" +#include "llvm/Target/TargetMachineRegistry.h" #include "llvm/Transforms/Scalar.h" #include "MappingInfo.h" #include "SparcV9Internals.h" #include "SparcV9TargetMachine.h" #include "Support/CommandLine.h" - using namespace llvm; static const unsigned ImplicitRegUseList[] = { 0 }; /* not used yet */ @@ -59,6 +59,28 @@ namespace { cl::opt DisableStrip("disable-strip", cl::desc("Do not strip the LLVM bytecode in executable")); + + // Register the target. + RegisterTarget X("sparcv9", "SPARC V9"); +} + +unsigned SparcV9TargetMachine::getJITMatchQuality() { +#if defined(sparc) || defined(__sparc__) || defined(__sparcv9) + return 10; +#else + return 0; +#endif +} + +unsigned SparcV9TargetMachine::getModuleMatchQuality(const Module &M) { + if (M.getEndianness() == Module::BigEndian && + M.getPointerSize() == Module::Pointer64) + return 10; // Direct match + else if (M.getEndianness() != Module::AnyEndianness || + M.getPointerSize() != Module::AnyPointerSize) + return 0; // Match for some other target + + return getJITMatchQuality()/2; } //===---------------------------------------------------------------------===// @@ -111,7 +133,8 @@ FunctionPass *llvm::createSparcV9MachineCodeDestructionPass() { } -SparcV9TargetMachine::SparcV9TargetMachine(IntrinsicLowering *il) +SparcV9TargetMachine::SparcV9TargetMachine(const Module &M, + IntrinsicLowering *il) : TargetMachine("UltraSparcV9-Native", il, false), schedInfo(*this), regInfo(*this), @@ -264,10 +287,11 @@ void SparcV9JITInfo::addPassesToJITCompile(FunctionPassManager &PM) { PM.add(createMachineFunctionPrinterPass(&std::cerr, "Final code:\n")); } -/// allocateSparcV9TargetMachine - Allocate and return a subclass of TargetMachine -/// that implements the SparcV9 backend. (the llvm/CodeGen/SparcV9.h interface) +/// allocateSparcV9TargetMachine - Allocate and return a subclass of +/// TargetMachine that implements the SparcV9 backend. (the +/// llvm/CodeGen/SparcV9.h interface) /// TargetMachine *llvm::allocateSparcV9TargetMachine(const Module &M, IntrinsicLowering *IL) { - return new SparcV9TargetMachine(IL); + return new SparcV9TargetMachine(M, IL); } diff --git a/lib/Target/SparcV9/SparcV9TargetMachine.h b/lib/Target/SparcV9/SparcV9TargetMachine.h index 65aa8b70bd8..4a1539c3642 100644 --- a/lib/Target/SparcV9/SparcV9TargetMachine.h +++ b/lib/Target/SparcV9/SparcV9TargetMachine.h @@ -32,7 +32,7 @@ class SparcV9TargetMachine : public TargetMachine { SparcV9FrameInfo frameInfo; SparcV9JITInfo jitInfo; public: - SparcV9TargetMachine(IntrinsicLowering *IL); + SparcV9TargetMachine(const Module &M, IntrinsicLowering *IL); virtual const TargetInstrInfo *getInstrInfo() const { return &instrInfo; } virtual const TargetSchedInfo *getSchedInfo() const { return &schedInfo; } @@ -46,6 +46,9 @@ public: virtual bool addPassesToEmitAssembly(PassManager &PM, std::ostream &Out); virtual bool addPassesToEmitMachineCode(FunctionPassManager &PM, MachineCodeEmitter &MCE); + + static unsigned getModuleMatchQuality(const Module &M); + static unsigned getJITMatchQuality(); }; } // End llvm namespace diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp index a2efb034f5f..3ee9dd292fe 100644 --- a/lib/Target/X86/X86TargetMachine.cpp +++ b/lib/Target/X86/X86TargetMachine.cpp @@ -19,6 +19,7 @@ #include "llvm/CodeGen/MachineFunction.h" #include "llvm/CodeGen/Passes.h" #include "llvm/Target/TargetMachineImpls.h" +#include "llvm/Target/TargetMachineRegistry.h" #include "llvm/Transforms/Scalar.h" #include "Support/CommandLine.h" #include "Support/Statistic.h" @@ -35,6 +36,9 @@ namespace { "when profiling the code generator.")); cl::opt NoSimpleISel("disable-simple-isel", cl::init(true), cl::desc("Use the hand coded 'simple' X86 instruction selector")); + + // Register the target. + RegisterTarget X("x86", "IA-32 (Pentium and above)"); } // allocateX86TargetMachine - Allocate and return a subclass of TargetMachine @@ -45,6 +49,24 @@ TargetMachine *llvm::allocateX86TargetMachine(const Module &M, return new X86TargetMachine(M, IL); } +unsigned X86TargetMachine::getJITMatchQuality() { +#if defined(i386) || defined(__i386__) || defined(__x86__) + return 10; +#else + return 0; +#endif +} + +unsigned X86TargetMachine::getModuleMatchQuality(const Module &M) { + if (M.getEndianness() == Module::LittleEndian && + M.getPointerSize() == Module::Pointer32) + return 10; // Direct match + else if (M.getEndianness() != Module::AnyEndianness || + M.getPointerSize() != Module::AnyPointerSize) + return 0; // Match for some other target + + return getJITMatchQuality()/2; +} /// X86TargetMachine ctor - Create an ILP32 architecture model /// diff --git a/lib/Target/X86/X86TargetMachine.h b/lib/Target/X86/X86TargetMachine.h index 88b91bdc4f1..717fdee0011 100644 --- a/lib/Target/X86/X86TargetMachine.h +++ b/lib/Target/X86/X86TargetMachine.h @@ -47,6 +47,9 @@ public: MachineCodeEmitter &MCE); virtual bool addPassesToEmitAssembly(PassManager &PM, std::ostream &Out); + + static unsigned getModuleMatchQuality(const Module &M); + static unsigned getJITMatchQuality(); }; // this is implemented in X86CodeEmitter.cpp