From: Misha Brukman Date: Wed, 20 Nov 2002 00:58:23 +0000 (+0000) Subject: Add mapping in MachineFunction from SSA regs to Register Classes. Also, X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=d2cc017f4672efad7b16b5c78031f50fe8c95794;p=oota-llvm.git Add mapping in MachineFunction from SSA regs to Register Classes. Also, uncovered a bug where registers were not being put in a map if they were not found... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@4776 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/X86/InstSelectSimple.cpp b/lib/Target/X86/InstSelectSimple.cpp index f0ffc679ed7..6ac3d0b5384 100644 --- a/lib/Target/X86/InstSelectSimple.cpp +++ b/lib/Target/X86/InstSelectSimple.cpp @@ -17,7 +17,11 @@ #include "llvm/Constants.h" #include "llvm/Pass.h" #include "llvm/CodeGen/MachineFunction.h" +#include "llvm/CodeGen/MachineInstrBuilder.h" +#include "llvm/Target/TargetMachine.h" #include "llvm/Support/InstVisitor.h" +#include "llvm/Target/MRegisterInfo.h" +#include using namespace MOTy; // Get Use, Def, UseAndDef @@ -105,8 +109,14 @@ namespace { unsigned getReg(Value &V) { return getReg(&V); } // Allow references unsigned getReg(Value *V) { unsigned &Reg = RegMap[V]; - if (Reg == 0) + if (Reg == 0) { Reg = CurReg++; + RegMap[V] = Reg; + + // Add the mapping of regnumber => reg class to MachineFunction + F->addRegMap(Reg, + TM.getRegisterInfo()->getRegClassForType(V->getType())); + } // If this operand is a constant, emit the code to copy the constant into // the register here... diff --git a/lib/Target/X86/X86ISelSimple.cpp b/lib/Target/X86/X86ISelSimple.cpp index f0ffc679ed7..6ac3d0b5384 100644 --- a/lib/Target/X86/X86ISelSimple.cpp +++ b/lib/Target/X86/X86ISelSimple.cpp @@ -17,7 +17,11 @@ #include "llvm/Constants.h" #include "llvm/Pass.h" #include "llvm/CodeGen/MachineFunction.h" +#include "llvm/CodeGen/MachineInstrBuilder.h" +#include "llvm/Target/TargetMachine.h" #include "llvm/Support/InstVisitor.h" +#include "llvm/Target/MRegisterInfo.h" +#include using namespace MOTy; // Get Use, Def, UseAndDef @@ -105,8 +109,14 @@ namespace { unsigned getReg(Value &V) { return getReg(&V); } // Allow references unsigned getReg(Value *V) { unsigned &Reg = RegMap[V]; - if (Reg == 0) + if (Reg == 0) { Reg = CurReg++; + RegMap[V] = Reg; + + // Add the mapping of regnumber => reg class to MachineFunction + F->addRegMap(Reg, + TM.getRegisterInfo()->getRegClassForType(V->getType())); + } // If this operand is a constant, emit the code to copy the constant into // the register here...