From: Chris Lattner Date: Fri, 7 Mar 2008 06:36:32 +0000 (+0000) Subject: mark frem as expand for all legal fp types on x86, regardless of whether X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=d1108222fd7b49d660fa63868cd2428fa1d49c17;p=oota-llvm.git mark frem as expand for all legal fp types on x86, regardless of whether we're using SSE or not. This fixes PR2122. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48006 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index d0d3f644583..22ddd832954 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -215,7 +215,9 @@ X86TargetLowering::X86TargetLowering(TargetMachine &TM) setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8 , Legal); setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1 , Expand); setOperationAction(ISD::FP_ROUND_INREG , MVT::f32 , Expand); + setOperationAction(ISD::FREM , MVT::f32 , Expand); setOperationAction(ISD::FREM , MVT::f64 , Expand); + setOperationAction(ISD::FREM , MVT::f80 , Expand); setOperationAction(ISD::FLT_ROUNDS_ , MVT::i32 , Custom); setOperationAction(ISD::CTPOP , MVT::i8 , Expand); @@ -358,10 +360,8 @@ X86TargetLowering::X86TargetLowering(TargetMachine &TM) // We don't support sin/cos/fmod setOperationAction(ISD::FSIN , MVT::f64, Expand); setOperationAction(ISD::FCOS , MVT::f64, Expand); - setOperationAction(ISD::FREM , MVT::f64, Expand); setOperationAction(ISD::FSIN , MVT::f32, Expand); setOperationAction(ISD::FCOS , MVT::f32, Expand); - setOperationAction(ISD::FREM , MVT::f32, Expand); // Expand FP immediates into loads from the stack, except for the special // cases we handle. @@ -398,7 +398,6 @@ X86TargetLowering::X86TargetLowering(TargetMachine &TM) // We don't support sin/cos/fmod setOperationAction(ISD::FSIN , MVT::f32, Expand); setOperationAction(ISD::FCOS , MVT::f32, Expand); - setOperationAction(ISD::FREM , MVT::f32, Expand); // Special cases we handle for FP constants. addLegalFPImmediate(APFloat(+0.0f)); // xorps diff --git a/test/CodeGen/X86/2008-03-06-frem-fpstack.ll b/test/CodeGen/X86/2008-03-06-frem-fpstack.ll new file mode 100644 index 00000000000..2d7182e733f --- /dev/null +++ b/test/CodeGen/X86/2008-03-06-frem-fpstack.ll @@ -0,0 +1,7 @@ +; RUN: llvm-as < %s | llc -march=x86 -mcpu=i386 +; PR2122 +define float @func(float %a, float %b) nounwind { +entry: + %tmp3 = frem float %a, %b ; [#uses=1] + ret float %tmp3 +}