From: Erik Gilling Date: Fri, 24 Sep 2010 00:00:28 +0000 (-0700) Subject: video: tegra: set output color depth on init/resume X-Git-Tag: firefly_0821_release~9833^2~204 X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=cd065982a89943bfe4aa7f7646da925a9a543976;p=firefly-linux-kernel-4.4.55.git video: tegra: set output color depth on init/resume Signed-off-by: Erik Gilling Change-Id: If7e0af98910c68cc53227990ab2970a934e3867c --- diff --git a/arch/arm/mach-tegra/include/mach/dc.h b/arch/arm/mach-tegra/include/mach/dc.h index 436a101ded2d..ae0273ca057d 100644 --- a/arch/arm/mach-tegra/include/mach/dc.h +++ b/arch/arm/mach-tegra/include/mach/dc.h @@ -57,6 +57,7 @@ struct tegra_dc_out { unsigned order; unsigned align; + unsigned depth; struct tegra_dc_mode *modes; int n_modes; diff --git a/drivers/video/tegra/dc/dc.c b/drivers/video/tegra/dc/dc.c index df9bbc68fb2f..b6a0b47533c6 100644 --- a/drivers/video/tegra/dc/dc.c +++ b/drivers/video/tegra/dc/dc.c @@ -694,6 +694,51 @@ static irqreturn_t tegra_dc_irq(int irq, void *ptr) return IRQ_HANDLED; } +static void tegra_dc_set_color_control(struct tegra_dc *dc) +{ + u32 color_control; + + switch (dc->out->depth) { + case 3: + color_control = BASE_COLOR_SIZE111; + break; + + case 6: + color_control = BASE_COLOR_SIZE222; + break; + + case 8: + color_control = BASE_COLOR_SIZE332; + break; + + case 9: + color_control = BASE_COLOR_SIZE333; + break; + + case 12: + color_control = BASE_COLOR_SIZE444; + break; + + case 15: + color_control = BASE_COLOR_SIZE555; + break; + + case 16: + color_control = BASE_COLOR_SIZE565; + break; + + case 18: + color_control = BASE_COLOR_SIZE666; + break; + + default: + color_control = BASE_COLOR_SIZE888; + break; + } + + tegra_dc_writel(dc, color_control, DC_DISP_DISP_COLOR_CONTROL); +} + static void tegra_dc_init(struct tegra_dc *dc) { tegra_dc_writel(dc, 0x00000100, DC_CMD_GENERAL_INCR_SYNCPT_CNTRL); @@ -711,6 +756,8 @@ static void tegra_dc_init(struct tegra_dc *dc) tegra_dc_writel(dc, 0x00000000, DC_DISP_BORDER_COLOR); + tegra_dc_set_color_control(dc); + if (dc->mode.pclk) tegra_dc_program_mode(dc, &dc->mode); }