From: Eric Christopher Date: Thu, 29 Jan 2015 23:27:45 +0000 (+0000) Subject: Get rid of a few calls through the subtarget to get the ABI X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=ca6d2a825c6f714ca200918859db08b40afb242b;p=oota-llvm.git Get rid of a few calls through the subtarget to get the ABI that's actually sitting on the target machine. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@227513 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/Mips/MipsAsmPrinter.cpp b/lib/Target/Mips/MipsAsmPrinter.cpp index 4f3729c7cb5..2ca992e9350 100644 --- a/lib/Target/Mips/MipsAsmPrinter.cpp +++ b/lib/Target/Mips/MipsAsmPrinter.cpp @@ -691,6 +691,7 @@ printRegisterList(const MachineInstr *MI, int opNum, raw_ostream &O) { void MipsAsmPrinter::EmitStartOfAsmFile(Module &M) { bool IsABICalls = Subtarget->isABICalls(); + const MipsABIInfo &ABI = static_cast(TM).getABI(); if (IsABICalls) { getTargetStreamer().emitDirectiveAbiCalls(); Reloc::Model RM = TM.getRelocationModel(); @@ -698,7 +699,7 @@ void MipsAsmPrinter::EmitStartOfAsmFile(Module &M) { // Ideally it should test for properties of the ABI and not the ABI // itself. // For the moment, I'm only correcting enough to make MIPS-IV work. - if (RM == Reloc::Static && !Subtarget->isABI_N64()) + if (RM == Reloc::Static && !ABI.IsN64()) getTargetStreamer().emitDirectiveOptionPic0(); } @@ -715,7 +716,7 @@ void MipsAsmPrinter::EmitStartOfAsmFile(Module &M) { // TODO: handle O64 ABI - if (Subtarget->isABI_EABI()) { + if (ABI.IsEABI()) { if (Subtarget->isGP32bit()) OutStreamer.SwitchSection(OutContext.getELFSection(".gcc_compiled_long32", ELF::SHT_PROGBITS, 0)); @@ -729,17 +730,15 @@ void MipsAsmPrinter::EmitStartOfAsmFile(Module &M) { // We should always emit a '.module fp=...' but binutils 2.24 does not accept // it. We therefore emit it when it contradicts the ABI defaults (-mfpxx or // -mfp64) and omit it otherwise. - if (Subtarget->isABI_O32() && (Subtarget->isABI_FPXX() || - Subtarget->isFP64bit())) + if (ABI.IsO32() && (Subtarget->isABI_FPXX() || Subtarget->isFP64bit())) getTargetStreamer().emitDirectiveModuleFP(); // We should always emit a '.module [no]oddspreg' but binutils 2.24 does not // accept it. We therefore emit it when it contradicts the default or an // option has changed the default (i.e. FPXX) and omit it otherwise. - if (Subtarget->isABI_O32() && (!Subtarget->useOddSPReg() || - Subtarget->isABI_FPXX())) + if (ABI.IsO32() && (!Subtarget->useOddSPReg() || Subtarget->isABI_FPXX())) getTargetStreamer().emitDirectiveModuleOddSPReg(Subtarget->useOddSPReg(), - Subtarget->isABI_O32()); + ABI.IsO32()); } void MipsAsmPrinter::emitInlineAsmStart( diff --git a/lib/Target/Mips/MipsFastISel.cpp b/lib/Target/Mips/MipsFastISel.cpp index edcaf5229ef..7c53095f03c 100644 --- a/lib/Target/Mips/MipsFastISel.cpp +++ b/lib/Target/Mips/MipsFastISel.cpp @@ -162,9 +162,10 @@ public: TII(*Subtarget->getInstrInfo()), TLI(*Subtarget->getTargetLowering()) { MFI = funcInfo.MF->getInfo(); Context = &funcInfo.Fn->getContext(); - TargetSupported = ((TM.getRelocationModel() == Reloc::PIC_) && - ((Subtarget->hasMips32r2() || Subtarget->hasMips32()) && - (Subtarget->isABI_O32()))); + TargetSupported = + ((TM.getRelocationModel() == Reloc::PIC_) && + ((Subtarget->hasMips32r2() || Subtarget->hasMips32()) && + (static_cast(TM).getABI().IsO32()))); UnsupportedFPMode = Subtarget->isFP64bit(); } diff --git a/lib/Target/Mips/MipsSEISelDAGToDAG.cpp b/lib/Target/Mips/MipsSEISelDAGToDAG.cpp index 0a45dc13abb..075b067ea24 100644 --- a/lib/Target/Mips/MipsSEISelDAGToDAG.cpp +++ b/lib/Target/Mips/MipsSEISelDAGToDAG.cpp @@ -134,13 +134,13 @@ void MipsSEDAGToDAGISel::initGlobalBaseReg(MachineFunction &MF) { DebugLoc DL = I != MBB.end() ? I->getDebugLoc() : DebugLoc(); unsigned V0, V1, GlobalBaseReg = MipsFI->getGlobalBaseReg(); const TargetRegisterClass *RC; - - RC = (Subtarget->isABI_N64()) ? &Mips::GPR64RegClass : &Mips::GPR32RegClass; + const MipsABIInfo &ABI = static_cast(TM).getABI(); + RC = (ABI.IsN64()) ? &Mips::GPR64RegClass : &Mips::GPR32RegClass; V0 = RegInfo.createVirtualRegister(RC); V1 = RegInfo.createVirtualRegister(RC); - if (Subtarget->isABI_N64()) { + if (ABI.IsN64()) { MF.getRegInfo().addLiveIn(Mips::T9_64); MBB.addLiveIn(Mips::T9_64); @@ -172,7 +172,7 @@ void MipsSEDAGToDAGISel::initGlobalBaseReg(MachineFunction &MF) { MF.getRegInfo().addLiveIn(Mips::T9); MBB.addLiveIn(Mips::T9); - if (Subtarget->isABI_N32()) { + if (ABI.IsN32()) { // lui $v0, %hi(%neg(%gp_rel(fname))) // addu $v1, $v0, $t9 // addiu $globalbasereg, $v1, %lo(%neg(%gp_rel(fname))) @@ -185,7 +185,7 @@ void MipsSEDAGToDAGISel::initGlobalBaseReg(MachineFunction &MF) { return; } - assert(Subtarget->isABI_O32()); + assert(ABI.IsO32()); // For O32 ABI, the following instruction sequence is emitted to initialize // the global base register: