From: Chris Lattner <sabre@nondot.org>
Date: Thu, 9 Apr 2009 23:33:34 +0000 (+0000)
Subject: ignore register zero in isRegTiedToUseOperand, following the example of
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=c30aa7b3de0ce8c37e9630e8e7a73cb83c808c62;p=oota-llvm.git

ignore register zero in isRegTiedToUseOperand, following the example of
isRegTiedToDefOperand.  Thanks to Bob for pointing this out!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68734 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp
index d3b2e9a91c8..a227f25190a 100644
--- a/lib/CodeGen/MachineInstr.cpp
+++ b/lib/CodeGen/MachineInstr.cpp
@@ -698,7 +698,7 @@ bool MachineInstr::isRegTiedToUseOperand(unsigned DefOpIdx, unsigned *UseOpIdx){
   if (getOpcode() == TargetInstrInfo::INLINEASM) {
     assert(DefOpIdx >= 2);
     const MachineOperand &MO = getOperand(DefOpIdx);
-    if (!MO.isReg() || !MO.isDef())
+    if (!MO.isReg() || !MO.isDef() || MO.getReg() == 0)
       return false;
     // Determine the actual operand no corresponding to this index.
     unsigned DefNo = 0;