From: Dan Gohman <gohman@apple.com>
Date: Thu, 14 Aug 2008 22:43:26 +0000 (+0000)
Subject: Don't try to use the insertps instruction for vector
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=c0573b13a119e1e504225542bddd85db7d4bd29f;p=oota-llvm.git

Don't try to use the insertps instruction for vector
element inserts with non-constant indices. This fixes
CodeGen/X86/vector-variable-idx.ll on machines that
have SSE4.1.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54801 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 57ed8b3122d..6b95034c02b 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -4153,7 +4153,7 @@ X86TargetLowering::LowerINSERT_VECTOR_ELT_SSE4(SDValue Op, SelectionDAG &DAG){
     if (N2.getValueType() != MVT::i32)
       N2 = DAG.getIntPtrConstant(cast<ConstantSDNode>(N2)->getValue());
     return DAG.getNode(Opc, VT, N0, N1, N2);
-  } else if (EVT == MVT::f32) {
+  } else if (EVT == MVT::f32 && isa<ConstantSDNode>(N2)) {
     // Bits [7:6] of the constant are the source select.  This will always be
     //  zero here.  The DAG Combiner may combine an extract_elt index into these
     //  bits.  For example (insert (extract, 3), 2) could be matched by putting