From: Akira Hatanaka <ahatanaka@mips.com>
Date: Wed, 7 Dec 2011 23:23:52 +0000 (+0000)
Subject: Add 64-bit HWR29 register.
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=be7b67368c3f7dec5a4b9cf512e4a2ceacb907cb;p=oota-llvm.git

Add 64-bit HWR29 register.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146099 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/Mips/MipsRegisterInfo.td b/lib/Target/Mips/MipsRegisterInfo.td
index 925ad9e70ab..c8cf7f2144c 100644
--- a/lib/Target/Mips/MipsRegisterInfo.td
+++ b/lib/Target/Mips/MipsRegisterInfo.td
@@ -239,6 +239,7 @@ let Namespace = "Mips" in {
 
   // Hardware register $29
   def HWR29 : Register<"29">;
+  def HWR29_64 : Register<"29">;
 }
 
 //===----------------------------------------------------------------------===//
@@ -301,3 +302,4 @@ def HILO64 : RegisterClass<"Mips", [i64], 64, (add HI64, LO64)> {
 
 // Hardware registers
 def HWRegs : RegisterClass<"Mips", [i32], 32, (add HWR29)>;
+def HWRegs64 : RegisterClass<"Mips", [i64], 32, (add HWR29_64)>;
\ No newline at end of file