From: Evan Cheng <evan.cheng@apple.com>
Date: Sat, 13 Sep 2008 01:38:29 +0000 (+0000)
Subject: Rely on instruction format to determine so_reg operand for now.
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=be3034c28893617d31e9ce7ed9ad2e128e92877b;p=oota-llvm.git

Rely on instruction format to determine so_reg operand for now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56181 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp
index 7abb7d2418b..1484d165e45 100644
--- a/lib/Target/ARM/ARMCodeEmitter.cpp
+++ b/lib/Target/ARM/ARMCodeEmitter.cpp
@@ -372,7 +372,11 @@ unsigned ARMCodeEmitter::getAddrMode1InstrBinary(const MachineInstr &MI,
   }
 
   // Encode shifter operand.
-  if (TID.getNumOperands() - OpIdx > 1)
+  bool HasSoReg = (Format == ARMII::DPRdSoReg ||
+                   Format == ARMII::DPRnSoReg ||
+                   Format == ARMII::DPRSoReg  ||
+                   Format == ARMII::DPRSoRegS);
+  if (HasSoReg)
     // Encode SoReg.
     return Binary | getMachineSoRegOpValue(MI, TID, OpIdx);