From: Evan Cheng <evan.cheng@apple.com>
Date: Fri, 25 Aug 2006 21:54:44 +0000 (+0000)
Subject: Encode pc-relative conditional branch offset as pc+(num of bytes / 4). The
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=b9ca92661cf145bfb3bd9705e5629fc5f411a42f;p=oota-llvm.git

Encode pc-relative conditional branch offset as pc+(num of bytes / 4). The
asm printer will print it as offset*4. e.g. bne cr0, $+8.

The PPC code emitter was expecting the offset to be number of instructions, not
number of bytes. This fixes a whole bunch of JIT failures.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29885 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/PowerPC/PPCAsmPrinter.cpp b/lib/Target/PowerPC/PPCAsmPrinter.cpp
index 58506820052..3939d6c357a 100644
--- a/lib/Target/PowerPC/PPCAsmPrinter.cpp
+++ b/lib/Target/PowerPC/PPCAsmPrinter.cpp
@@ -131,7 +131,7 @@ namespace {
       // Branches can take an immediate operand.  This is used by the branch
       // selection pass to print $+8, an eight byte displacement from the PC.
       if (MI->getOperand(OpNo).isImmediate()) {
-        O << "$+" << MI->getOperand(OpNo).getImmedValue();
+        O << "$+" << MI->getOperand(OpNo).getImmedValue()*4;
       } else {
         printOp(MI->getOperand(OpNo));
       }
diff --git a/lib/Target/PowerPC/PPCBranchSelector.cpp b/lib/Target/PowerPC/PPCBranchSelector.cpp
index b3d100cf5e5..78932a9a766 100644
--- a/lib/Target/PowerPC/PPCBranchSelector.cpp
+++ b/lib/Target/PowerPC/PPCBranchSelector.cpp
@@ -133,7 +133,7 @@ bool PPCBSel::runOnMachineFunction(MachineFunction &Fn) {
         if (Displacement >= -32768 && Displacement <= 32767) {
           BuildMI(*MBB, MBBJ, Opcode, 2).addReg(CRReg).addMBB(trueMBB);
         } else {
-          BuildMI(*MBB, MBBJ, Inverted, 2).addReg(CRReg).addImm(8);
+          BuildMI(*MBB, MBBJ, Inverted, 2).addReg(CRReg).addImm(2);
           BuildMI(*MBB, MBBJ, PPC::B, 1).addMBB(trueMBB);
         }