From: Duraid Madina <duraid@octopus.com.au>
Date: Fri, 4 Nov 2005 10:01:10 +0000 (+0000)
Subject: kill redundant SP/GP/RP save/restores across calls
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=b97cc990586a6e07269f079f456811d878c04914;p=oota-llvm.git

kill redundant SP/GP/RP save/restores across calls


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24183 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/IA64/IA64ISelLowering.cpp b/lib/Target/IA64/IA64ISelLowering.cpp
index 37f15eeb62c..d757496f1de 100644
--- a/lib/Target/IA64/IA64ISelLowering.cpp
+++ b/lib/Target/IA64/IA64ISelLowering.cpp
@@ -192,20 +192,21 @@ IA64TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) {
   VirtGPR = MF.getSSARegMap()->createVirtualRegister(getRegClassFor(MVT::i64));
   BuildMI(&BB, IA64::PSEUDO_ALLOC, 0, VirtGPR);
   // we create a PSEUDO_ALLOC (pseudo)instruction for now
-
+/*
   BuildMI(&BB, IA64::IDEF, 0, IA64::r1);
 
   // hmm:
   BuildMI(&BB, IA64::IDEF, 0, IA64::r12);
   BuildMI(&BB, IA64::IDEF, 0, IA64::rp);
   // ..hmm.
-
+  
   BuildMI(&BB, IA64::MOV, 1, GP).addReg(IA64::r1);
 
   // hmm:
   BuildMI(&BB, IA64::MOV, 1, SP).addReg(IA64::r12);
   BuildMI(&BB, IA64::MOV, 1, RP).addReg(IA64::rp);
   // ..hmm.
+*/
 
   unsigned tempOffset=0;