From: Matt Arsenault <Matthew.Arsenault@amd.com>
Date: Sun, 21 Sep 2014 17:27:32 +0000 (+0000)
Subject: Fix typo
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=b16c657c189c4e44c7da94e799085f527c969c48;p=oota-llvm.git

Fix typo

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218223 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/R600/SIShrinkInstructions.cpp b/lib/Target/R600/SIShrinkInstructions.cpp
index 821c0543495..5eaf4a54b4b 100644
--- a/lib/Target/R600/SIShrinkInstructions.cpp
+++ b/lib/Target/R600/SIShrinkInstructions.cpp
@@ -221,10 +221,9 @@ bool SIShrinkInstructions::runOnMachineFunction(MachineFunction &MF) {
           // vreg1 = VOPC;
           // S_AND_B64 vreg0, vreg1
           //
-          // So, instead of forcing the instruction to write to VCC, we provide a
-          // hint to the register allocator to use VCC and then we
-          // we will run this pass again after RA and shrink it if it outpus to
-          // VCC.
+          // So, instead of forcing the instruction to write to VCC, we provide
+          // a hint to the register allocator to use VCC and then we we will run
+          // this pass again after RA and shrink it if it outputs to VCC.
           MRI.setRegAllocationHint(MI.getOperand(0).getReg(), 0, AMDGPU::VCC);
           continue;
         }