From: Jakob Stoklund Olesen Date: Sun, 24 Jul 2011 20:23:50 +0000 (+0000) Subject: Correctly handle tied uses when rewriting after a split. X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=b09701db9e74298912164d988ddf40bb1b5ec19b;p=oota-llvm.git Correctly handle tied uses when rewriting after a split. This fixes PR10463. A two-address instruction with an use operand was incorrectly rewritten so the def and use no longer used the same register, violating the tie constraint. Fix this by always rewriting operands with the register a def operand would use. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135885 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/CodeGen/SplitKit.cpp b/lib/CodeGen/SplitKit.cpp index d607e37331a..46a43d8bd72 100644 --- a/lib/CodeGen/SplitKit.cpp +++ b/lib/CodeGen/SplitKit.cpp @@ -938,15 +938,11 @@ void SplitEditor::rewriteAssigned(bool ExtendRanges) { continue; } - // operands don't really read the register, so just assign them to - // the complement. - if (MO.isUse() && MO.isUndef()) { - MO.setReg(Edit->get(0)->reg); - continue; - } - + // operands don't really read the register, so it doesn't matter + // which register we choose. When the use operand is tied to a def, we must + // use the same register as the def, so just do that always. SlotIndex Idx = LIS.getInstructionIndex(MI); - if (MO.isDef()) + if (MO.isDef() || MO.isUndef()) Idx = MO.isEarlyClobber() ? Idx.getUseIndex() : Idx.getDefIndex(); // Rewrite to the mapped register at Idx. diff --git a/test/CodeGen/X86/crash.ll b/test/CodeGen/X86/crash.ll index b5b1ad45be0..db1e99967c9 100644 --- a/test/CodeGen/X86/crash.ll +++ b/test/CodeGen/X86/crash.ll @@ -316,3 +316,28 @@ declare void @_ZNSt6vectorIN4llvm11MachineMoveESaIS1_EE13_M_insert_auxEN9__gnu_c declare void @llvm.lifetime.start(i64, i8* nocapture) nounwind declare void @llvm.lifetime.end(i64, i8* nocapture) nounwind + +; PR10463 +; Spilling a virtual register with uses. +define void @autogen_239_1000() { +BB: + %Shuff = shufflevector <8 x double> undef, <8 x double> undef, <8 x i32> + br label %CF + +CF: + %B16 = frem <8 x double> zeroinitializer, %Shuff + %E19 = extractelement <8 x double> %Shuff, i32 5 + br i1 undef, label %CF, label %CF75 + +CF75: + br i1 undef, label %CF75, label %CF76 + +CF76: + store double %E19, double* undef + br i1 undef, label %CF76, label %CF77 + +CF77: + %B55 = fmul <8 x double> %B16, undef + br label %CF77 +} +