From: Chris Lattner Date: Mon, 15 Aug 2005 23:47:04 +0000 (+0000) Subject: Turn loop strength reduction on by default. X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=b0096bd19d6d519c8cc60c69c2658af6f1a2dbfd;p=oota-llvm.git Turn loop strength reduction on by default. Only run createLowerConstantExpressionsPass for the simple isel. The DAG isel has no need for it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22794 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp index cc530a6ea9a..e1f29ba5191 100644 --- a/lib/Target/PowerPC/PPCTargetMachine.cpp +++ b/lib/Target/PowerPC/PPCTargetMachine.cpp @@ -7,6 +7,7 @@ // //===----------------------------------------------------------------------===// // +// Top-level implementation for the PowerPC target. // //===----------------------------------------------------------------------===// @@ -28,9 +29,6 @@ #include using namespace llvm; -static cl::opt EnablePPCLSR("enable-lsr-for-ppc", cl::Hidden, - cl::desc("Enable LSR for PPC (beta)")); - namespace { const std::string PPC32ID = "PowerPC/32bit"; @@ -67,11 +65,9 @@ bool PowerPCTargetMachine::addPassesToEmitFile(PassManager &PM, CodeGenFileType FileType) { if (FileType != TargetMachine::AssemblyFile) return true; - if (EnablePPCLSR) { - PM.add(createLoopStrengthReducePass()); - PM.add(createVerifierPass()); - PM.add(createCFGSimplificationPass()); - } + // Run loop strength reduction before anything else. + PM.add(createLoopStrengthReducePass()); + PM.add(createCFGSimplificationPass()); // FIXME: Implement efficient support for garbage collection intrinsics. PM.add(createLowerGCPass()); @@ -82,15 +78,14 @@ bool PowerPCTargetMachine::addPassesToEmitFile(PassManager &PM, // FIXME: Implement the switch instruction in the instruction selector! PM.add(createLowerSwitchPass()); - PM.add(createLowerConstantExpressionsPass()); - // Make sure that no unreachable blocks are instruction selected. PM.add(createUnreachableBlockEliminationPass()); // Default to pattern ISel - if (PatternISelTriState == 0) + if (PatternISelTriState == 0) { + PM.add(createLowerConstantExpressionsPass()); PM.add(createPPC32ISelSimple(*this)); - else + } else PM.add(createPPC32ISelPattern(*this)); if (PrintMachineCode) @@ -126,10 +121,9 @@ void PowerPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) { // The JIT does not support or need PIC. PICEnabled = false; - if (EnablePPCLSR) { - PM.add(createLoopStrengthReducePass()); - PM.add(createCFGSimplificationPass()); - } + // Run loop strength reduction before anything else. + PM.add(createLoopStrengthReducePass()); + PM.add(createCFGSimplificationPass()); // FIXME: Implement efficient support for garbage collection intrinsics. PM.add(createLowerGCPass()); @@ -140,16 +134,16 @@ void PowerPCJITInfo::addPassesToJITCompile(FunctionPassManager &PM) { // FIXME: Implement the switch instruction in the instruction selector! PM.add(createLowerSwitchPass()); - PM.add(createLowerConstantExpressionsPass()); - // Make sure that no unreachable blocks are instruction selected. PM.add(createUnreachableBlockEliminationPass()); // Default to pattern ISel - if (PatternISelTriState == 0) + if (PatternISelTriState == 0) { + PM.add(createLowerConstantExpressionsPass()); PM.add(createPPC32ISelSimple(TM)); - else + } else { PM.add(createPPC32ISelPattern(TM)); + } PM.add(createRegisterAllocator()); PM.add(createPrologEpilogCodeInserter());