From: Akira Hatanaka Date: Thu, 2 Aug 2012 18:21:47 +0000 (+0000) Subject: Move the code that creates instances of MipsInstrInfo and MipsFrameLowering out X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=af2662606745bdebaa2cb43096274ce3d33b665f;p=oota-llvm.git Move the code that creates instances of MipsInstrInfo and MipsFrameLowering out of MipsTargetMachine.cpp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161191 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/Mips/Mips16FrameLowering.cpp b/lib/Target/Mips/Mips16FrameLowering.cpp index 3df7d5f9f1f..030042f2e83 100644 --- a/lib/Target/Mips/Mips16FrameLowering.cpp +++ b/lib/Target/Mips/Mips16FrameLowering.cpp @@ -80,3 +80,8 @@ void Mips16FrameLowering:: processFunctionBeforeCalleeSavedScan(MachineFunction &MF, RegScavenger *RS) const { } + +const MipsFrameLowering * +llvm::createMips16FrameLowering(const MipsSubtarget &ST) { + return new Mips16FrameLowering(ST); +} diff --git a/lib/Target/Mips/Mips16InstrInfo.cpp b/lib/Target/Mips/Mips16InstrInfo.cpp index 59926b5b54c..2bc286b6bb1 100644 --- a/lib/Target/Mips/Mips16InstrInfo.cpp +++ b/lib/Target/Mips/Mips16InstrInfo.cpp @@ -126,3 +126,7 @@ void Mips16InstrInfo::ExpandRetRA16(MachineBasicBlock &MBB, unsigned Opc) const { BuildMI(MBB, I, I->getDebugLoc(), get(Opc)); } + +const MipsInstrInfo *llvm::createMips16InstrInfo(MipsTargetMachine &TM) { + return new Mips16InstrInfo(TM); +} diff --git a/lib/Target/Mips/MipsFrameLowering.cpp b/lib/Target/Mips/MipsFrameLowering.cpp index f2ee41d00e4..8c0474b0eec 100644 --- a/lib/Target/Mips/MipsFrameLowering.cpp +++ b/lib/Target/Mips/MipsFrameLowering.cpp @@ -15,6 +15,7 @@ #include "MipsAnalyzeImmediate.h" #include "MipsInstrInfo.h" #include "MipsMachineFunction.h" +#include "MipsTargetMachine.h" #include "MCTargetDesc/MipsBaseInfo.h" #include "llvm/Function.h" #include "llvm/CodeGen/MachineFrameInfo.h" @@ -81,6 +82,14 @@ using namespace llvm; // //===----------------------------------------------------------------------===// +const MipsFrameLowering *MipsFrameLowering::create(MipsTargetMachine &TM, + const MipsSubtarget &ST) { + if (TM.getSubtargetImpl()->inMips16Mode()) + return llvm::createMips16FrameLowering(ST); + + return llvm::createMipsSEFrameLowering(ST); +} + // hasFP - Return true if the specified function should have a dedicated frame // pointer register. This is true if the function has variable sized allocas or // if frame pointer elimination is disabled. diff --git a/lib/Target/Mips/MipsFrameLowering.h b/lib/Target/Mips/MipsFrameLowering.h index 9f234f9b374..ed7b7fe76c2 100644 --- a/lib/Target/Mips/MipsFrameLowering.h +++ b/lib/Target/Mips/MipsFrameLowering.h @@ -30,9 +30,16 @@ public: : TargetFrameLowering(StackGrowsDown, sti.hasMips64() ? 16 : 8, 0, sti.hasMips64() ? 16 : 8), STI(sti) {} + static const MipsFrameLowering *create(MipsTargetMachine &TM, + const MipsSubtarget &ST); + bool hasFP(const MachineFunction &MF) const; }; +/// Create MipsInstrInfo objects. +const MipsFrameLowering *createMips16FrameLowering(const MipsSubtarget &ST); +const MipsFrameLowering *createMipsSEFrameLowering(const MipsSubtarget &ST); + } // End llvm namespace #endif diff --git a/lib/Target/Mips/MipsInstrInfo.cpp b/lib/Target/Mips/MipsInstrInfo.cpp index 5b0d4eb6f0a..50e3eb534e8 100644 --- a/lib/Target/Mips/MipsInstrInfo.cpp +++ b/lib/Target/Mips/MipsInstrInfo.cpp @@ -31,6 +31,13 @@ MipsInstrInfo::MipsInstrInfo(MipsTargetMachine &tm, unsigned UncondBr) : MipsGenInstrInfo(Mips::ADJCALLSTACKDOWN, Mips::ADJCALLSTACKUP), TM(tm), UncondBrOpc(UncondBr) {} +const MipsInstrInfo *MipsInstrInfo::create(MipsTargetMachine &TM) { + if (TM.getSubtargetImpl()->inMips16Mode()) + return llvm::createMips16InstrInfo(TM); + + return llvm::createMipsSEInstrInfo(TM); +} + bool MipsInstrInfo::isZeroImm(const MachineOperand &op) const { return op.isImm() && op.getImm() == 0; } diff --git a/lib/Target/Mips/MipsInstrInfo.h b/lib/Target/Mips/MipsInstrInfo.h index 51fedc4fe4c..7d562590624 100644 --- a/lib/Target/Mips/MipsInstrInfo.h +++ b/lib/Target/Mips/MipsInstrInfo.h @@ -33,6 +33,8 @@ protected: public: explicit MipsInstrInfo(MipsTargetMachine &TM, unsigned UncondBrOpc); + static const MipsInstrInfo *create(MipsTargetMachine &TM); + /// Branch Analysis virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, @@ -98,6 +100,10 @@ namespace Mips { MipsAnalyzeImmediate::Inst *LastInst); } +/// Create MipsInstrInfo objects. +const MipsInstrInfo *createMips16InstrInfo(MipsTargetMachine &TM); +const MipsInstrInfo *createMipsSEInstrInfo(MipsTargetMachine &TM); + } #endif diff --git a/lib/Target/Mips/MipsSEFrameLowering.cpp b/lib/Target/Mips/MipsSEFrameLowering.cpp index b120ea3ebfd..1c598471a0a 100644 --- a/lib/Target/Mips/MipsSEFrameLowering.cpp +++ b/lib/Target/Mips/MipsSEFrameLowering.cpp @@ -203,3 +203,8 @@ processFunctionBeforeCalleeSavedScan(MachineFunction &MF, if (hasFP(MF)) MRI.setPhysRegUsed(FP); } + +const MipsFrameLowering * +llvm::createMipsSEFrameLowering(const MipsSubtarget &ST) { + return new MipsSEFrameLowering(ST); +} diff --git a/lib/Target/Mips/MipsSEInstrInfo.cpp b/lib/Target/Mips/MipsSEInstrInfo.cpp index 5f8954ba484..eeb1de36efc 100644 --- a/lib/Target/Mips/MipsSEInstrInfo.cpp +++ b/lib/Target/Mips/MipsSEInstrInfo.cpp @@ -314,3 +314,7 @@ void MipsSEInstrInfo::ExpandBuildPairF64(MachineBasicBlock &MBB, BuildMI(MBB, I, dl, Mtc1Tdd, TRI.getSubReg(DstReg, Mips::sub_fpodd)) .addReg(HiReg); } + +const MipsInstrInfo *llvm::createMipsSEInstrInfo(MipsTargetMachine &TM) { + return new MipsSEInstrInfo(TM); +} diff --git a/lib/Target/Mips/MipsTargetMachine.cpp b/lib/Target/Mips/MipsTargetMachine.cpp index 9480a77c741..03a024a361d 100644 --- a/lib/Target/Mips/MipsTargetMachine.cpp +++ b/lib/Target/Mips/MipsTargetMachine.cpp @@ -13,10 +13,8 @@ #include "MipsTargetMachine.h" #include "Mips.h" -#include "Mips16FrameLowering.h" -#include "Mips16InstrInfo.h" -#include "MipsSEFrameLowering.h" -#include "MipsSEInstrInfo.h" +#include "MipsFrameLowering.h" +#include "MipsInstrInfo.h" #include "llvm/PassManager.h" #include "llvm/CodeGen/Passes.h" #include "llvm/Support/TargetRegistry.h" @@ -30,29 +28,6 @@ extern "C" void LLVMInitializeMipsTarget() { RegisterTargetMachine B(TheMips64elTarget); } -static const MipsInstrInfo *genInstrInfo(MipsTargetMachine &TM) { - const MipsInstrInfo *II; - - if (TM.getSubtargetImpl()->inMips16Mode()) - II = new Mips16InstrInfo(TM); - else - II = new MipsSEInstrInfo(TM); - - return II; -} - -static const MipsFrameLowering *genFrameLowering(MipsTargetMachine &TM, - const MipsSubtarget &ST) { - const MipsFrameLowering *FL; - - if (TM.getSubtargetImpl()->inMips16Mode()) - FL = new Mips16FrameLowering(ST); - else - FL = new MipsSEFrameLowering(ST); - - return FL; -} - // DataLayout --> Big-endian, 32-bit pointer/ABI/alignment // The stack is always 8 byte aligned // On function prologue, the stack is created by decrementing @@ -75,8 +50,8 @@ MipsTargetMachine(const Target &T, StringRef TT, (Subtarget.isABI_N64() ? "E-p:64:64:64-i8:8:32-i16:16:32-i64:64:64-f128:128:128-n32" : "E-p:32:32:32-i8:8:32-i16:16:32-i64:64:64-n32")), - InstrInfo(genInstrInfo(*this)), - FrameLowering(genFrameLowering(*this, Subtarget)), + InstrInfo(MipsInstrInfo::create(*this)), + FrameLowering(MipsFrameLowering::create(*this, Subtarget)), TLInfo(*this), TSInfo(*this), JITInfo() { }