From: Jim Grosbach Date: Tue, 20 Dec 2011 23:11:00 +0000 (+0000) Subject: ARM .req register name aliases are case insensitive, just like regnames. X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=aee718beac4fada5914d773db38002d95cae5e0d;p=oota-llvm.git ARM .req register name aliases are case insensitive, just like regnames. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147009 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 94631890acc..667418cf120 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -2325,9 +2325,10 @@ int ARMAsmParser::tryParseRegister() { .Default(0); } if (!RegNum) { - // Check for aliases registered via .req. - StringMap::const_iterator Entry = - RegisterReqs.find(Tok.getIdentifier()); + // Check for aliases registered via .req. Canonicalize to lower case. + // That's more consistent since register names are case insensitive, and + // it's how the original entry was passed in from MC/MCParser/AsmParser. + StringMap::const_iterator Entry = RegisterReqs.find(lowerCase); // If no match, return failure. if (Entry == RegisterReqs.end()) return -1;