From: Chris Lattner <sabre@nondot.org>
Date: Tue, 21 Feb 2006 23:10:29 +0000 (+0000)
Subject: Pass in a value type to getRegForInlineAsmConstraint, allowing targets to
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=aba3b13fb3e00b16725860e46a484c88136569f6;p=oota-llvm.git

Pass in a value type to getRegForInlineAsmConstraint, allowing targets to
select different sets of registers depending on the type requested.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26304 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h
index 49b35d3bd3a..0e51930442e 100644
--- a/include/llvm/Target/TargetLowering.h
+++ b/include/llvm/Target/TargetLowering.h
@@ -496,7 +496,8 @@ public:
   /// satisfy the constraint.  This should only be used for physregs and 
   /// C_RegisterClass constraints.
   virtual std::vector<unsigned> 
-  getRegForInlineAsmConstraint(const std::string &Constraint) const;
+  getRegForInlineAsmConstraint(const std::string &Constraint,
+                               MVT::ValueType VT) const;
   
   /// isOperandValidForConstraint - Return true if the specified SDOperand is
   /// valid for the specified target constraint letter.