From: Matt Arsenault <Matthew.Arsenault@amd.com>
Date: Mon, 23 Jun 2014 18:00:41 +0000 (+0000)
Subject: R600: Don't set fp_round_inreg action.
X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=a12b356464afd0d22950ce9c7025fd7fc4fcedf2;p=oota-llvm.git

R600: Don't set fp_round_inreg action.

There's no point in setting this since it seems to only
by created in 1 place for ppcf128

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211515 91177308-0d34-0410-b5e6-96231b3b80d8
---

diff --git a/lib/Target/R600/AMDILISelLowering.cpp b/lib/Target/R600/AMDILISelLowering.cpp
index fa48e65be4e..261c992683d 100644
--- a/lib/Target/R600/AMDILISelLowering.cpp
+++ b/lib/Target/R600/AMDILISelLowering.cpp
@@ -33,11 +33,6 @@ void AMDGPUTargetLowering::InitAMDILLowering() {
     MVT::v2i32
   };
 
-  static const MVT::SimpleValueType FloatTypes[] = {
-    MVT::f32,
-    MVT::f64
-  };
-
   static const MVT::SimpleValueType VectorTypes[] = {
     MVT::v4f32,
     MVT::v4i32,
@@ -57,10 +52,6 @@ void AMDGPUTargetLowering::InitAMDILLowering() {
     setOperationAction(ISD::BRIND, VT, Expand);
   }
 
-  for (MVT VT : FloatTypes) {
-    setOperationAction(ISD::FP_ROUND_INREG, VT, Expand);
-  }
-
   for (MVT VT : VectorTypes) {
     setOperationAction(ISD::VECTOR_SHUFFLE, VT, Expand);
     setOperationAction(ISD::SELECT_CC, VT, Expand);