From: Daniel Sanders Date: Mon, 21 Sep 2015 09:26:55 +0000 (+0000) Subject: [mips] Allow constant expressions in second argument of .cpsetup. X-Git-Url: http://plrg.eecs.uci.edu/git/?a=commitdiff_plain;h=99351d8c0e93ca5860b1cd995ec0e2d96761615c;p=oota-llvm.git [mips] Allow constant expressions in second argument of .cpsetup. Summary: Also tightened up the test and made a trivial fix to prevent double-newline after emitting .cpsetup directives. Reviewers: vkalintiris Subscribers: seanbruno, emaste, llvm-commits Differential Revision: http://reviews.llvm.org/D12956 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248143 91177308-0d34-0410-b5e6-96231b3b80d8 --- diff --git a/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/lib/Target/Mips/AsmParser/MipsAsmParser.cpp index ad46a8904c8..d6994c6b5dc 100644 --- a/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ b/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -4926,16 +4926,19 @@ bool MipsAsmParser::parseDirectiveCPSetup() { ResTy = parseAnyRegister(TmpReg); if (ResTy == MatchOperand_NoMatch) { - const AsmToken &Tok = Parser.getTok(); - if (Tok.is(AsmToken::Integer)) { - Save = Tok.getIntVal(); - SaveIsReg = false; - Parser.Lex(); - } else { - reportParseError("expected save register or stack offset"); + const MCExpr *OffsetExpr; + int64_t OffsetVal; + SMLoc ExprLoc = getLexer().getLoc(); + + if (Parser.parseExpression(OffsetExpr) || + !OffsetExpr->evaluateAsAbsolute(OffsetVal)) { + reportParseError(ExprLoc, "expected save register or stack offset"); Parser.eatToEndOfStatement(); return false; } + + Save = OffsetVal; + SaveIsReg = false; } else { MipsOperand &SaveOpnd = static_cast(*TmpReg[0]); if (!SaveOpnd.isGPRAsmReg()) { diff --git a/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp b/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp index 50a92a5ee18..4e865663fc0 100644 --- a/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp +++ b/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp @@ -383,7 +383,7 @@ void MipsTargetAsmStreamer::emitDirectiveCpsetup(unsigned RegNo, OS << ", "; - OS << Sym.getName() << "\n"; + OS << Sym.getName(); forbidModuleDirective(); } diff --git a/test/MC/Mips/cpsetup.s b/test/MC/Mips/cpsetup.s index a3ffae67aae..6b20562b0c5 100644 --- a/test/MC/Mips/cpsetup.s +++ b/test/MC/Mips/cpsetup.s @@ -1,29 +1,31 @@ # RUN: llvm-mc -triple mips64-unknown-unknown -target-abi o32 -filetype=obj -o - %s | \ # RUN: llvm-objdump -d -r -arch=mips64 - | \ -# RUN: FileCheck -check-prefix=O32 %s +# RUN: FileCheck -check-prefix=ALL -check-prefix=O32 %s # RUN: llvm-mc -triple mips64-unknown-unknown -target-abi o32 %s | \ -# RUN: FileCheck -check-prefix=ASM %s +# RUN: FileCheck -check-prefix=ALL -check-prefix=ASM %s # RUN: llvm-mc -triple mips64-unknown-unknown -target-abi n32 -filetype=obj -o - %s | \ # RUN: llvm-objdump -d -r -t -arch=mips64 - | \ -# RUN: FileCheck -check-prefix=NXX -check-prefix=N32 %s +# RUN: FileCheck -check-prefix=ALL -check-prefix=NXX -check-prefix=N32 %s # RUN: llvm-mc -triple mips64-unknown-unknown -target-abi n32 %s | \ -# RUN: FileCheck -check-prefix=ASM %s +# RUN: FileCheck -check-prefix=ALL -check-prefix=ASM %s # RUN: llvm-mc -triple mips64-unknown-unknown %s -filetype=obj -o - | \ # RUN: llvm-objdump -d -r -t -arch=mips64 - | \ -# RUN: FileCheck -check-prefix=NXX -check-prefix=N64 %s +# RUN: FileCheck -check-prefix=ALL -check-prefix=NXX -check-prefix=N64 %s # RUN: llvm-mc -triple mips64-unknown-unknown %s | \ -# RUN: FileCheck -check-prefix=ASM %s +# RUN: FileCheck -check-prefix=ALL -check-prefix=ASM %s .text .option pic2 t1: .cpsetup $25, 8, __cerror + nop +# ALL-LABEL: t1: # O32-NOT: __cerror @@ -31,19 +33,23 @@ t1: # N32 doesn't allow 3 operations to be specified in the same relocation # record like N64 does. -# NXX: sd $gp, 8($sp) -# NXX: lui $gp, 0 -# NXX: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_HI16 __cerror -# NXX: addiu $gp, $gp, 0 -# NXX: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_LO16 __cerror -# N32: addu $gp, $gp, $25 -# N64: daddu $gp, $gp, $25 +# NXX-NEXT: sd $gp, 8($sp) +# NXX-NEXT: lui $gp, 0 +# NXX-NEXT: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_HI16 __cerror +# NXX-NEXT: addiu $gp, $gp, 0 +# NXX-NEXT: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_LO16 __cerror +# N32-NEXT: addu $gp, $gp, $25 +# N64-NEXT: daddu $gp, $gp, $25 -# ASM: .cpsetup $25, 8, __cerror +# ASM-NEXT: .cpsetup $25, 8, __cerror -t2: +# ALL-NEXT: nop +t2: .cpsetup $25, $2, __cerror + nop + +# ALL-LABEL: t2: # O32-NOT: __cerror @@ -51,47 +57,61 @@ t2: # N32 doesn't allow 3 operations to be specified in the same relocation # record like N64 does. -# NXX: move $2, $gp -# NXX: lui $gp, 0 -# NXX: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_HI16 __cerror -# NXX: addiu $gp, $gp, 0 -# NXX: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_LO16 __cerror -# N32: addu $gp, $gp, $25 -# N64: daddu $gp, $gp, $25 +# NXX-NEXT: move $2, $gp +# NXX-NEXT: lui $gp, 0 +# NXX-NEXT: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_HI16 __cerror +# NXX-NEXT: addiu $gp, $gp, 0 +# NXX-NEXT: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_LO16 __cerror +# N32-NEXT: addu $gp, $gp, $25 +# N64-NEXT: daddu $gp, $gp, $25 -# ASM: .cpsetup $25, $2, __cerror +# ASM-NEXT: .cpsetup $25, $2, __cerror + +# ALL-NEXT: nop # .cpsetup with local labels (PR22518): + +# The '1:' label isn't emitted in all cases but we still want a label to match +# so we force one here. + +t3: + nop 1: .cpsetup $25, $2, 1b nop sub $3, $3, $2 - nop -# O32: t2: -# O32: nop -# O32: sub $3, $3, $2 -# O32: nop +# ALL-LABEL: t3: +# ALL-NEXT: nop + +# O32-NEXT: nop +# O32-NEXT: sub $3, $3, $2 # FIXME: Direct object emission for N32 is still under development. # N32 doesn't allow 3 operations to be specified in the same relocation # record like N64 does. -# NXX: move $2, $gp -# NXX: lui $gp, 0 -# NXX: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_HI16 $tmp0 -# NXX: addiu $gp, $gp, 0 -# NXX: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_LO16 $tmp0 -# N32: addu $gp, $gp, $25 -# N64: daddu $gp, $gp, $25 -# NXX: nop -# NXX: sub $3, $3, $2 -# NXX: nop +# NXX: $tmp0: +# NXX-NEXT: move $2, $gp +# NXX-NEXT: lui $gp, 0 +# NXX-NEXT: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_HI16 $tmp0 +# NXX-NEXT: addiu $gp, $gp, 0 +# NXX-NEXT: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_LO16 $tmp0 +# N32-NEXT: addu $gp, $gp, $25 +# N64-NEXT: daddu $gp, $gp, $25 +# NXX-NEXT: nop +# NXX-NEXT: sub $3, $3, $2 + +# ASM: $tmp0: +# ASM-NEXT: .cpsetup $25, $2, $tmp0 -# ASM: .cpsetup $25, $2, $tmp0 +# Ensure we have at least one instruction between labels so that the labels +# we're matching aren't removed. + nop +# ALL-NEXT: nop -t3: .option pic0 +t4: nop .cpsetup $25, 8, __cerror nop @@ -99,12 +119,43 @@ t3: # Testing that .cpsetup expands to nothing in this case # by checking that the next instruction after the first # nop is also a 'nop'. -# NXX: nop + +# ALL-LABEL: t4: + +# NXX-NEXT: nop # NXX-NEXT: nop -# ASM: nop -# ASM: .cpsetup $25, 8, __cerror -# ASM: nop +# ASM-NEXT: nop +# ASM-NEXT: .cpsetup $25, 8, __cerror +# ASM-NEXT: nop + +# Test that we accept constant expressions. + .option pic2 +t5: + .cpsetup $25, ((8*4) - (3*8)), __cerror + nop + +# ALL-LABEL: t5: + +# O32-NOT: __cerror + +# FIXME: Direct object emission for N32 is still under development. +# N32 doesn't allow 3 operations to be specified in the same relocation +# record like N64 does. + +# NXX-NEXT: sd $gp, 8($sp) +# NXX-NEXT: lui $gp, 0 +# NXX-NEXT: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_HI16 __cerror +# NXX-NEXT: addiu $gp, $gp, 0 +# NXX-NEXT: R_MIPS_GPREL16/R_MIPS_SUB/R_MIPS_LO16 __cerror +# N32-NEXT: addu $gp, $gp, $25 +# N64-NEXT: daddu $gp, $gp, $25 + +# ASM-NEXT: .cpsetup $25, 8, __cerror + +# ALL-NEXT: nop + +# NXX-LABEL: SYMBOL TABLE: # For .cpsetup with local labels, we need to check if $tmp0 is in the symbol # table: